X-Git-Url: https://notaz.gp2x.de/cgi-bin/gitweb.cgi?a=blobdiff_plain;f=libpcsxcore%2Fnew_dynarec%2Femu_if.c;h=86bf0d2709a69259af0c8c69eb7c811519814326;hb=d014a47167b28b19f87546bca0b0c53f08b1daff;hp=a2c31f9a1dc11c541880048e69bcae4ca97614e3;hpb=c8e482ed450223234bb742cc9f30c54696498254;p=pcsx_rearmed.git

diff --git a/libpcsxcore/new_dynarec/emu_if.c b/libpcsxcore/new_dynarec/emu_if.c
index a2c31f9a..86bf0d27 100644
--- a/libpcsxcore/new_dynarec/emu_if.c
+++ b/libpcsxcore/new_dynarec/emu_if.c
@@ -46,12 +46,16 @@ static void schedule_timeslice(void)
 	next_interupt = c + min;
 }
 
+static void unusedInterrupt()
+{
+}
+
 typedef void (irq_func)();
 
 static irq_func * const irq_funcs[] = {
 	[PSXINT_SIO]	= sioInterrupt,
 	[PSXINT_CDR]	= cdrInterrupt,
-	[PSXINT_CDREAD]	= cdrReadInterrupt,
+	[PSXINT_CDREAD]	= cdrPlayReadInterrupt,
 	[PSXINT_GPUDMA]	= gpuInterrupt,
 	[PSXINT_MDECOUTDMA] = mdec1Interrupt,
 	[PSXINT_SPUDMA]	= spuInterrupt,
@@ -59,7 +63,7 @@ static irq_func * const irq_funcs[] = {
 	[PSXINT_GPUOTCDMA] = gpuotcInterrupt,
 	[PSXINT_CDRDMA] = cdrDmaInterrupt,
 	[PSXINT_CDRLID] = cdrLidSeekInterrupt,
-	[PSXINT_CDRPLAY] = cdrPlayInterrupt,
+	[PSXINT_CDRPLAY_OLD] = unusedInterrupt,
 	[PSXINT_SPU_UPDATE] = spuUpdate,
 	[PSXINT_RCNT] = psxRcntUpdate,
 };
@@ -88,7 +92,8 @@ static void irq_test(void)
 
 void gen_interupt()
 {
-	evprintf("  +ge %08x, %u->%u\n", psxRegs.pc, psxRegs.cycle, next_interupt);
+	evprintf("  +ge %08x, %u->%u (%d)\n", psxRegs.pc, psxRegs.cycle,
+		next_interupt, next_interupt - psxRegs.cycle);
 
 	irq_test();
 	//psxBranchTest();
@@ -100,13 +105,10 @@ void gen_interupt()
 		next_interupt, next_interupt - psxRegs.cycle);
 }
 
-// from interpreter
-extern void MTC0(int reg, u32 val);
-
 void pcsx_mtc0(u32 reg, u32 val)
 {
 	evprintf("MTC0 %d #%x @%08x %u\n", reg, val, psxRegs.pc, psxRegs.cycle);
-	MTC0(reg, val);
+	MTC0(&psxRegs, reg, val);
 	gen_interupt();
 	if (Cause & Status & 0x0300) // possible sw irq
 		pending_exception = 1;
@@ -115,7 +117,7 @@ void pcsx_mtc0(u32 reg, u32 val)
 void pcsx_mtc0_ds(u32 reg, u32 val)
 {
 	evprintf("MTC0 %d #%x @%08x %u\n", reg, val, psxRegs.pc, psxRegs.cycle);
-	MTC0(reg, val);
+	MTC0(&psxRegs, reg, val);
 }
 
 void new_dyna_before_save(void)
@@ -294,15 +296,13 @@ const uint64_t gte_reg_writes[64] = {
 static int ari64_init()
 {
 	static u32 scratch_buf[8*8*2] __attribute__((aligned(64)));
-	extern void (*psxCP2[64])();
-	extern void psxNULL();
 	size_t i;
 
 	new_dynarec_init();
 	new_dyna_pcsx_mem_init();
 
 	for (i = 0; i < ARRAY_SIZE(gte_handlers); i++)
-		if (psxCP2[i] != psxNULL)
+		if (psxCP2[i] != gteNULL)
 			gte_handlers[i] = psxCP2[i];
 
 #if defined(__arm__) && !defined(DRC_DBG)
@@ -648,7 +648,8 @@ void do_insn_cmp(void)
 	//if (psxRegs.cycle == 166172) breakme();
 
 	if (which_event >= 0 && event_cycles[which_event] != ev_cycles) {
-		printf("bad ev_cycles #%d: %08x %08x\n", which_event, event_cycles[which_event], ev_cycles);
+		printf("bad ev_cycles #%d: %u %u / %u\n", which_event,
+			event_cycles[which_event], ev_cycles, psxRegs.cycle);
 		fatal = 1;
 	}