X-Git-Url: https://notaz.gp2x.de/cgi-bin/gitweb.cgi?a=blobdiff_plain;f=libpcsxcore%2Fnew_dynarec%2Femu_if.c;h=e89b635fb3acadbddb5d276ce609acec7dd5ec27;hb=da65071fd7ceac663bb951b13da2563d7b16431d;hp=bf64e0f0dc1785279f8523e0b86646faf768660e;hpb=d9a0249331e3f0da8820e158baaafa69e3a534ac;p=pcsx_rearmed.git diff --git a/libpcsxcore/new_dynarec/emu_if.c b/libpcsxcore/new_dynarec/emu_if.c index bf64e0f0..e89b635f 100644 --- a/libpcsxcore/new_dynarec/emu_if.c +++ b/libpcsxcore/new_dynarec/emu_if.c @@ -9,12 +9,10 @@ #include "emu_if.h" #include "pcsxmem.h" +#include "events.h" #include "../psxhle.h" #include "../psxinterpreter.h" #include "../r3000a.h" -#include "../cdrom.h" -#include "../psxdma.h" -#include "../mdec.h" #include "../gte_arm.h" #include "../gte_neon.h" #define FLAGLESS @@ -25,114 +23,19 @@ //#define evprintf printf #define evprintf(...) -char invalid_code[0x100000]; -u32 event_cycles[PSXINT_COUNT]; - -static void schedule_timeslice(void) -{ - u32 i, c = psxRegs.cycle; - u32 irqs = psxRegs.interrupt; - s32 min, dif; - - min = PSXCLK; - for (i = 0; irqs != 0; i++, irqs >>= 1) { - if (!(irqs & 1)) - continue; - dif = event_cycles[i] - c; - //evprintf(" ev %d\n", dif); - if (0 < dif && dif < min) - min = dif; - } - next_interupt = c + min; -} - -static void unusedInterrupt() -{ -} - -typedef void (irq_func)(); - -static irq_func * const irq_funcs[] = { - [PSXINT_SIO] = sioInterrupt, - [PSXINT_CDR] = cdrInterrupt, - [PSXINT_CDREAD] = cdrPlaySeekReadInterrupt, - [PSXINT_GPUDMA] = gpuInterrupt, - [PSXINT_MDECOUTDMA] = mdec1Interrupt, - [PSXINT_SPUDMA] = spuInterrupt, - [PSXINT_MDECINDMA] = mdec0Interrupt, - [PSXINT_GPUOTCDMA] = gpuotcInterrupt, - [PSXINT_CDRDMA] = cdrDmaInterrupt, - [PSXINT_CDRLID] = cdrLidSeekInterrupt, - [PSXINT_CDRPLAY_OLD] = unusedInterrupt, - [PSXINT_SPU_UPDATE] = spuUpdate, - [PSXINT_RCNT] = psxRcntUpdate, -}; - -/* local dupe of psxBranchTest, using event_cycles */ -static void irq_test(void) -{ - u32 cycle = psxRegs.cycle; - u32 irq, irq_bits; - - for (irq = 0, irq_bits = psxRegs.interrupt; irq_bits != 0; irq++, irq_bits >>= 1) { - if (!(irq_bits & 1)) - continue; - if ((s32)(cycle - event_cycles[irq]) >= 0) { - // note: irq_funcs() also modify psxRegs.interrupt - psxRegs.interrupt &= ~(1u << irq); - irq_funcs[irq](); - } - } - - if ((psxHu32(0x1070) & psxHu32(0x1074)) && (Status & 0x401) == 0x401) { - psxException(0x400, 0); - pending_exception = 1; - } -} - -void gen_interupt() -{ - evprintf(" +ge %08x, %u->%u (%d)\n", psxRegs.pc, psxRegs.cycle, - next_interupt, next_interupt - psxRegs.cycle); - - irq_test(); - //psxBranchTest(); - //pending_exception = 1; - - schedule_timeslice(); - - evprintf(" -ge %08x, %u->%u (%d)\n", psxRegs.pc, psxRegs.cycle, - next_interupt, next_interupt - psxRegs.cycle); -} - -// from interpreter -extern void MTC0(int reg, u32 val); - void pcsx_mtc0(u32 reg, u32 val) { evprintf("MTC0 %d #%x @%08x %u\n", reg, val, psxRegs.pc, psxRegs.cycle); - MTC0(reg, val); - gen_interupt(); - if (Cause & Status & 0x0300) // possible sw irq + MTC0(&psxRegs, reg, val); + gen_interupt(&psxRegs.CP0); + if (psxRegs.CP0.n.Cause & psxRegs.CP0.n.Status & 0x0300) // possible sw irq pending_exception = 1; } void pcsx_mtc0_ds(u32 reg, u32 val) { evprintf("MTC0 %d #%x @%08x %u\n", reg, val, psxRegs.pc, psxRegs.cycle); - MTC0(reg, val); -} - -void new_dyna_before_save(void) -{ - psxRegs.interrupt &= ~(1 << PSXINT_RCNT); // old savestate compat - - // psxRegs.intCycle is always maintained, no need to convert -} - -void new_dyna_after_save(void) -{ - psxRegs.interrupt |= 1 << PSXINT_RCNT; + MTC0(&psxRegs, reg, val); } static void new_dyna_restore(void) @@ -193,7 +96,7 @@ void new_dyna_freeze(void *f, int mode) //printf("drc: %d block info entries %s\n", size/8, mode ? "saved" : "loaded"); } -#ifndef DRC_DISABLE +#if !defined(DRC_DISABLE) && !defined(LIGHTREC) /* GTE stuff */ void *gte_handlers[64]; @@ -299,15 +202,13 @@ const uint64_t gte_reg_writes[64] = { static int ari64_init() { static u32 scratch_buf[8*8*2] __attribute__((aligned(64))); - extern void (*psxCP2[64])(); - extern void psxNULL(); size_t i; new_dynarec_init(); new_dyna_pcsx_mem_init(); for (i = 0; i < ARRAY_SIZE(gte_handlers); i++) - if (psxCP2[i] != psxNULL) + if (psxCP2[i] != gteNULL) gte_handlers[i] = psxCP2[i]; #if defined(__arm__) && !defined(DRC_DBG) @@ -335,7 +236,6 @@ static int ari64_init() static void ari64_reset() { - printf("ari64_reset\n"); new_dyna_pcsx_mem_reset(); new_dynarec_invalidate_all_pages(); new_dyna_restore(); @@ -365,6 +265,17 @@ static void ari64_execute() } } +static void ari64_execute_block(enum blockExecCaller caller) +{ + if (caller == EXEC_CALLER_BOOT) + stop++; + + ari64_execute_until(); + + if (caller == EXEC_CALLER_BOOT) + stop--; +} + static void ari64_clear(u32 addr, u32 size) { size *= 4; /* PCSX uses DMA units (words) */ @@ -374,20 +285,19 @@ static void ari64_clear(u32 addr, u32 size) new_dynarec_invalidate_range(addr, addr + size); } -static void ari64_notify(int note, void *data) { - /* - Should be fixed when ARM dynarec has proper icache emulation. +static void ari64_notify(enum R3000Anote note, void *data) { switch (note) { - case R3000ACPU_NOTIFY_CACHE_UNISOLATED: - break; - case R3000ACPU_NOTIFY_CACHE_ISOLATED: - Sent from psxDma3(). - case R3000ACPU_NOTIFY_DMA3_EXE_LOAD: - default: - break; + case R3000ACPU_NOTIFY_CACHE_UNISOLATED: + case R3000ACPU_NOTIFY_CACHE_ISOLATED: + new_dyna_pcsx_mem_isolate(note == R3000ACPU_NOTIFY_CACHE_ISOLATED); + break; + case R3000ACPU_NOTIFY_BEFORE_SAVE: + break; + case R3000ACPU_NOTIFY_AFTER_LOAD: + ari64_reset(); + break; } - */ } static void ari64_apply_config() @@ -399,7 +309,7 @@ static void ari64_apply_config() else new_dynarec_hacks &= ~NDHACK_NO_STALLS; - if (cycle_multiplier != cycle_multiplier_old + if (Config.cycle_multiplier != cycle_multiplier_old || new_dynarec_hacks != new_dynarec_hacks_old) { new_dynarec_clear_full(); @@ -416,7 +326,7 @@ R3000Acpu psxRec = { ari64_init, ari64_reset, ari64_execute, - ari64_execute_until, + ari64_execute_block, ari64_clear, ari64_notify, ari64_apply_config, @@ -427,17 +337,15 @@ R3000Acpu psxRec = { unsigned int address; int pending_exception, stop; -unsigned int next_interupt; +u32 next_interupt; int new_dynarec_did_compile; -int cycle_multiplier; -int cycle_multiplier_override; int cycle_multiplier_old; int new_dynarec_hacks_pergame; int new_dynarec_hacks_old; int new_dynarec_hacks; void *psxH_ptr; void *zeromem_ptr; -u8 zero_mem[0x1000]; +u32 zero_mem[0x1000/4]; void *mem_rtab; void *scratch_buf_ptr; void new_dynarec_init() {} @@ -449,6 +357,7 @@ void new_dynarec_invalidate_range(unsigned int start, unsigned int end) {} void new_dyna_pcsx_mem_init(void) {} void new_dyna_pcsx_mem_reset(void) {} void new_dyna_pcsx_mem_load_state(void) {} +void new_dyna_pcsx_mem_isolate(int enable) {} void new_dyna_pcsx_mem_shutdown(void) {} int new_dynarec_save_blocks(void *save, int size) { return 0; } void new_dynarec_load_blocks(const void *save, int size) {}