X-Git-Url: https://notaz.gp2x.de/cgi-bin/gitweb.cgi?a=blobdiff_plain;f=libpcsxcore%2Fnew_dynarec%2Femu_if.h;h=90e32e790bdcc8b55efcd87512c522ef0b6d104f;hb=2167bef61daaeb12ceb59c3c577fc636e9011d6d;hp=e16cca54055fabeacaafa40ac3ef08e36bbb32ea;hpb=59774ed0120d20c731ee20da88ba6356d184dc8a;p=pcsx_rearmed.git

diff --git a/libpcsxcore/new_dynarec/emu_if.h b/libpcsxcore/new_dynarec/emu_if.h
index e16cca54..90e32e79 100644
--- a/libpcsxcore/new_dynarec/emu_if.h
+++ b/libpcsxcore/new_dynarec/emu_if.h
@@ -1,10 +1,6 @@
 #include "new_dynarec.h"
 #include "../r3000a.h"
 
-#ifndef __ARM_ARCH_7A__
-#define ARMv5_ONLY
-#endif
-
 extern char invalid_code[0x100000];
 
 /* weird stuff */
@@ -31,25 +27,35 @@ extern int reg_cop0[];
 extern int reg_cop2d[], reg_cop2c[];
 extern void *gte_handlers[64];
 extern void *gte_handlers_nf[64];
+extern const char *gte_regnames[64];
 extern const char gte_cycletab[64];
+extern const uint64_t gte_reg_reads[64];
+extern const uint64_t gte_reg_writes[64];
 
 /* dummy */
 extern int FCR0, FCR31;
 
 /* mem */
-extern void (*readmem[0x10000])();
-extern void (*readmemb[0x10000])();
-extern void (*readmemh[0x10000])();
-extern void (*writemem[0x10000])();
-extern void (*writememb[0x10000])();
-extern void (*writememh[0x10000])();
+extern void *mem_rtab;
+extern void *mem_wtab;
 
-extern unsigned int address;
-extern unsigned int readmem_word; /* same as readmem_dword */
-extern unsigned int word;	/* write */
-extern unsigned short hword;
-extern unsigned char byte;
+void jump_handler_read8(u32 addr, u32 *table, u32 cycles);
+void jump_handler_read16(u32 addr, u32 *table, u32 cycles);
+void jump_handler_read32(u32 addr, u32 *table, u32 cycles);
+void jump_handler_write8(u32 addr, u32 data, u32 cycles, u32 *table);
+void jump_handler_write16(u32 addr, u32 data, u32 cycles, u32 *table);
+void jump_handler_write32(u32 addr, u32 data, u32 cycles, u32 *table);
+void jump_handler_write_h(u32 addr, u32 data, u32 cycles, void *handler);
+void jump_handle_swl(u32 addr, u32 data, u32 cycles);
+void jump_handle_swr(u32 addr, u32 data, u32 cycles);
+void rcnt0_read_count_m0(u32 addr, u32, u32 cycles);
+void rcnt0_read_count_m1(u32 addr, u32, u32 cycles);
+void rcnt1_read_count_m0(u32 addr, u32, u32 cycles);
+void rcnt1_read_count_m1(u32 addr, u32, u32 cycles);
+void rcnt2_read_count_m0(u32 addr, u32, u32 cycles);
+void rcnt2_read_count_m1(u32 addr, u32, u32 cycles);
 
+extern unsigned int address;
 extern void *psxH_ptr;
 
 // same as invalid_code, just a region for ram write checks (inclusive)
@@ -60,8 +66,8 @@ extern unsigned int next_interupt;
 extern int pending_exception;
 
 /* called by drc */
-void pcsx_mtc0(u32 reg);
-void pcsx_mtc0_ds(u32 reg);
+void pcsx_mtc0(u32 reg, u32 val);
+void pcsx_mtc0_ds(u32 reg, u32 val);
 
 /* misc */
 extern void (*psxHLEt[])();