X-Git-Url: https://notaz.gp2x.de/cgi-bin/gitweb.cgi?a=blobdiff_plain;f=libpcsxcore%2Fnew_dynarec%2Flinkage_arm.S;h=1a16aa04da6ff8b08cae51104ea1a8946b9fbab2;hb=53358c1d5b032cc7186b71e3cc14f0ad6c2d5468;hp=5538462f8c1c3a7aafab504c62bfdbb32b72daac;hpb=d1150cd66676ce43b8451c65818c2dc3e2f8a1d6;p=pcsx_rearmed.git diff --git a/libpcsxcore/new_dynarec/linkage_arm.S b/libpcsxcore/new_dynarec/linkage_arm.S index 5538462f..1a16aa04 100644 --- a/libpcsxcore/new_dynarec/linkage_arm.S +++ b/libpcsxcore/new_dynarec/linkage_arm.S @@ -264,7 +264,7 @@ FUNCTION(dyna_linker): beq dyna_linker /* pagefault */ mov r1, r0 - mov r2, #8 + mov r2, #(4<<2) /* Address error (fetch) */ .size dyna_linker, .-dyna_linker FUNCTION(exec_pagefault): @@ -272,21 +272,13 @@ FUNCTION(exec_pagefault): /* r1 = fault address */ /* r2 = cause */ ldr r3, [fp, #LO_reg_cop0+48] /* Status */ - mvn r6, #0xF000000F - ldr r4, [fp, #LO_reg_cop0+16] /* Context */ - bic r6, r6, #0x0F800000 str r0, [fp, #LO_reg_cop0+56] /* EPC */ orr r3, r3, #2 str r1, [fp, #LO_reg_cop0+32] /* BadVAddr */ - bic r4, r4, r6 str r3, [fp, #LO_reg_cop0+48] /* Status */ - and r5, r6, r1, lsr #9 str r2, [fp, #LO_reg_cop0+52] /* Cause */ - and r1, r1, r6, lsl #9 - str r1, [fp, #LO_reg_cop0+40] /* EntryHi */ - orr r4, r4, r5 - str r4, [fp, #LO_reg_cop0+16] /* Context */ mov r0, #0x80000000 + orr r0, r0, #0x80 bl get_addr_ht mov pc, r0 .size exec_pagefault, .-exec_pagefault @@ -440,7 +432,7 @@ FUNCTION(cc_interrupt): and r2, r2, r10, lsr #17 add r3, fp, #LO_restore_candidate str r10, [fp, #LO_cycle] /* PCSX cycles */ -@@ str r10, [fp, #LO_reg_cop0+36] /* Count */ +@@ str r10, [fp, #LO_reg_cop0+36] /* Count - not on PSX */ ldr r4, [r2, r3] mov r10, lr tst r4, r4 @@ -848,4 +840,44 @@ FUNCTION(call_gteStall): add r10, r10, r0 bx lr +#ifdef HAVE_ARMV6 + +FUNCTION(get_reg): + ldr r12, [r0] + and r1, r1, #0xff + ldr r2, [r0, #4] + orr r1, r1, r1, lsl #8 + ldr r3, [r0, #8] + orr r1, r1, r1, lsl #16 @ searched char in every byte + ldrb r0, [r0, #12] @ last byte + eor r12, r12, r1 + eor r2, r2, r1 + eor r3, r3, r1 + cmp r0, r1, lsr #24 + mov r0, #12 + mvn r1, #0 @ r1=~0 + bxeq lr + orr r3, r3, #0xff000000 @ EXCLUDE_REG + uadd8 r0, r12, r1 @ add and set GE bits when not 0 (match) + mov r12, #0 + sel r0, r12, r1 @ 0 if no match, else ff in some byte + uadd8 r2, r2, r1 + sel r2, r12, r1 + uadd8 r3, r3, r1 + sel r3, r12, r1 + mov r12, #3 + clz r0, r0 @ 0, 8, 16, 24 or 32 + clz r2, r2 + clz r3, r3 + sub r0, r12, r0, lsr #3 @ 3, 2, 1, 0 or -1 + sub r2, r12, r2, lsr #3 + sub r3, r12, r3, lsr #3 + orr r2, r2, #4 + orr r3, r3, #8 + and r0, r0, r2 + and r0, r0, r3 + bx lr + +#endif /* HAVE_ARMV6 */ + @ vim:filetype=armasm