X-Git-Url: https://notaz.gp2x.de/cgi-bin/gitweb.cgi?a=blobdiff_plain;f=libpcsxcore%2Fnew_dynarec%2Fnew_dynarec.c;h=07cd6191358db45912e8068655ada193be66703c;hb=25427adfbaed8ac93f01b56c4fac9811dd029b51;hp=d7c243655a254cb63348d2528fde17686e163814;hpb=4ee246ed0e02c61f0b33251d86ea74a4a0380a47;p=pcsx_rearmed.git

diff --git a/libpcsxcore/new_dynarec/new_dynarec.c b/libpcsxcore/new_dynarec/new_dynarec.c
index d7c24365..07cd6191 100644
--- a/libpcsxcore/new_dynarec/new_dynarec.c
+++ b/libpcsxcore/new_dynarec/new_dynarec.c
@@ -4945,6 +4945,10 @@ static void drc_dbg_emit_do_cmp(int i, int ccadj_)
       emit_storereg(reg, 0);
     }
   }
+  if (dops[i].opcode == 0x0f) { // LUI
+    emit_movimm(cinfo[i].imm << 16, 0);
+    emit_storereg(dops[i].rt1, 0);
+  }
   emit_movimm(start+i*4,0);
   emit_writeword(0,&pcaddr);
   int cc = get_reg(regs[i].regmap_entry, CCREG);
@@ -4960,8 +4964,18 @@ static void drc_dbg_emit_do_cmp(int i, int ccadj_)
   restore_regs(reglist);
   assem_debug("\\\\do_insn_cmp\n");
 }
+static void drc_dbg_emit_wb_dirtys(int i, const struct regstat *i_regs)
+{
+  // write-out non-consts, consts are likely different because of get_final_value()
+  if (i_regs->dirty & ~i_regs->loadedconst) {
+    assem_debug("/ drc_dbg_wb\n");
+    wb_dirtys(i_regs->regmap, i_regs->dirty & ~i_regs->loadedconst);
+    assem_debug("\\ drc_dbg_wb\n");
+  }
+}
 #else
 #define drc_dbg_emit_do_cmp(x,y)
+#define drc_dbg_emit_wb_dirtys(x,y)
 #endif
 
 // Used when a branch jumps into the delay slot of another branch
@@ -5685,6 +5699,7 @@ static void cjump_assemble(int i, const struct regstat *i_regs)
         load_reg(regs[i].regmap,branch_regs[i].regmap,ROREG);
       load_regs(regs[i].regmap,branch_regs[i].regmap,CCREG,INVCP);
       ds_assemble(i+1,&branch_regs[i]);
+      drc_dbg_emit_wb_dirtys(i+1, &branch_regs[i]);
       cc=get_reg(branch_regs[i].regmap,CCREG);
       if(cc==-1) {
         emit_loadreg(CCREG,cc=HOST_CCREG);
@@ -6176,6 +6191,12 @@ static noinline void new_dynarec_test(void)
   out = ndrc->translation_cache;
 }
 
+static int get_cycle_multiplier(void)
+{
+  return Config.cycle_multiplier_override && Config.cycle_multiplier == CYCLE_MULT_DEFAULT
+     ? Config.cycle_multiplier_override : Config.cycle_multiplier;
+}
+
 // clear the state completely, instead of just marking
 // things invalid like invalidate_all_pages() does
 void new_dynarec_clear_full(void)
@@ -6203,6 +6224,12 @@ void new_dynarec_clear_full(void)
   stat_clear(stat_blocks);
   stat_clear(stat_links);
 
+  if (cycle_multiplier_old != Config.cycle_multiplier
+      || new_dynarec_hacks_old != new_dynarec_hacks)
+  {
+    SysPrintf("ndrc config: mul=%d, ha=%x, pex=%d\n",
+      get_cycle_multiplier(), new_dynarec_hacks, Config.PreciseExceptions);
+  }
   cycle_multiplier_old = Config.cycle_multiplier;
   new_dynarec_hacks_old = new_dynarec_hacks;
 }
@@ -6325,9 +6352,9 @@ static u_int *get_source_start(u_int addr, u_int *limit)
     *limit = (addr & 0xa0600000) + 0x00200000;
     return (u_int *)(psxM + (addr & 0x1fffff));
   }
-  else if (!Config.HLE && (
+  else if (
     /* (0x9fc00000 <= addr && addr < 0x9fc80000) ||*/
-    (0xbfc00000 <= addr && addr < 0xbfc80000)))
+    (0xbfc00000 <= addr && addr < 0xbfc80000))
   {
     // BIOS. The multiplier should be much higher as it's uncached 8bit mem,
     // but timings in PCSX are too tied to the interpreter's 2-per-insn assumption
@@ -6510,10 +6537,14 @@ static int apply_hacks(void)
   return 0;
 }
 
-static int is_ld_use_hazard(int ld_rt, const struct decoded_insn *op)
+static int is_ld_use_hazard(const struct decoded_insn *op_ld,
+  const struct decoded_insn *op)
 {
-  return ld_rt != 0 && (ld_rt == op->rs1 || ld_rt == op->rs2)
-    && op->itype != LOADLR && op->itype != CJUMP && op->itype != SJUMP;
+  if (op_ld->rt1 == 0 || (op_ld->rt1 != op->rs1 && op_ld->rt1 != op->rs2))
+    return 0;
+  if (op_ld->itype == LOADLR && op->itype == LOADLR)
+    return op_ld->rt1 == op_ld->rs1;
+  return op->itype != CJUMP && op->itype != SJUMP;
 }
 
 static void force_intcall(int i)
@@ -6905,7 +6936,7 @@ static noinline void pass1_disassemble(u_int pagelimit)
           else
             dop = &dops[t];
         }
-        if ((dop && is_ld_use_hazard(dops[i].rt1, dop))
+        if ((dop && is_ld_use_hazard(&dops[i], dop))
             || (!dop && Config.PreciseExceptions)) {
           // jump target wants DS result - potential load delay effect
           SysPrintf("load delay in DS @%08x (%08x)\n", start + i*4, start);
@@ -6922,7 +6953,7 @@ static noinline void pass1_disassemble(u_int pagelimit)
       }
     }
     else if (i > 0 && dops[i-1].is_delay_load
-             && is_ld_use_hazard(dops[i-1].rt1, &dops[i])
+             && is_ld_use_hazard(&dops[i-1], &dops[i])
              && (i < 2 || !dops[i-2].is_ujump)) {
       SysPrintf("load delay @%08x (%08x)\n", start + i*4, start);
       for (j = i - 1; j > 0 && dops[j-1].is_delay_load; j--)
@@ -8943,13 +8974,13 @@ static int new_recompile_block(u_int addr)
     return 0;
   }
 
-  cycle_multiplier_active = Config.cycle_multiplier_override && Config.cycle_multiplier == CYCLE_MULT_DEFAULT
-    ? Config.cycle_multiplier_override : Config.cycle_multiplier;
+  cycle_multiplier_active = get_cycle_multiplier();
 
   source = get_source_start(start, &pagelimit);
   if (source == NULL) {
     if (addr != hack_addr) {
-      SysPrintf("Compile at bogus memory address: %08x\n", addr);
+      SysPrintf("Compile at bogus memory address: %08x, ra=%x\n",
+        addr, psxRegs.GPR.n.ra);
       hack_addr = addr;
     }
     //abort();
@@ -9114,6 +9145,7 @@ static int new_recompile_block(u_int addr)
 
       ds = assemble(i, &regs[i], cinfo[i].ccadj);
 
+      drc_dbg_emit_wb_dirtys(i, &regs[i]);
       if (dops[i].is_ujump)
         literal_pool(1024);
       else