X-Git-Url: https://notaz.gp2x.de/cgi-bin/gitweb.cgi?a=blobdiff_plain;f=libpcsxcore%2Fnew_dynarec%2Fnew_dynarec.c;h=6f7c5673785dd63e1638f30794b4a0b26deb752e;hb=2002a1dbd97bc1b94b12ec3e90702a770b040858;hp=fb42a90a721a2e02d4e371a86182b8a50a872823;hpb=3d624f890e4350179851e958fe071b2fd7a56bec;p=pcsx_rearmed.git diff --git a/libpcsxcore/new_dynarec/new_dynarec.c b/libpcsxcore/new_dynarec/new_dynarec.c index fb42a90a..6f7c5673 100644 --- a/libpcsxcore/new_dynarec/new_dynarec.c +++ b/libpcsxcore/new_dynarec/new_dynarec.c @@ -1133,12 +1133,14 @@ void invalidate_block(u_int block) if((((end-1-(u_int)rdram)>>12)&2047)>last) last=((end-1-(u_int)rdram)>>12)&2047; } } +#ifndef DISABLE_TLB if(page<2048&&(signed int)start>=(signed int)0xC0000000&&(signed int)end>=(signed int)0xC0000000) { if(((start+memory_map[start>>12]-(u_int)rdram)>>12)<=page&&((end-1+memory_map[(end-1)>>12]-(u_int)rdram)>>12)>=page) { if((((start+memory_map[start>>12]-(u_int)rdram)>>12)&2047)>12]-(u_int)rdram)>>12)&2047; if((((end-1+memory_map[(end-1)>>12]-(u_int)rdram)>>12)&2047)>last) last=((end-1+memory_map[(end-1)>>12]-(u_int)rdram)>>12)&2047; } } +#endif } head=head->next; } @@ -1928,10 +1930,12 @@ void wb_register(signed char r,signed char regmap[],uint64_t dirty,uint64_t is32 if((dirty>>hr)&1) { if(regmap[hr]<64) { emit_storereg(r,hr); +#ifndef FORCE32 if((is32>>regmap[hr])&1) { emit_sarimm(hr,31,hr); emit_storereg(r|64,hr); } +#endif }else{ emit_storereg(r|64,hr); } @@ -2744,8 +2748,13 @@ void load_assemble(int i,struct regstat *i_regs) //gen_tlb_addr_r(tl,map); //emit_movsbl_indexed((int)rdram-0x80000000,tl,tl); int x=0; +#ifdef BIG_ENDIAN_MIPS if(!c) emit_xorimm(addr,3,tl); else x=((constmap[i][s]+offset)^3)-(constmap[i][s]+offset); +#else + if(c) x=(constmap[i][s]+offset)-(constmap[i][s]+offset); + else if (tl!=addr) emit_mov(addr,tl); +#endif emit_movsbl_indexed_tlb(x,tl,map,tl); } if(jaddr) @@ -2763,8 +2772,13 @@ void load_assemble(int i,struct regstat *i_regs) #endif { int x=0; +#ifdef BIG_ENDIAN_MIPS if(!c) emit_xorimm(addr,2,tl); else x=((constmap[i][s]+offset)^2)-(constmap[i][s]+offset); +#else + if(c) x=(constmap[i][s]+offset)-(constmap[i][s]+offset); + else if (tl!=addr) emit_mov(addr,tl); +#endif //#ifdef //emit_movswl_indexed_tlb(x,tl,map,tl); //else @@ -2807,8 +2821,13 @@ void load_assemble(int i,struct regstat *i_regs) //gen_tlb_addr_r(tl,map); //emit_movzbl_indexed((int)rdram-0x80000000,tl,tl); int x=0; +#ifdef BIG_ENDIAN_MIPS if(!c) emit_xorimm(addr,3,tl); else x=((constmap[i][s]+offset)^3)-(constmap[i][s]+offset); +#else + if(c) x=(constmap[i][s]+offset)-(constmap[i][s]+offset); + else if (tl!=addr) emit_mov(addr,tl); +#endif emit_movzbl_indexed_tlb(x,tl,map,tl); } if(jaddr) @@ -2826,8 +2845,13 @@ void load_assemble(int i,struct regstat *i_regs) #endif { int x=0; +#ifdef BIG_ENDIAN_MIPS if(!c) emit_xorimm(addr,2,tl); else x=((constmap[i][s]+offset)^2)-(constmap[i][s]+offset); +#else + if(c) x=(constmap[i][s]+offset)-(constmap[i][s]+offset); + else if (tl!=addr) emit_mov(addr,tl); +#endif //#ifdef //emit_movzwl_indexed_tlb(x,tl,map,tl); //#else @@ -2984,8 +3008,13 @@ void store_assemble(int i,struct regstat *i_regs) if (opcode[i]==0x28) { // SB if(!c||memtarget) { int x=0; +#ifdef BIG_ENDIAN_MIPS if(!c) emit_xorimm(addr,3,temp); else x=((constmap[i][s]+offset)^3)-(constmap[i][s]+offset); +#else + if(c) x=(constmap[i][s]+offset)-(constmap[i][s]+offset); + else if (addr!=temp) emit_mov(addr,temp); +#endif //gen_tlb_addr_w(temp,map); //emit_writebyte_indexed(tl,(int)rdram-0x80000000,temp); emit_writebyte_indexed_tlb(tl,x,temp,map,temp); @@ -2995,8 +3024,13 @@ void store_assemble(int i,struct regstat *i_regs) if (opcode[i]==0x29) { // SH if(!c||memtarget) { int x=0; +#ifdef BIG_ENDIAN_MIPS if(!c) emit_xorimm(addr,2,temp); else x=((constmap[i][s]+offset)^2)-(constmap[i][s]+offset); +#else + if(c) x=(constmap[i][s]+offset)-(constmap[i][s]+offset); + else if (addr!=temp) emit_mov(addr,temp); +#endif //#ifdef //emit_writehword_indexed_tlb(tl,x,temp,map,temp); //#else @@ -3146,6 +3180,9 @@ void storelr_assemble(int i,struct regstat *i_regs) if(!rs2[i]) temp2=th=tl; } +#ifndef BIG_ENDIAN_MIPS + emit_xorimm(temp,3,temp); +#endif emit_testimm(temp,2); case2=(int)out; emit_jne(0); @@ -4048,6 +4085,7 @@ void wb_dirtys(signed char i_regmap[],uint64_t i_is32,uint64_t i_dirty) if((i_dirty>>hr)&1) { if(i_regmap[hr]<64) { emit_storereg(i_regmap[hr],hr); +#ifndef FORCE32 if( ((i_is32>>i_regmap[hr])&1) ) { #ifdef DESTRUCTIVE_WRITEBACK emit_sarimm(hr,31,hr); @@ -4057,6 +4095,7 @@ void wb_dirtys(signed char i_regmap[],uint64_t i_is32,uint64_t i_dirty) emit_storereg(i_regmap[hr]|64,HOST_TEMPREG); #endif } +#endif }else{ if( !((i_is32>>(i_regmap[hr]&63))&1) ) { emit_storereg(i_regmap[hr],hr); @@ -4082,6 +4121,7 @@ void wb_needed_dirtys(signed char i_regmap[],uint64_t i_is32,uint64_t i_dirty,in if((i_dirty>>hr)&1) { if(i_regmap[hr]<64) { emit_storereg(i_regmap[hr],hr); +#ifndef FORCE32 if( ((i_is32>>i_regmap[hr])&1) ) { #ifdef DESTRUCTIVE_WRITEBACK emit_sarimm(hr,31,hr); @@ -4091,6 +4131,7 @@ void wb_needed_dirtys(signed char i_regmap[],uint64_t i_is32,uint64_t i_dirty,in emit_storereg(i_regmap[hr]|64,HOST_TEMPREG); #endif } +#endif }else{ if( !((i_is32>>(i_regmap[hr]&63))&1) ) { emit_storereg(i_regmap[hr],hr); @@ -6504,6 +6545,9 @@ void unneeded_registers(int istart,int iend,int r) // Save it unneeded_reg[i]=u; unneeded_reg_upper[i]=uu; +#ifdef FORCE32 + unneeded_reg_upper[i]=-1LL; +#endif /* printf("ur (%d,%d) %x: ",istart,iend,start+i*4); printf("U:"); @@ -7414,32 +7458,44 @@ void new_dynarec_init() memory_map[n]=((u_int)rdram-0x80000000)>>2; for(n=526336;n<1048576;n++) // 0x80800000 .. 0xFFFFFFFF memory_map[n]=-1; +#ifdef MUPEN64 for(n=0;n<0x8000;n++) { // 0 .. 0x7FFFFFFF writemem[n] = write_nomem_new; writememb[n] = write_nomemb_new; writememh[n] = write_nomemh_new; +#ifndef FORCE32 writememd[n] = write_nomemd_new; +#endif readmem[n] = read_nomem_new; readmemb[n] = read_nomemb_new; readmemh[n] = read_nomemh_new; +#ifndef FORCE32 readmemd[n] = read_nomemd_new; +#endif } for(n=0x8000;n<0x8080;n++) { // 0x80000000 .. 0x807FFFFF writemem[n] = write_rdram_new; writememb[n] = write_rdramb_new; writememh[n] = write_rdramh_new; +#ifndef FORCE32 writememd[n] = write_rdramd_new; +#endif } for(n=0xC000;n<0x10000;n++) { // 0xC0000000 .. 0xFFFFFFFF writemem[n] = write_nomem_new; writememb[n] = write_nomemb_new; writememh[n] = write_nomemh_new; +#ifndef FORCE32 writememd[n] = write_nomemd_new; +#endif readmem[n] = read_nomem_new; readmemb[n] = read_nomemb_new; readmemh[n] = read_nomemh_new; +#ifndef FORCE32 readmemd[n] = read_nomemd_new; +#endif } +#endif tlb_hacks(); arch_init(); } @@ -7490,6 +7546,7 @@ int new_recompile_block(int addr) source = (u_int *)((u_int)rdram+start-0x80000000); pagelimit = 0x80800000; } +#ifndef DISABLE_TLB else if ((signed int)addr >= (signed int)0xC0000000) { //printf("addr=%x mm=%x\n",(u_int)addr,(memory_map[start>>12]<<2)); //if(tlb_LUT_r[start>>12]) @@ -7513,6 +7570,7 @@ int new_recompile_block(int addr) } //printf("source= %x\n",(int)source); } +#endif else { printf("Compile at bogus memory address: %x \n", (int)addr); exit(1); @@ -7800,7 +7858,9 @@ int new_recompile_block(int addr) case 0x3C: strcpy(insn[i],"SCD"); type=NI; break; case 0x3D: strcpy(insn[i],"SDC1"); type=C1LS; break; case 0x3F: strcpy(insn[i],"SD"); type=STORE; break; - default: strcpy(insn[i],"???"); type=NI; break; + default: strcpy(insn[i],"???"); type=NI; + assem_debug("NI %08x @%08x\n", source[i], addr + i*4); + break; } itype[i]=type; opcode2[i]=op2; @@ -8161,6 +8221,11 @@ int new_recompile_block(int addr) current.is32=temp_is32; } } +#ifdef FORCE32 + memset(p32, 0xff, sizeof(p32)); + current.is32=-1LL; +#endif + memcpy(regmap_pre[i],current.regmap,sizeof(current.regmap)); regs[i].wasconst=current.isconst; regs[i].was32=current.is32; @@ -9927,6 +9992,7 @@ int new_recompile_block(int addr) else printf(" r%d",r); } } +#ifndef FORCE32 printf(" UU:"); for(r=1;r<=CCREG;r++) { if(((unneeded_reg_upper[i]&~unneeded_reg[i])>>r)&1) { @@ -9945,6 +10011,7 @@ int new_recompile_block(int addr) else printf(" r%d",r); } } +#endif printf("\n"); #if defined(__i386__) || defined(__x86_64__) printf("pre: eax=%d ecx=%d edx=%d ebx=%d ebp=%d esi=%d edi=%d\n",regmap_pre[i][0],regmap_pre[i][1],regmap_pre[i][2],regmap_pre[i][3],regmap_pre[i][5],regmap_pre[i][6],regmap_pre[i][7]); @@ -10066,6 +10133,7 @@ int new_recompile_block(int addr) #endif printf("\n"); } +#ifndef FORCE32 printf(" 32:"); for(r=0;r<=CCREG;r++) { if((regs[i].is32>>r)&1) { @@ -10076,6 +10144,7 @@ int new_recompile_block(int addr) } } printf("\n"); +#endif /*printf(" p32:"); for(r=0;r<=CCREG;r++) { if((p32[i]>>r)&1) { @@ -10113,6 +10182,7 @@ int new_recompile_block(int addr) if((branch_regs[i].dirty>>10)&1) printf("r10 "); if((branch_regs[i].dirty>>12)&1) printf("r12 "); #endif +#ifndef FORCE32 printf(" 32:"); for(r=0;r<=CCREG;r++) { if((branch_regs[i].is32>>r)&1) { @@ -10123,6 +10193,7 @@ int new_recompile_block(int addr) } } printf("\n"); +#endif } } @@ -10425,6 +10496,7 @@ int new_recompile_block(int addr) // Trap writes to any of the pages we compiled for(i=start>>12;i<=(start+slen*4)>>12;i++) { invalid_code[i]=0; +#ifndef DISABLE_TLB memory_map[i]|=0x40000000; if((signed int)start>=(signed int)0xC0000000) { assert(using_tlb); @@ -10433,6 +10505,7 @@ int new_recompile_block(int addr) memory_map[j]|=0x40000000; //printf("write protect physical page: %x (virtual %x)\n",j<<12,start); } +#endif } /* Pass 10 - Free memory by expiring oldest blocks */