X-Git-Url: https://notaz.gp2x.de/cgi-bin/gitweb.cgi?a=blobdiff_plain;f=libpcsxcore%2Fnew_dynarec%2Fnew_dynarec.c;h=93319ec0275e8ffbe0e6e3d980f06cf8120c74ed;hb=398d69247112982aa5ddb91bf0fa2a435c6e008c;hp=9913b1160f1e3834f7b1160537309365a98dd611;hpb=4149788d40b6d55eb0d612f7068d2904ad3e5aa3;p=pcsx_rearmed.git

diff --git a/libpcsxcore/new_dynarec/new_dynarec.c b/libpcsxcore/new_dynarec/new_dynarec.c
index 9913b116..93319ec0 100644
--- a/libpcsxcore/new_dynarec/new_dynarec.c
+++ b/libpcsxcore/new_dynarec/new_dynarec.c
@@ -191,11 +191,11 @@ static struct decoded_insn
 } dops[MAXBLOCK];
 
   // used by asm:
-  u_char *out;
   struct ht_entry hash_table[65536]  __attribute__((aligned(16)));
   struct ll_entry *jump_in[4096] __attribute__((aligned(16)));
-  struct ll_entry *jump_dirty[4096];
 
+  static u_char *out;
+  static struct ll_entry *jump_dirty[4096];
   static struct ll_entry *jump_out[4096];
   static u_int start;
   static u_int *source;
@@ -220,9 +220,6 @@ static struct decoded_insn
   static struct regstat regs[MAXBLOCK];
   static struct regstat branch_regs[MAXBLOCK];
   static signed char minimum_free_regs[MAXBLOCK];
-  static u_int needed_reg[MAXBLOCK];
-  static u_int wont_dirty[MAXBLOCK];
-  static u_int will_dirty[MAXBLOCK];
   static int ccadj[MAXBLOCK];
   static int slen;
   static void *instr_addr[MAXBLOCK];
@@ -253,7 +250,6 @@ static struct decoded_insn
   extern int branch_target;
   extern uintptr_t ram_offset;
   extern uintptr_t mini_ht[32][2];
-  extern u_char restore_candidate[512];
 
   /* registers that may be allocated */
   /* 1-31 gpr */
@@ -339,10 +335,13 @@ void jump_break   (u_int u0, u_int u1, u_int pc);
 void jump_break_ds(u_int u0, u_int u1, u_int pc);
 void jump_to_new_pc();
 void call_gteStall();
-void clean_blocks(u_int page);
 void add_jump_out(u_int vaddr, void *src);
 void new_dyna_leave();
 
+static void *get_clean_addr(void *addr);
+static void get_bounds(void *addr, u_char **start, u_char **end);
+static void ll_add_flags(struct ll_entry **head,int vaddr,u_int reg_sv_flags,void *addr);
+
 // Needed by assembler
 static void wb_register(signed char r, const signed char regmap[], uint64_t dirty);
 static void wb_dirtys(const signed char i_regmap[], uint64_t i_dirty);
@@ -534,6 +533,21 @@ static void hash_table_add(struct ht_entry *ht_bin, u_int vaddr, void *tcaddr)
   ht_bin->tcaddr[0] = tcaddr;
 }
 
+static void mark_valid_code(u_int vaddr, u_int len)
+{
+  u_int i, j;
+  vaddr &= 0x1fffffff;
+  for (i = vaddr & ~0xfff; i < vaddr + len; i += 0x1000) {
+    // ram mirrors, but should not hurt bios
+    for (j = 0; j < 0x800000; j += 0x200000) {
+      invalid_code[(i|j) >> 12] =
+      invalid_code[(i|j|0x80000000u) >> 12] =
+      invalid_code[(i|j|0xa0000000u) >> 12] = 0;
+    }
+  }
+  inv_code_start = inv_code_end = ~0;
+}
+
 // some messy ari64's code, seems to rely on unsigned 32bit overflow
 static int doesnt_expire_soon(void *tcaddr)
 {
@@ -541,51 +555,69 @@ static int doesnt_expire_soon(void *tcaddr)
   return diff > (u_int)(0x60000000 + (MAX_OUTPUT_BLOCK_SIZE << (32-TARGET_SIZE_2)));
 }
 
+void *ndrc_try_restore_block(u_int vaddr)
+{
+  u_int page = get_page(vaddr);
+  struct ll_entry *head;
+
+  for (head = jump_dirty[page]; head != NULL; head = head->next)
+  {
+    if (head->vaddr != vaddr)
+      continue;
+    // don't restore blocks which are about to expire from the cache
+    if (!doesnt_expire_soon(head->addr))
+      continue;
+    if (!verify_dirty(head->addr))
+      continue;
+
+    // restore
+    u_char *start, *end;
+    get_bounds(head->addr, &start, &end);
+    mark_valid_code(vaddr, end - start);
+
+    void *clean_addr = get_clean_addr(head->addr);
+    ll_add_flags(jump_in + page, vaddr, head->reg_sv_flags, clean_addr);
+
+    struct ht_entry *ht_bin = hash_table_get(vaddr);
+    int in_ht = 0;
+    if (ht_bin->vaddr[0] == vaddr) {
+      ht_bin->tcaddr[0] = clean_addr; // Replace existing entry
+      in_ht = 1;
+    }
+    if (ht_bin->vaddr[1] == vaddr) {
+      ht_bin->tcaddr[1] = clean_addr; // Replace existing entry
+      in_ht = 1;
+    }
+    if (!in_ht)
+      hash_table_add(ht_bin, vaddr, clean_addr);
+    inv_debug("INV: Restored %08x (%p/%p)\n", head->vaddr, head->addr, clean_addr);
+    return clean_addr;
+  }
+  return NULL;
+}
+
 // Get address from virtual address
 // This is called from the recompiled JR/JALR instructions
 void noinline *get_addr(u_int vaddr)
 {
-  u_int page=get_page(vaddr);
-  u_int vpage=get_vpage(vaddr);
+  u_int page = get_page(vaddr);
   struct ll_entry *head;
-  //printf("TRACE: count=%d next=%d (get_addr %x,page %d)\n",Count,next_interupt,vaddr,page);
-  head=jump_in[page];
-  while(head!=NULL) {
-    if(head->vaddr==vaddr) {
-  //printf("TRACE: count=%d next=%d (get_addr match %x: %p)\n",Count,next_interupt,vaddr,head->addr);
+  void *code;
+
+  for (head = jump_in[page]; head != NULL; head = head->next) {
+    if (head->vaddr == vaddr) {
       hash_table_add(hash_table_get(vaddr), vaddr, head->addr);
       return head->addr;
     }
-    head=head->next;
   }
-  head=jump_dirty[vpage];
-  while(head!=NULL) {
-    if(head->vaddr==vaddr) {
-      //printf("TRACE: count=%d next=%d (get_addr match dirty %x: %p)\n",Count,next_interupt,vaddr,head->addr);
-      // Don't restore blocks which are about to expire from the cache
-      if (doesnt_expire_soon(head->addr))
-      if (verify_dirty(head->addr)) {
-        //printf("restore candidate: %x (%d) d=%d\n",vaddr,page,invalid_code[vaddr>>12]);
-        invalid_code[vaddr>>12]=0;
-        inv_code_start=inv_code_end=~0;
-        if(vpage<2048) {
-          restore_candidate[vpage>>3]|=1<<(vpage&7);
-        }
-        else restore_candidate[page>>3]|=1<<(page&7);
-        struct ht_entry *ht_bin = hash_table_get(vaddr);
-        if (ht_bin->vaddr[0] == vaddr)
-          ht_bin->tcaddr[0] = head->addr; // Replace existing entry
-        else
-          hash_table_add(ht_bin, vaddr, head->addr);
+  code = ndrc_try_restore_block(vaddr);
+  if (code)
+    return code;
+
+  int r = new_recompile_block(vaddr);
+  if (r == 0)
+    return get_addr(vaddr);
 
-        return head->addr;
-      }
-    }
-    head=head->next;
-  }
-  //printf("TRACE: count=%d next=%d (get_addr no-match %x)\n",Count,next_interupt,vaddr);
-  int r=new_recompile_block(vaddr);
-  if(r==0) return get_addr(vaddr);
   // generate an address error
   Status|=2;
   Cause=(vaddr<<31)|(4<<2);
@@ -608,6 +640,8 @@ static void clear_all_regs(signed char regmap[])
   memset(regmap, -1, sizeof(regmap[0]) * HOST_REGS);
 }
 
+// get_reg: get allocated host reg from mips reg
+// returns -1 if no such mips reg was allocated
 #if defined(__arm__) && defined(HAVE_ARMV6) && HOST_REGS == 13 && EXCLUDE_REG == 11
 
 extern signed char get_reg(const signed char regmap[], signed char r);
@@ -628,6 +662,12 @@ static signed char get_reg(const signed char regmap[], signed char r)
 
 #endif
 
+// get reg as mask bit (1 << hr)
+static u_int get_regm(const signed char regmap[], signed char r)
+{
+  return (1u << (get_reg(regmap, r) & 31)) & ~(1u << 31);
+}
+
 static signed char get_reg_temp(const signed char regmap[])
 {
   int hr;
@@ -986,7 +1026,6 @@ static const struct {
   FUNCNAME(jump_syscall),
   FUNCNAME(jump_syscall_ds),
   FUNCNAME(call_gteStall),
-  FUNCNAME(clean_blocks),
   FUNCNAME(new_dyna_leave),
   FUNCNAME(pcsx_mtc0),
   FUNCNAME(pcsx_mtc0_ds),
@@ -1347,11 +1386,6 @@ void invalidate_all_pages(void)
   u_int page;
   for(page=0;page<4096;page++)
     invalidate_page(page);
-  for(page=0;page<1048576;page++)
-    if(!invalid_code[page]) {
-      restore_candidate[(page&2047)>>3]|=1<<(page&7);
-      restore_candidate[((page&2047)>>3)+256]|=1<<(page&7);
-    }
   #ifdef USE_MINI_HT
   memset(mini_ht,-1,sizeof(mini_ht));
   #endif
@@ -1381,55 +1415,6 @@ void add_jump_out(u_int vaddr,void *src)
   //inv_debug("add_jump_out:  to %p\n",get_pointer(src));
 }
 
-// If a code block was found to be unmodified (bit was set in
-// restore_candidate) and it remains unmodified (bit is clear
-// in invalid_code) then move the entries for that 4K page from
-// the dirty list to the clean list.
-void clean_blocks(u_int page)
-{
-  struct ll_entry *head;
-  inv_debug("INV: clean_blocks page=%d\n",page);
-  head=jump_dirty[page];
-  while(head!=NULL) {
-    if(!invalid_code[head->vaddr>>12]) {
-      // Don't restore blocks which are about to expire from the cache
-      if (doesnt_expire_soon(head->addr)) {
-        if(verify_dirty(head->addr)) {
-          u_char *start, *end;
-          //printf("Possibly Restore %x (%p)\n",head->vaddr, head->addr);
-          u_int i;
-          u_int inv=0;
-          get_bounds(head->addr, &start, &end);
-          if (start - rdram < RAM_SIZE) {
-            for (i = (start-rdram+0x80000000)>>12; i <= (end-1-rdram+0x80000000)>>12; i++) {
-              inv|=invalid_code[i];
-            }
-          }
-          else if((signed int)head->vaddr>=(signed int)0x80000000+RAM_SIZE) {
-            inv=1;
-          }
-          if(!inv) {
-            void *clean_addr = get_clean_addr(head->addr);
-            if (doesnt_expire_soon(clean_addr)) {
-              u_int ppage=page;
-              inv_debug("INV: Restored %x (%p/%p)\n",head->vaddr, head->addr, clean_addr);
-              //printf("page=%x, addr=%x\n",page,head->vaddr);
-              //assert(head->vaddr>>12==(page|0x80000));
-              ll_add_flags(jump_in+ppage,head->vaddr,head->reg_sv_flags,clean_addr);
-              struct ht_entry *ht_bin = hash_table_get(head->vaddr);
-              if (ht_bin->vaddr[0] == head->vaddr)
-                ht_bin->tcaddr[0] = clean_addr; // Replace existing entry
-              if (ht_bin->vaddr[1] == head->vaddr)
-                ht_bin->tcaddr[1] = clean_addr; // Replace existing entry
-            }
-          }
-        }
-      }
-    }
-    head=head->next;
-  }
-}
-
 /* Register allocation */
 
 // Note: registers are allocated clean (unmodified state)
@@ -1442,15 +1427,14 @@ static void alloc_reg(struct regstat *cur,int i,signed char reg)
   if (reg == CCREG) preferred_reg = HOST_CCREG;
   if (reg == PTEMP || reg == FTEMP) preferred_reg = 12;
   assert(PREFERRED_REG_FIRST != EXCLUDE_REG && EXCLUDE_REG != HOST_REGS);
+  assert(reg >= 0);
 
   // Don't allocate unused registers
   if((cur->u>>reg)&1) return;
 
   // see if it's already allocated
-  for(hr=0;hr<HOST_REGS;hr++)
-  {
-    if(cur->regmap[hr]==reg) return;
-  }
+  if (get_reg(cur->regmap, reg) >= 0)
+    return;
 
   // Keep the same mapping if the register was already allocated in a loop
   preferred_reg = loop_reg(i,reg,preferred_reg);
@@ -2193,23 +2177,13 @@ static void wb_register(signed char r, const signed char regmap[], uint64_t dirt
 static void wb_valid(signed char pre[],signed char entry[],u_int dirty_pre,u_int dirty,uint64_t u)
 {
   //if(dirty_pre==dirty) return;
-  int hr,reg;
-  for(hr=0;hr<HOST_REGS;hr++) {
-    if(hr!=EXCLUDE_REG) {
-      reg=pre[hr];
-      if(((~u)>>reg)&1) {
-        if(reg>0) {
-          if(((dirty_pre&~dirty)>>hr)&1) {
-            if(reg>0&&reg<34) {
-              emit_storereg(reg,hr);
-            }
-            else if(reg>=64) {
-              assert(0);
-            }
-          }
-        }
-      }
-    }
+  int hr, r;
+  for (hr = 0; hr < HOST_REGS; hr++) {
+    r = pre[hr];
+    if (r < 1 || r > 33 || ((u >> r) & 1))
+      continue;
+    if (((dirty_pre & ~dirty) >> hr) & 1)
+      emit_storereg(r, hr);
   }
 }
 
@@ -4279,26 +4253,18 @@ static void wb_invalidate(signed char pre[],signed char entry[],uint64_t dirty,u
 // Load the specified registers
 // This only loads the registers given as arguments because
 // we don't want to load things that will be overwritten
-static void load_regs(signed char entry[],signed char regmap[],int rs1,int rs2)
+static inline void load_reg(signed char entry[], signed char regmap[], int rs)
 {
-  int hr;
-  // Load 32-bit regs
-  for(hr=0;hr<HOST_REGS;hr++) {
-    if(hr!=EXCLUDE_REG&&regmap[hr]>=0) {
-      if(entry[hr]!=regmap[hr]) {
-        if(regmap[hr]==rs1||regmap[hr]==rs2)
-        {
-          if(regmap[hr]==0) {
-            emit_zeroreg(hr);
-          }
-          else
-          {
-            emit_loadreg(regmap[hr],hr);
-          }
-        }
-      }
-    }
-  }
+  int hr = get_reg(regmap, rs);
+  if (hr >= 0 && entry[hr] != regmap[hr])
+    emit_loadreg(regmap[hr], hr);
+}
+
+static void load_regs(signed char entry[], signed char regmap[], int rs1, int rs2)
+{
+  load_reg(entry, regmap, rs1);
+  if (rs1 != rs2)
+    load_reg(entry, regmap, rs2);
 }
 
 // Load registers prior to the start of a loop
@@ -4306,27 +4272,12 @@ static void load_regs(signed char entry[],signed char regmap[],int rs1,int rs2)
 static void loop_preload(signed char pre[],signed char entry[])
 {
   int hr;
-  for(hr=0;hr<HOST_REGS;hr++) {
-    if(hr!=EXCLUDE_REG) {
-      if(pre[hr]!=entry[hr]) {
-        if(entry[hr]>=0) {
-          if(get_reg(pre,entry[hr])<0) {
-            assem_debug("loop preload:\n");
-            //printf("loop preload: %d\n",hr);
-            if(entry[hr]==0) {
-              emit_zeroreg(hr);
-            }
-            else if(entry[hr]<TEMPREG)
-            {
-              emit_loadreg(entry[hr],hr);
-            }
-            else if(entry[hr]-64<TEMPREG)
-            {
-              emit_loadreg(entry[hr],hr);
-            }
-          }
-        }
-      }
+  for (hr = 0; hr < HOST_REGS; hr++) {
+    int r = entry[hr];
+    if (r >= 0 && pre[hr] != r && get_reg(pre, r) < 0) {
+      assem_debug("loop preload:\n");
+      if (r < TEMPREG)
+        emit_loadreg(r, hr);
     }
   }
 }
@@ -4846,9 +4797,9 @@ static void ds_assemble_entry(int i)
   load_regs(regs[t].regmap_entry,regs[t].regmap,dops[t].rs1,dops[t].rs2);
   address_generation(t,&regs[t],regs[t].regmap_entry);
   if (ram_offset && (dops[t].is_load || dops[t].is_store))
-    load_regs(regs[t].regmap_entry,regs[t].regmap,ROREG,ROREG);
+    load_reg(regs[t].regmap_entry,regs[t].regmap,ROREG);
   if (dops[t].is_store)
-    load_regs(regs[t].regmap_entry,regs[t].regmap,INVCP,INVCP);
+    load_reg(regs[t].regmap_entry,regs[t].regmap,INVCP);
   is_delayslot=0;
   switch (dops[t].itype) {
     case SYSCALL:
@@ -5223,7 +5174,7 @@ static void ujump_assemble(int i, const struct regstat *i_regs)
   uint64_t bc_unneeded=branch_regs[i].u;
   bc_unneeded|=1|(1LL<<dops[i].rt1);
   wb_invalidate(regs[i].regmap,branch_regs[i].regmap,regs[i].dirty,bc_unneeded);
-  load_regs(regs[i].regmap,branch_regs[i].regmap,CCREG,CCREG);
+  load_reg(regs[i].regmap,branch_regs[i].regmap,CCREG);
   if(!ra_done&&dops[i].rt1==31)
     ujump_assemble_write_ra(i);
   int cc,adj;
@@ -5425,7 +5376,7 @@ static void cjump_assemble(int i, const struct regstat *i_regs)
     bc_unneeded|=1;
     wb_invalidate(regs[i].regmap,branch_regs[i].regmap,regs[i].dirty,bc_unneeded);
     load_regs(regs[i].regmap,branch_regs[i].regmap,dops[i].rs1,dops[i].rs2);
-    load_regs(regs[i].regmap,branch_regs[i].regmap,CCREG,CCREG);
+    load_reg(regs[i].regmap,branch_regs[i].regmap,CCREG);
     cc=get_reg(branch_regs[i].regmap,CCREG);
     assert(cc==HOST_CCREG);
     if(unconditional)
@@ -5598,7 +5549,7 @@ static void cjump_assemble(int i, const struct regstat *i_regs)
       load_regs(regs[i].regmap,branch_regs[i].regmap,dops[i+1].rs1,dops[i+1].rs2);
       address_generation(i+1,&branch_regs[i],0);
       if (ram_offset)
-        load_regs(regs[i].regmap,branch_regs[i].regmap,ROREG,ROREG);
+        load_reg(regs[i].regmap,branch_regs[i].regmap,ROREG);
       load_regs(regs[i].regmap,branch_regs[i].regmap,CCREG,INVCP);
       ds_assemble(i+1,&branch_regs[i]);
       cc=get_reg(branch_regs[i].regmap,CCREG);
@@ -5634,7 +5585,7 @@ static void cjump_assemble(int i, const struct regstat *i_regs)
       load_regs(regs[i].regmap,branch_regs[i].regmap,dops[i+1].rs1,dops[i+1].rs2);
       address_generation(i+1,&branch_regs[i],0);
       if (ram_offset)
-        load_regs(regs[i].regmap,branch_regs[i].regmap,ROREG,ROREG);
+        load_reg(regs[i].regmap,branch_regs[i].regmap,ROREG);
       load_regs(regs[i].regmap,branch_regs[i].regmap,CCREG,INVCP);
       ds_assemble(i+1,&branch_regs[i]);
       cc=get_reg(branch_regs[i].regmap,CCREG);
@@ -5710,7 +5661,7 @@ static void sjump_assemble(int i, const struct regstat *i_regs)
     bc_unneeded|=1;
     wb_invalidate(regs[i].regmap,branch_regs[i].regmap,regs[i].dirty,bc_unneeded);
     load_regs(regs[i].regmap,branch_regs[i].regmap,dops[i].rs1,dops[i].rs1);
-    load_regs(regs[i].regmap,branch_regs[i].regmap,CCREG,CCREG);
+    load_reg(regs[i].regmap,branch_regs[i].regmap,CCREG);
     if(dops[i].rt1==31) {
       int rt,return_address;
       rt=get_reg(branch_regs[i].regmap,31);
@@ -5869,7 +5820,7 @@ static void sjump_assemble(int i, const struct regstat *i_regs)
       load_regs(regs[i].regmap,branch_regs[i].regmap,dops[i+1].rs1,dops[i+1].rs2);
       address_generation(i+1,&branch_regs[i],0);
       if (ram_offset)
-        load_regs(regs[i].regmap,branch_regs[i].regmap,ROREG,ROREG);
+        load_reg(regs[i].regmap,branch_regs[i].regmap,ROREG);
       load_regs(regs[i].regmap,branch_regs[i].regmap,CCREG,INVCP);
       ds_assemble(i+1,&branch_regs[i]);
       cc=get_reg(branch_regs[i].regmap,CCREG);
@@ -5903,7 +5854,7 @@ static void sjump_assemble(int i, const struct regstat *i_regs)
       load_regs(regs[i].regmap,branch_regs[i].regmap,dops[i+1].rs1,dops[i+1].rs2);
       address_generation(i+1,&branch_regs[i],0);
       if (ram_offset)
-        load_regs(regs[i].regmap,branch_regs[i].regmap,ROREG,ROREG);
+        load_reg(regs[i].regmap,branch_regs[i].regmap,ROREG);
       load_regs(regs[i].regmap,branch_regs[i].regmap,CCREG,INVCP);
       ds_assemble(i+1,&branch_regs[i]);
       cc=get_reg(branch_regs[i].regmap,CCREG);
@@ -5984,7 +5935,7 @@ static void pagespan_assemble(int i, const struct regstat *i_regs)
   }
   assert(hr<HOST_REGS);
   if((dops[i].opcode&0x2e)==4||dops[i].opcode==0x11) { // BEQ/BNE/BEQL/BNEL/BC1
-    load_regs(regs[i].regmap_entry,regs[i].regmap,CCREG,CCREG);
+    load_reg(regs[i].regmap_entry,regs[i].regmap,CCREG);
   }
   emit_addimm(HOST_CCREG, ccadj[i] + CLOCK_ADJUST(2), HOST_CCREG);
   if(dops[i].opcode==2) // J
@@ -6151,9 +6102,9 @@ static void pagespan_ds()
   load_regs(regs[0].regmap_entry,regs[0].regmap,dops[0].rs1,dops[0].rs2);
   address_generation(0,&regs[0],regs[0].regmap_entry);
   if (ram_offset && (dops[0].is_load || dops[0].is_store))
-    load_regs(regs[0].regmap_entry,regs[0].regmap,ROREG,ROREG);
+    load_reg(regs[0].regmap_entry,regs[0].regmap,ROREG);
   if (dops[0].is_store)
-    load_regs(regs[0].regmap_entry,regs[0].regmap,INVCP,INVCP);
+    load_reg(regs[0].regmap_entry,regs[0].regmap,INVCP);
   is_delayslot=0;
   switch (dops[0].itype) {
     case SYSCALL:
@@ -6376,7 +6327,6 @@ void new_dynarec_clear_full(void)
   memset(invalid_code,1,sizeof(invalid_code));
   memset(hash_table,0xff,sizeof(hash_table));
   memset(mini_ht,-1,sizeof(mini_ht));
-  memset(restore_candidate,0,sizeof(restore_candidate));
   memset(shadow,0,sizeof(shadow));
   copy=shadow;
   expirep=16384; // Expiry pointer, +2 blocks
@@ -6450,6 +6400,8 @@ void new_dynarec_init(void)
   ram_offset=(uintptr_t)rdram-0x80000000;
   if (ram_offset!=0)
     SysPrintf("warning: RAM is not directly mapped, performance will suffer\n");
+  SysPrintf("Mapped (RAM/scrp/ROM/LUTs/TC):\n");
+  SysPrintf("%p/%p/%p/%p/%p\n", psxM, psxH, psxR, mem_rtab, out);
 }
 
 void new_dynarec_cleanup(void)
@@ -7099,8 +7051,24 @@ static noinline void pass1_disassemble(u_int pagelimit)
 
     /* Is this the end of the block? */
     if (i > 0 && dops[i-1].is_ujump) {
-      if(dops[i-1].rt1==0) { // Continue past subroutine call (JAL)
-        done=2;
+      if (dops[i-1].rt1 == 0) { // not jal
+        int found_bbranch = 0, t = (ba[i-1] - start) / 4;
+        if ((u_int)(t - i) < 64 && start + (t+64)*4 < pagelimit) {
+          // scan for a branch back to i+1
+          for (j = t; j < t + 64; j++) {
+            int tmpop = source[j] >> 26;
+            if (tmpop == 1 || ((tmpop & ~3) == 4)) {
+              int t2 = j + 1 + (int)(signed short)source[j];
+              if (t2 == i + 1) {
+                //printf("blk expand %08x<-%08x\n", start + (i+1)*4, start + j*4);
+                found_bbranch = 1;
+                break;
+              }
+            }
+          }
+        }
+        if (!found_bbranch)
+          done = 2;
       }
       else {
         if(stop_after_jal) done=1;
@@ -7958,12 +7926,14 @@ static noinline void pass3_register_alloc(u_int addr)
 
 static noinline void pass4_cull_unused_regs(void)
 {
+  u_int last_needed_regs[4] = {0,0,0,0};
   u_int nr=0;
   int i;
 
   for (i=slen-1;i>=0;i--)
   {
     int hr;
+    __builtin_prefetch(regs[i-2].regmap);
     if(dops[i].is_jump)
     {
       if(ba[i]<start || ba[i]>=(start+slen*4))
@@ -7988,7 +7958,7 @@ static noinline void pass4_cull_unused_regs(void)
       if (!dops[i].is_ujump)
       {
         if(i<slen-2) {
-          nr|=needed_reg[i+2];
+          nr |= last_needed_regs[(i+2) & 3];
           for(hr=0;hr<HOST_REGS;hr++)
           {
             if(regmap_pre[i+2][hr]>=0&&get_reg(regs[i+2].regmap_entry,regmap_pre[i+2][hr])<0) nr&=~(1<<hr);
@@ -8000,22 +7970,19 @@ static noinline void pass4_cull_unused_regs(void)
       //if(regs[i].regmap[hr]!=regmap_pre[i][hr]) nr&=~(1<<hr);
       //if(regs[i].regmap[hr]<0) nr&=~(1<<hr);
       // Merge in delay slot
-      for(hr=0;hr<HOST_REGS;hr++)
-      {
-        if(dops[i+1].rt1&&dops[i+1].rt1==regs[i].regmap[hr]) nr&=~(1<<hr);
-        if(dops[i+1].rt2&&dops[i+1].rt2==regs[i].regmap[hr]) nr&=~(1<<hr);
-        if(dops[i+1].rs1==regmap_pre[i][hr]) nr|=1<<hr;
-        if(dops[i+1].rs2==regmap_pre[i][hr]) nr|=1<<hr;
-        if(dops[i+1].rs1==regs[i].regmap_entry[hr]) nr|=1<<hr;
-        if(dops[i+1].rs2==regs[i].regmap_entry[hr]) nr|=1<<hr;
-        if(ram_offset && (dops[i+1].is_load || dops[i+1].is_store)) {
-          if(regmap_pre[i][hr]==ROREG) nr|=1<<hr;
-          if(regs[i].regmap_entry[hr]==ROREG) nr|=1<<hr;
-        }
-        if(dops[i+1].is_store) {
-          if(regmap_pre[i][hr]==INVCP) nr|=1<<hr;
-          if(regs[i].regmap_entry[hr]==INVCP) nr|=1<<hr;
-        }
+      if (dops[i+1].rt1) nr &= ~get_regm(regs[i].regmap, dops[i+1].rt1);
+      if (dops[i+1].rt2) nr &= ~get_regm(regs[i].regmap, dops[i+1].rt2);
+      nr |= get_regm(regmap_pre[i], dops[i+1].rs1);
+      nr |= get_regm(regmap_pre[i], dops[i+1].rs2);
+      nr |= get_regm(regs[i].regmap_entry, dops[i+1].rs1);
+      nr |= get_regm(regs[i].regmap_entry, dops[i+1].rs2);
+      if (ram_offset && (dops[i+1].is_load || dops[i+1].is_store)) {
+        nr |= get_regm(regmap_pre[i], ROREG);
+        nr |= get_regm(regs[i].regmap_entry, ROREG);
+      }
+      if (dops[i+1].is_store) {
+        nr |= get_regm(regmap_pre[i], INVCP);
+        nr |= get_regm(regs[i].regmap_entry, INVCP);
       }
     }
     else if(dops[i].itype==SYSCALL||dops[i].itype==HLECALL||dops[i].itype==INTCALL)
@@ -8039,30 +8006,32 @@ static noinline void pass4_cull_unused_regs(void)
         }
       }
     }
+    // Overwritten registers are not needed
+    if (dops[i].rt1) nr &= ~get_regm(regs[i].regmap, dops[i].rt1);
+    if (dops[i].rt2) nr &= ~get_regm(regs[i].regmap, dops[i].rt2);
+    nr &= ~get_regm(regs[i].regmap, FTEMP);
+    // Source registers are needed
+    nr |= get_regm(regmap_pre[i], dops[i].rs1);
+    nr |= get_regm(regmap_pre[i], dops[i].rs2);
+    nr |= get_regm(regs[i].regmap_entry, dops[i].rs1);
+    nr |= get_regm(regs[i].regmap_entry, dops[i].rs2);
+    if (ram_offset && (dops[i].is_load || dops[i].is_store)) {
+      nr |= get_regm(regmap_pre[i], ROREG);
+      nr |= get_regm(regs[i].regmap_entry, ROREG);
+    }
+    if (dops[i].is_store) {
+      nr |= get_regm(regmap_pre[i], INVCP);
+      nr |= get_regm(regs[i].regmap_entry, INVCP);
+    }
+
+    if (i > 0 && !dops[i].bt && regs[i].wasdirty)
     for(hr=0;hr<HOST_REGS;hr++)
     {
-      // Overwritten registers are not needed
-      if(dops[i].rt1&&dops[i].rt1==regs[i].regmap[hr]) nr&=~(1<<hr);
-      if(dops[i].rt2&&dops[i].rt2==regs[i].regmap[hr]) nr&=~(1<<hr);
-      if(FTEMP==regs[i].regmap[hr]) nr&=~(1<<hr);
-      // Source registers are needed
-      if(dops[i].rs1==regmap_pre[i][hr]) nr|=1<<hr;
-      if(dops[i].rs2==regmap_pre[i][hr]) nr|=1<<hr;
-      if(dops[i].rs1==regs[i].regmap_entry[hr]) nr|=1<<hr;
-      if(dops[i].rs2==regs[i].regmap_entry[hr]) nr|=1<<hr;
-      if(ram_offset && (dops[i].is_load || dops[i].is_store)) {
-        if(regmap_pre[i][hr]==ROREG) nr|=1<<hr;
-        if(regs[i].regmap_entry[hr]==ROREG) nr|=1<<hr;
-      }
-      if(dops[i].is_store) {
-        if(regmap_pre[i][hr]==INVCP) nr|=1<<hr;
-        if(regs[i].regmap_entry[hr]==INVCP) nr|=1<<hr;
-      }
       // Don't store a register immediately after writing it,
       // may prevent dual-issue.
       // But do so if this is a branch target, otherwise we
       // might have to load the register before the branch.
-      if(i>0&&!dops[i].bt&&((regs[i].wasdirty>>hr)&1)) {
+      if((regs[i].wasdirty>>hr)&1) {
         if((regmap_pre[i][hr]>0&&!((unneeded_reg[i]>>regmap_pre[i][hr])&1))) {
           if(dops[i-1].rt1==regmap_pre[i][hr]) nr|=1<<hr;
           if(dops[i-1].rt2==regmap_pre[i][hr]) nr|=1<<hr;
@@ -8079,7 +8048,7 @@ static noinline void pass4_cull_unused_regs(void)
       if(regs[i].regmap_entry[HOST_CCREG]==CCREG) nr|=1<<HOST_CCREG;
     }
     // Save it
-    needed_reg[i]=nr;
+    last_needed_regs[i & 3] = nr;
 
     // Deallocate unneeded registers
     for(hr=0;hr<HOST_REGS;hr++)
@@ -8636,6 +8605,8 @@ static noinline void pass5b_preallocate2(void)
 // so that we don't end up with lots of writes at the branches.
 static noinline void pass6_clean_registers(int istart, int iend, int wr)
 {
+  static u_int wont_dirty[MAXBLOCK];
+  static u_int will_dirty[MAXBLOCK];
   int i;
   int r;
   u_int will_dirty_i,will_dirty_next,temp_will_dirty;
@@ -9253,9 +9224,9 @@ int new_recompile_block(u_int addr)
         if(dops[i+1].rs2!=dops[i+1].rs1&&dops[i+1].rs2!=dops[i].rs1&&dops[i+1].rs2!=dops[i].rs2&&(dops[i+1].rs2!=dops[i].rt1||dops[i].rt1==0))
           load_regs(regs[i].regmap_entry,regs[i].regmap,dops[i+1].rs2,dops[i+1].rs2);
         if (ram_offset && (dops[i+1].is_load || dops[i+1].is_store))
-          load_regs(regs[i].regmap_entry,regs[i].regmap,ROREG,ROREG);
+          load_reg(regs[i].regmap_entry,regs[i].regmap,ROREG);
         if (dops[i+1].is_store)
-          load_regs(regs[i].regmap_entry,regs[i].regmap,INVCP,INVCP);
+          load_reg(regs[i].regmap_entry,regs[i].regmap,INVCP);
       }
       else if(i+1<slen)
       {
@@ -9269,11 +9240,11 @@ int new_recompile_block(u_int addr)
       }
       // TODO: if(is_ooo(i)) address_generation(i+1);
       if (!dops[i].is_jump || dops[i].itype == CJUMP)
-        load_regs(regs[i].regmap_entry,regs[i].regmap,CCREG,CCREG);
+        load_reg(regs[i].regmap_entry,regs[i].regmap,CCREG);
       if (ram_offset && (dops[i].is_load || dops[i].is_store))
-        load_regs(regs[i].regmap_entry,regs[i].regmap,ROREG,ROREG);
+        load_reg(regs[i].regmap_entry,regs[i].regmap,ROREG);
       if (dops[i].is_store)
-        load_regs(regs[i].regmap_entry,regs[i].regmap,INVCP,INVCP);
+        load_reg(regs[i].regmap_entry,regs[i].regmap,INVCP);
 
       ds = assemble(i, &regs[i], ccadj[i]);
 
@@ -9442,17 +9413,7 @@ int new_recompile_block(u_int addr)
     out = ndrc->translation_cache;
 
   // Trap writes to any of the pages we compiled
-  for(i=start>>12;i<=(start+slen*4)>>12;i++) {
-    invalid_code[i]=0;
-  }
-  inv_code_start=inv_code_end=~0;
-
-  // for PCSX we need to mark all mirrors too
-  if(get_page(start)<(RAM_SIZE>>12))
-    for(i=start>>12;i<=(start+slen*4)>>12;i++)
-      invalid_code[((u_int)0x00000000>>12)|(i&0x1ff)]=
-      invalid_code[((u_int)0x80000000>>12)|(i&0x1ff)]=
-      invalid_code[((u_int)0xa0000000>>12)|(i&0x1ff)]=0;
+  mark_valid_code(start, slen*4);
 
   /* Pass 10 - Free memory by expiring oldest blocks */