X-Git-Url: https://notaz.gp2x.de/cgi-bin/gitweb.cgi?a=blobdiff_plain;f=libpcsxcore%2Fnew_dynarec%2Fnew_dynarec.c;h=962b338a88439b2cd6ea3362095de78fa05d1c4b;hb=ece032e6deb31bbbbe037c7d1dd630994d46b954;hp=a8a750e4b31a533f8f95afaf5450760f764f6dfb;hpb=53dc27f6de389570312e2bae8a533230dc42ed1b;p=pcsx_rearmed.git diff --git a/libpcsxcore/new_dynarec/new_dynarec.c b/libpcsxcore/new_dynarec/new_dynarec.c index a8a750e4..962b338a 100644 --- a/libpcsxcore/new_dynarec/new_dynarec.c +++ b/libpcsxcore/new_dynarec/new_dynarec.c @@ -50,7 +50,7 @@ //#define DISASM //#define ASSEM_PRINT -//#define REG_ALLOC_PRINT +//#define STAT_PRINT #ifdef ASSEM_PRINT #define assem_debug printf @@ -192,11 +192,11 @@ static struct decoded_insn } dops[MAXBLOCK]; // used by asm: - u_char *out; struct ht_entry hash_table[65536] __attribute__((aligned(16))); struct ll_entry *jump_in[4096] __attribute__((aligned(16))); - struct ll_entry *jump_dirty[4096]; + static u_char *out; + static struct ll_entry *jump_dirty[4096]; static struct ll_entry *jump_out[4096]; static u_int start; static u_int *source; @@ -221,9 +221,6 @@ static struct decoded_insn static struct regstat regs[MAXBLOCK]; static struct regstat branch_regs[MAXBLOCK]; static signed char minimum_free_regs[MAXBLOCK]; - static u_int needed_reg[MAXBLOCK]; - static u_int wont_dirty[MAXBLOCK]; - static u_int will_dirty[MAXBLOCK]; static int ccadj[MAXBLOCK]; static int slen; static void *instr_addr[MAXBLOCK]; @@ -239,6 +236,19 @@ static struct decoded_insn static int expirep; static u_int stop_after_jal; static u_int f1_hack; +#ifdef STAT_PRINT + static int stat_bc_direct; + static int stat_bc_pre; + static int stat_bc_restore; + static int stat_jump_in_lookups; + static int stat_restore_tries; + static int stat_restore_compares; + static int stat_inv_addr_calls; + static int stat_inv_hits; + #define stat_inc(s) s++ +#else + #define stat_inc(s) +#endif int new_dynarec_hacks; int new_dynarec_hacks_pergame; @@ -254,7 +264,6 @@ static struct decoded_insn extern int branch_target; extern uintptr_t ram_offset; extern uintptr_t mini_ht[32][2]; - extern u_char restore_candidate[512]; /* registers that may be allocated */ /* 1-31 gpr */ @@ -326,7 +335,6 @@ int new_recompile_block(u_int addr); void *get_addr_ht(u_int vaddr); void invalidate_block(u_int block); void invalidate_addr(u_int addr); -void remove_hash(int vaddr); void dyna_linker(); void dyna_linker_ds(); void verify_code(); @@ -340,8 +348,13 @@ void jump_break (u_int u0, u_int u1, u_int pc); void jump_break_ds(u_int u0, u_int u1, u_int pc); void jump_to_new_pc(); void call_gteStall(); +void add_jump_out(u_int vaddr, void *src); void new_dyna_leave(); +static void *get_clean_addr(void *addr); +static void get_bounds(void *addr, u_char **start, u_char **end); +static void ll_add_flags(struct ll_entry **head,int vaddr,u_int reg_sv_flags,void *addr); + // Needed by assembler static void wb_register(signed char r, const signed char regmap[], uint64_t dirty); static void wb_dirtys(const signed char i_regmap[], uint64_t i_dirty); @@ -533,6 +546,21 @@ static void hash_table_add(struct ht_entry *ht_bin, u_int vaddr, void *tcaddr) ht_bin->tcaddr[0] = tcaddr; } +static void mark_valid_code(u_int vaddr, u_int len) +{ + u_int i, j; + vaddr &= 0x1fffffff; + for (i = vaddr & ~0xfff; i < vaddr + len; i += 0x1000) { + // ram mirrors, but should not hurt bios + for (j = 0; j < 0x800000; j += 0x200000) { + invalid_code[(i|j) >> 12] = + invalid_code[(i|j|0x80000000u) >> 12] = + invalid_code[(i|j|0xa0000000u) >> 12] = 0; + } + } + inv_code_start = inv_code_end = ~0; +} + // some messy ari64's code, seems to rely on unsigned 32bit overflow static int doesnt_expire_soon(void *tcaddr) { @@ -540,51 +568,94 @@ static int doesnt_expire_soon(void *tcaddr) return diff > (u_int)(0x60000000 + (MAX_OUTPUT_BLOCK_SIZE << (32-TARGET_SIZE_2))); } +void *ndrc_try_restore_block(u_int vaddr) +{ + u_char *source_start = NULL, *source_end = NULL; + void *found_stub = NULL, *found_clean = NULL; + u_int len, page = get_page(vaddr); + const struct ll_entry *head; + int ep_count = 0; + + stat_inc(stat_restore_tries); + for (head = jump_dirty[page]; head != NULL; head = head->next) + { + if (head->vaddr != vaddr) + continue; + // don't restore blocks which are about to expire from the cache + if (!doesnt_expire_soon(head->addr)) + continue; + stat_inc(stat_restore_compares); + if (!verify_dirty(head->addr)) + continue; + + found_stub = head->addr; + break; + } + if (!found_stub) + return NULL; + + found_clean = get_clean_addr(found_stub); + get_bounds(found_stub, &source_start, &source_end); + assert(source_start < source_end); + len = source_end - source_start; + mark_valid_code(vaddr, len); + + // restore all entry points + for (head = jump_dirty[page]; head != NULL; head = head->next) + { + if (head->vaddr < vaddr || head->vaddr >= vaddr + len) + continue; + + u_char *start = NULL, *end = NULL; + get_bounds(head->addr, &start, &end); + if (start != source_start || end != source_end) + continue; + + void *clean_addr = get_clean_addr(head->addr); + ll_add_flags(jump_in + page, head->vaddr, head->reg_sv_flags, clean_addr); + + int in_ht = 0; + struct ht_entry *ht_bin = hash_table_get(head->vaddr); + if (ht_bin->vaddr[0] == head->vaddr) { + ht_bin->tcaddr[0] = clean_addr; // Replace existing entry + in_ht = 1; + } + if (ht_bin->vaddr[1] == head->vaddr) { + ht_bin->tcaddr[1] = clean_addr; // Replace existing entry + in_ht = 1; + } + if (!in_ht) + hash_table_add(ht_bin, head->vaddr, clean_addr); + ep_count++; + } + inv_debug("INV: Restored %08x %p (%d)\n", vaddr, found_stub, ep_count); + stat_inc(stat_bc_restore); + return found_clean; +} + // Get address from virtual address // This is called from the recompiled JR/JALR instructions void noinline *get_addr(u_int vaddr) { - u_int page=get_page(vaddr); - u_int vpage=get_vpage(vaddr); + u_int page = get_page(vaddr); struct ll_entry *head; - //printf("TRACE: count=%d next=%d (get_addr %x,page %d)\n",Count,next_interupt,vaddr,page); - head=jump_in[page]; - while(head!=NULL) { - if(head->vaddr==vaddr) { - //printf("TRACE: count=%d next=%d (get_addr match %x: %p)\n",Count,next_interupt,vaddr,head->addr); + void *code; + + stat_inc(stat_jump_in_lookups); + for (head = jump_in[page]; head != NULL; head = head->next) { + if (head->vaddr == vaddr) { hash_table_add(hash_table_get(vaddr), vaddr, head->addr); return head->addr; } - head=head->next; } - head=jump_dirty[vpage]; - while(head!=NULL) { - if(head->vaddr==vaddr) { - //printf("TRACE: count=%d next=%d (get_addr match dirty %x: %p)\n",Count,next_interupt,vaddr,head->addr); - // Don't restore blocks which are about to expire from the cache - if (doesnt_expire_soon(head->addr)) - if (verify_dirty(head->addr)) { - //printf("restore candidate: %x (%d) d=%d\n",vaddr,page,invalid_code[vaddr>>12]); - invalid_code[vaddr>>12]=0; - inv_code_start=inv_code_end=~0; - if(vpage<2048) { - restore_candidate[vpage>>3]|=1<<(vpage&7); - } - else restore_candidate[page>>3]|=1<<(page&7); - struct ht_entry *ht_bin = hash_table_get(vaddr); - if (ht_bin->vaddr[0] == vaddr) - ht_bin->tcaddr[0] = head->addr; // Replace existing entry - else - hash_table_add(ht_bin, vaddr, head->addr); + code = ndrc_try_restore_block(vaddr); + if (code) + return code; + + int r = new_recompile_block(vaddr); + if (r == 0) + return get_addr(vaddr); - return head->addr; - } - } - head=head->next; - } - //printf("TRACE: count=%d next=%d (get_addr no-match %x)\n",Count,next_interupt,vaddr); - int r=new_recompile_block(vaddr); - if(r==0) return get_addr(vaddr); // generate an address error Status|=2; Cause=(vaddr<<31)|(4<<2); @@ -607,6 +678,8 @@ static void clear_all_regs(signed char regmap[]) memset(regmap, -1, sizeof(regmap[0]) * HOST_REGS); } +// get_reg: get allocated host reg from mips reg +// returns -1 if no such mips reg was allocated #if defined(__arm__) && defined(HAVE_ARMV6) && HOST_REGS == 13 && EXCLUDE_REG == 11 extern signed char get_reg(const signed char regmap[], signed char r); @@ -627,6 +700,12 @@ static signed char get_reg(const signed char regmap[], signed char r) #endif +// get reg as mask bit (1 << hr) +static u_int get_regm(const signed char regmap[], signed char r) +{ + return (1u << (get_reg(regmap, r) & 31)) & ~(1u << 31); +} + static signed char get_reg_temp(const signed char regmap[]) { int hr; @@ -745,7 +824,7 @@ static uint32_t get_const(const struct regstat *cur, signed char reg) // Least soon needed registers // Look at the next ten instructions and see which registers // will be used. Try not to reallocate these. -void lsn(u_char hsn[], int i, int *preferred_reg) +static void lsn(u_char hsn[], int i, int *preferred_reg) { int j; int b=-1; @@ -833,7 +912,7 @@ void lsn(u_char hsn[], int i, int *preferred_reg) } // We only want to allocate registers if we're going to use them again soon -int needed_again(int r, int i) +static int needed_again(int r, int i) { int j; int b=-1; @@ -878,7 +957,7 @@ int needed_again(int r, int i) // Try to match register allocations at the end of a loop with those // at the beginning -int loop_reg(int i, int r, int hr) +static int loop_reg(int i, int r, int hr) { int j,k; for(j=0;j<9;j++) @@ -920,7 +999,7 @@ int loop_reg(int i, int r, int hr) // Allocate every register, preserving source/target regs -void alloc_all(struct regstat *cur,int i) +static void alloc_all(struct regstat *cur,int i) { int hr; @@ -1064,7 +1143,7 @@ static void emit_far_call(const void *f) } // Add virtual address mapping to linked list -void ll_add(struct ll_entry **head,int vaddr,void *addr) +static void ll_add(struct ll_entry **head,int vaddr,void *addr) { struct ll_entry *new_entry; new_entry=malloc(sizeof(struct ll_entry)); @@ -1076,7 +1155,7 @@ void ll_add(struct ll_entry **head,int vaddr,void *addr) *head=new_entry; } -void ll_add_flags(struct ll_entry **head,int vaddr,u_int reg_sv_flags,void *addr) +static void ll_add_flags(struct ll_entry **head,int vaddr,u_int reg_sv_flags,void *addr) { ll_add(head,vaddr,addr); (*head)->reg_sv_flags=reg_sv_flags; @@ -1084,7 +1163,7 @@ void ll_add_flags(struct ll_entry **head,int vaddr,u_int reg_sv_flags,void *addr // Check if an address is already compiled // but don't return addresses which are about to expire from the cache -void *check_addr(u_int vaddr) +static void *check_addr(u_int vaddr) { struct ht_entry *ht_bin = hash_table_get(vaddr); size_t i; @@ -1128,7 +1207,7 @@ void *check_addr(u_int vaddr) return 0; } -void remove_hash(int vaddr) +static void remove_hash(int vaddr) { //printf("remove hash: %x\n",vaddr); struct ht_entry *ht_bin = hash_table_get(vaddr); @@ -1167,7 +1246,7 @@ static void ll_remove_matching_addrs(struct ll_entry **head, } // Remove all entries from linked list -void ll_clear(struct ll_entry **head) +static void ll_clear(struct ll_entry **head) { struct ll_entry *cur; struct ll_entry *next; @@ -1207,6 +1286,7 @@ static void invalidate_page(u_int page) struct ll_entry *head; struct ll_entry *next; head=jump_in[page]; + if (head) stat_inc(stat_inv_hits); jump_in[page]=0; while(head!=NULL) { inv_debug("INVALIDATE: %x\n",head->vaddr); @@ -1286,6 +1366,7 @@ void invalidate_addr(u_int addr) //static int rhits; // this check is done by the caller //if (inv_code_start<=addr&&addr<=inv_code_end) { rhits++; return; } + stat_inc(stat_inv_addr_calls); u_int page=get_vpage(addr); if(page<2048) { // RAM struct ll_entry *head; @@ -1345,11 +1426,6 @@ void invalidate_all_pages(void) u_int page; for(page=0;page<4096;page++) invalidate_page(page); - for(page=0;page<1048576;page++) - if(!invalid_code[page]) { - restore_candidate[(page&2047)>>3]|=1<<(page&7); - restore_candidate[((page&2047)>>3)+256]|=1<<(page&7); - } #ifdef USE_MINI_HT memset(mini_ht,-1,sizeof(mini_ht)); #endif @@ -1379,55 +1455,6 @@ void add_jump_out(u_int vaddr,void *src) //inv_debug("add_jump_out: to %p\n",get_pointer(src)); } -// If a code block was found to be unmodified (bit was set in -// restore_candidate) and it remains unmodified (bit is clear -// in invalid_code) then move the entries for that 4K page from -// the dirty list to the clean list. -void clean_blocks(u_int page) -{ - struct ll_entry *head; - inv_debug("INV: clean_blocks page=%d\n",page); - head=jump_dirty[page]; - while(head!=NULL) { - if(!invalid_code[head->vaddr>>12]) { - // Don't restore blocks which are about to expire from the cache - if (doesnt_expire_soon(head->addr)) { - if(verify_dirty(head->addr)) { - u_char *start, *end; - //printf("Possibly Restore %x (%p)\n",head->vaddr, head->addr); - u_int i; - u_int inv=0; - get_bounds(head->addr, &start, &end); - if (start - rdram < RAM_SIZE) { - for (i = (start-rdram+0x80000000)>>12; i <= (end-1-rdram+0x80000000)>>12; i++) { - inv|=invalid_code[i]; - } - } - else if((signed int)head->vaddr>=(signed int)0x80000000+RAM_SIZE) { - inv=1; - } - if(!inv) { - void *clean_addr = get_clean_addr(head->addr); - if (doesnt_expire_soon(clean_addr)) { - u_int ppage=page; - inv_debug("INV: Restored %x (%p/%p)\n",head->vaddr, head->addr, clean_addr); - //printf("page=%x, addr=%x\n",page,head->vaddr); - //assert(head->vaddr>>12==(page|0x80000)); - ll_add_flags(jump_in+ppage,head->vaddr,head->reg_sv_flags,clean_addr); - struct ht_entry *ht_bin = hash_table_get(head->vaddr); - if (ht_bin->vaddr[0] == head->vaddr) - ht_bin->tcaddr[0] = clean_addr; // Replace existing entry - if (ht_bin->vaddr[1] == head->vaddr) - ht_bin->tcaddr[1] = clean_addr; // Replace existing entry - } - } - } - } - } - head=head->next; - } -} - /* Register allocation */ // Note: registers are allocated clean (unmodified state) @@ -1440,15 +1467,14 @@ static void alloc_reg(struct regstat *cur,int i,signed char reg) if (reg == CCREG) preferred_reg = HOST_CCREG; if (reg == PTEMP || reg == FTEMP) preferred_reg = 12; assert(PREFERRED_REG_FIRST != EXCLUDE_REG && EXCLUDE_REG != HOST_REGS); + assert(reg >= 0); // Don't allocate unused registers if((cur->u>>reg)&1) return; // see if it's already allocated - for(hr=0;hrregmap[hr]==reg) return; - } + if (get_reg(cur->regmap, reg) >= 0) + return; // Keep the same mapping if the register was already allocated in a loop preferred_reg = loop_reg(i,reg,preferred_reg); @@ -1888,7 +1914,7 @@ static void load_alloc(struct regstat *current,int i) } } -void store_alloc(struct regstat *current,int i) +static void store_alloc(struct regstat *current,int i) { clear_const(current,dops[i].rs2); if(!(dops[i].rs2)) current->u&=~1LL; // Allow allocating r0 if necessary @@ -1911,13 +1937,13 @@ void store_alloc(struct regstat *current,int i) minimum_free_regs[i]=1; } -void c1ls_alloc(struct regstat *current,int i) +static void c1ls_alloc(struct regstat *current,int i) { clear_const(current,dops[i].rt1); alloc_reg(current,i,CSREG); // Status } -void c2ls_alloc(struct regstat *current,int i) +static void c2ls_alloc(struct regstat *current,int i) { clear_const(current,dops[i].rt1); if(needed_again(dops[i].rs1,i)) alloc_reg(current,i,dops[i].rs1); @@ -1935,7 +1961,7 @@ void c2ls_alloc(struct regstat *current,int i) } #ifndef multdiv_alloc -void multdiv_alloc(struct regstat *current,int i) +static void multdiv_alloc(struct regstat *current,int i) { // case 0x18: MULT // case 0x19: MULTU @@ -1979,7 +2005,7 @@ void multdiv_alloc(struct regstat *current,int i) } #endif -void cop0_alloc(struct regstat *current,int i) +static void cop0_alloc(struct regstat *current,int i) { if(dops[i].opcode2==0) // MFC0 { @@ -2039,14 +2065,14 @@ static void cop2_alloc(struct regstat *current,int i) minimum_free_regs[i]=1; } -void c2op_alloc(struct regstat *current,int i) +static void c2op_alloc(struct regstat *current,int i) { alloc_cc(current,i); // for stalls dirty_reg(current,CCREG); alloc_reg_temp(current,i,-1); } -void syscall_alloc(struct regstat *current,int i) +static void syscall_alloc(struct regstat *current,int i) { alloc_cc(current,i); dirty_reg(current,CCREG); @@ -2055,7 +2081,7 @@ void syscall_alloc(struct regstat *current,int i) current->isconst=0; } -void delayslot_alloc(struct regstat *current,int i) +static void delayslot_alloc(struct regstat *current,int i) { switch(dops[i].itype) { case UJUMP: @@ -2191,23 +2217,13 @@ static void wb_register(signed char r, const signed char regmap[], uint64_t dirt static void wb_valid(signed char pre[],signed char entry[],u_int dirty_pre,u_int dirty,uint64_t u) { //if(dirty_pre==dirty) return; - int hr,reg; - for(hr=0;hr>reg)&1) { - if(reg>0) { - if(((dirty_pre&~dirty)>>hr)&1) { - if(reg>0&®<34) { - emit_storereg(reg,hr); - } - else if(reg>=64) { - assert(0); - } - } - } - } - } + int hr, r; + for (hr = 0; hr < HOST_REGS; hr++) { + r = pre[hr]; + if (r < 1 || r > 33 || ((u >> r) & 1)) + continue; + if (((dirty_pre & ~dirty) >> hr) & 1) + emit_storereg(r, hr); } } @@ -4277,26 +4293,18 @@ static void wb_invalidate(signed char pre[],signed char entry[],uint64_t dirty,u // Load the specified registers // This only loads the registers given as arguments because // we don't want to load things that will be overwritten -static void load_regs(signed char entry[],signed char regmap[],int rs1,int rs2) +static inline void load_reg(signed char entry[], signed char regmap[], int rs) { - int hr; - // Load 32-bit regs - for(hr=0;hr=0) { - if(entry[hr]!=regmap[hr]) { - if(regmap[hr]==rs1||regmap[hr]==rs2) - { - if(regmap[hr]==0) { - emit_zeroreg(hr); - } - else - { - emit_loadreg(regmap[hr],hr); - } - } - } - } - } + int hr = get_reg(regmap, rs); + if (hr >= 0 && entry[hr] != regmap[hr]) + emit_loadreg(regmap[hr], hr); +} + +static void load_regs(signed char entry[], signed char regmap[], int rs1, int rs2) +{ + load_reg(entry, regmap, rs1); + if (rs1 != rs2) + load_reg(entry, regmap, rs2); } // Load registers prior to the start of a loop @@ -4304,34 +4312,19 @@ static void load_regs(signed char entry[],signed char regmap[],int rs1,int rs2) static void loop_preload(signed char pre[],signed char entry[]) { int hr; - for(hr=0;hr=0) { - if(get_reg(pre,entry[hr])<0) { - assem_debug("loop preload:\n"); - //printf("loop preload: %d\n",hr); - if(entry[hr]==0) { - emit_zeroreg(hr); - } - else if(entry[hr]= 0 && pre[hr] != r && get_reg(pre, r) < 0) { + assem_debug("loop preload:\n"); + if (r < TEMPREG) + emit_loadreg(r, hr); } } } // Generate address for load/store instruction // goes to AGEN for writes, FTEMP for LOADLR and cop1/2 loads -void address_generation(int i, const struct regstat *i_regs, signed char entry[]) +static void address_generation(int i, const struct regstat *i_regs, signed char entry[]) { if (dops[i].is_load || dops[i].is_store) { int ra=-1; @@ -4652,7 +4645,7 @@ static void load_regs_entry(int t) } // Store dirty registers prior to branch -void store_regs_bt(signed char i_regmap[],uint64_t i_dirty,int addr) +static void store_regs_bt(signed char i_regmap[],uint64_t i_dirty,int addr) { if(internal_branch(addr)) { @@ -4844,9 +4837,9 @@ static void ds_assemble_entry(int i) load_regs(regs[t].regmap_entry,regs[t].regmap,dops[t].rs1,dops[t].rs2); address_generation(t,®s[t],regs[t].regmap_entry); if (ram_offset && (dops[t].is_load || dops[t].is_store)) - load_regs(regs[t].regmap_entry,regs[t].regmap,ROREG,ROREG); + load_reg(regs[t].regmap_entry,regs[t].regmap,ROREG); if (dops[t].is_store) - load_regs(regs[t].regmap_entry,regs[t].regmap,INVCP,INVCP); + load_reg(regs[t].regmap_entry,regs[t].regmap,INVCP); is_delayslot=0; switch (dops[t].itype) { case SYSCALL: @@ -5221,7 +5214,7 @@ static void ujump_assemble(int i, const struct regstat *i_regs) uint64_t bc_unneeded=branch_regs[i].u; bc_unneeded|=1|(1LL< +static char insn[MAXBLOCK][10]; + +#define set_mnemonic(i_, n_) \ + strcpy(insn[i_], n_) + +void print_regmap(const char *name, const signed char *regmap) { - int i; - uint64_t u,gte_u,b,gte_b; - uint64_t temp_u,temp_gte_u=0; - uint64_t gte_u_unknown=0; - if (HACK_ENABLED(NDHACK_GTE_UNNEEDED)) - gte_u_unknown=~0ll; - if(iend==slen-1) { - u=1; - gte_u=gte_u_unknown; - }else{ - //u=unneeded_reg[iend+1]; - u=1; - gte_u=gte_unneeded[iend+1]; + char buf[5]; + int i, l; + fputs(name, stdout); + for (i = 0; i < HOST_REGS; i++) { + l = 0; + if (regmap[i] >= 0) + l = snprintf(buf, sizeof(buf), "$%d", regmap[i]); + for (; l < 3; l++) + buf[l] = ' '; + buf[l] = 0; + printf(" r%d=%s", i, buf); } - - for (i=iend;i>=istart;i--) - { - //printf("unneeded registers i=%d (%d,%d) r=%d\n",i,istart,iend,r); - if(dops[i].is_jump) - { - // If subroutine call, flag return address as a possible branch target - if(dops[i].rt1==31 && i=(start+slen*4)) - { - // Branch out of this block, flush all regs - u=1; - gte_u=gte_u_unknown; - branch_unneeded_reg[i]=u; - // Merge in delay slot - u|=(1LL<>2].bt=1; - if(ba[i]<=start+i*4) { - // Backward branch - if(dops[i].is_ujump) - { - // Unconditional branch - temp_u=1; - temp_gte_u=0; - } else { - // Conditional branch (not taken case) - temp_u=unneeded_reg[i+2]; - temp_gte_u&=gte_unneeded[i+2]; - } - // Merge in delay slot - temp_u|=(1LL<>2,i-1,r+1); - }else{ - unneeded_reg[(ba[i]-start)>>2]=1; - gte_unneeded[(ba[i]-start)>>2]=gte_u_unknown; - } - } /*else*/ if(1) { - if (dops[i].is_ujump) - { - // Unconditional branch - u=unneeded_reg[(ba[i]-start)>>2]; - gte_u=gte_unneeded[(ba[i]-start)>>2]; - branch_unneeded_reg[i]=u; - // Merge in delay slot - u|=(1LL<>2]; - gte_b=gte_unneeded[(ba[i]-start)>>2]; - branch_unneeded_reg[i]=b; - // Branch delay slot - b|=(1LL<>r)&1) { - if(r==HIREG) printf(" HI"); - else if(r==LOREG) printf(" LO"); - else printf(" r%d",r); - } - } - printf("\n"); - */ - } -} - -// Write back dirty registers as soon as we will no longer modify them, -// so that we don't end up with lots of writes at the branches. -static void clean_registers(int istart, int iend, int wr) -{ - int i; - int r; - u_int will_dirty_i,will_dirty_next,temp_will_dirty; - u_int wont_dirty_i,wont_dirty_next,temp_wont_dirty; - if(iend==slen-1) { - will_dirty_i=will_dirty_next=0; - wont_dirty_i=wont_dirty_next=0; - }else{ - will_dirty_i=will_dirty_next=will_dirty[iend+1]; - wont_dirty_i=wont_dirty_next=wont_dirty[iend+1]; - } - for (i=iend;i>=istart;i--) - { - signed char rregmap_i[RRMAP_SIZE]; - u_int hr_candirty = 0; - assert(HOST_REGS < 32); - make_rregs(regs[i].regmap, rregmap_i, &hr_candirty); - __builtin_prefetch(regs[i-1].regmap); - if(dops[i].is_jump) - { - signed char branch_rregmap_i[RRMAP_SIZE]; - u_int branch_hr_candirty = 0; - make_rregs(branch_regs[i].regmap, branch_rregmap_i, &branch_hr_candirty); - if(ba[i]=(start+slen*4)) - { - // Branch out of this block, flush all regs - will_dirty_i = 0; - will_dirty_i |= 1u << (get_rreg(branch_rregmap_i, dops[i].rt1) & 31); - will_dirty_i |= 1u << (get_rreg(branch_rregmap_i, dops[i].rt2) & 31); - will_dirty_i |= 1u << (get_rreg(branch_rregmap_i, dops[i+1].rt1) & 31); - will_dirty_i |= 1u << (get_rreg(branch_rregmap_i, dops[i+1].rt2) & 31); - will_dirty_i |= 1u << (get_rreg(branch_rregmap_i, CCREG) & 31); - will_dirty_i &= branch_hr_candirty; - if (dops[i].is_ujump) - { - // Unconditional branch - wont_dirty_i = 0; - // Merge in delay slot (will dirty) - will_dirty_i |= 1u << (get_rreg(rregmap_i, dops[i].rt1) & 31); - will_dirty_i |= 1u << (get_rreg(rregmap_i, dops[i].rt2) & 31); - will_dirty_i |= 1u << (get_rreg(rregmap_i, dops[i+1].rt1) & 31); - will_dirty_i |= 1u << (get_rreg(rregmap_i, dops[i+1].rt2) & 31); - will_dirty_i |= 1u << (get_rreg(rregmap_i, CCREG) & 31); - will_dirty_i &= hr_candirty; - } - else - { - // Conditional branch - wont_dirty_i = wont_dirty_next; - // Merge in delay slot (will dirty) - // (the original code had no explanation why these 2 are commented out) - //will_dirty_i |= 1u << (get_rreg(rregmap_i, dops[i].rt1) & 31); - //will_dirty_i |= 1u << (get_rreg(rregmap_i, dops[i].rt2) & 31); - will_dirty_i |= 1u << (get_rreg(rregmap_i, dops[i+1].rt1) & 31); - will_dirty_i |= 1u << (get_rreg(rregmap_i, dops[i+1].rt2) & 31); - will_dirty_i |= 1u << (get_rreg(rregmap_i, CCREG) & 31); - will_dirty_i &= hr_candirty; - } - // Merge in delay slot (wont dirty) - wont_dirty_i |= 1u << (get_rreg(rregmap_i, dops[i].rt1) & 31); - wont_dirty_i |= 1u << (get_rreg(rregmap_i, dops[i].rt2) & 31); - wont_dirty_i |= 1u << (get_rreg(rregmap_i, dops[i+1].rt1) & 31); - wont_dirty_i |= 1u << (get_rreg(rregmap_i, dops[i+1].rt2) & 31); - wont_dirty_i |= 1u << (get_rreg(rregmap_i, CCREG) & 31); - wont_dirty_i |= 1u << (get_rreg(branch_rregmap_i, dops[i].rt1) & 31); - wont_dirty_i |= 1u << (get_rreg(branch_rregmap_i, dops[i].rt2) & 31); - wont_dirty_i |= 1u << (get_rreg(branch_rregmap_i, dops[i+1].rt1) & 31); - wont_dirty_i |= 1u << (get_rreg(branch_rregmap_i, dops[i+1].rt2) & 31); - wont_dirty_i |= 1u << (get_rreg(branch_rregmap_i, CCREG) & 31); - wont_dirty_i &= ~(1u << 31); - if(wr) { - #ifndef DESTRUCTIVE_WRITEBACK - branch_regs[i].dirty&=wont_dirty_i; - #endif - branch_regs[i].dirty|=will_dirty_i; - } - } - else - { - // Internal branch - if(ba[i]<=start+i*4) { - // Backward branch - if (dops[i].is_ujump) - { - // Unconditional branch - temp_will_dirty=0; - temp_wont_dirty=0; - // Merge in delay slot (will dirty) - temp_will_dirty |= 1u << (get_rreg(branch_rregmap_i, dops[i].rt1) & 31); - temp_will_dirty |= 1u << (get_rreg(branch_rregmap_i, dops[i].rt2) & 31); - temp_will_dirty |= 1u << (get_rreg(branch_rregmap_i, dops[i+1].rt1) & 31); - temp_will_dirty |= 1u << (get_rreg(branch_rregmap_i, dops[i+1].rt2) & 31); - temp_will_dirty |= 1u << (get_rreg(branch_rregmap_i, CCREG) & 31); - temp_will_dirty &= branch_hr_candirty; - temp_will_dirty |= 1u << (get_rreg(rregmap_i, dops[i].rt1) & 31); - temp_will_dirty |= 1u << (get_rreg(rregmap_i, dops[i].rt2) & 31); - temp_will_dirty |= 1u << (get_rreg(rregmap_i, dops[i+1].rt1) & 31); - temp_will_dirty |= 1u << (get_rreg(rregmap_i, dops[i+1].rt2) & 31); - temp_will_dirty |= 1u << (get_rreg(rregmap_i, CCREG) & 31); - temp_will_dirty &= hr_candirty; - } else { - // Conditional branch (not taken case) - temp_will_dirty=will_dirty_next; - temp_wont_dirty=wont_dirty_next; - // Merge in delay slot (will dirty) - temp_will_dirty |= 1u << (get_rreg(branch_rregmap_i, dops[i].rt1) & 31); - temp_will_dirty |= 1u << (get_rreg(branch_rregmap_i, dops[i].rt2) & 31); - temp_will_dirty |= 1u << (get_rreg(branch_rregmap_i, dops[i+1].rt1) & 31); - temp_will_dirty |= 1u << (get_rreg(branch_rregmap_i, dops[i+1].rt2) & 31); - temp_will_dirty |= 1u << (get_rreg(branch_rregmap_i, CCREG) & 31); - temp_will_dirty &= branch_hr_candirty; - //temp_will_dirty |= 1u << (get_rreg(rregmap_i, dops[i].rt1) & 31); - //temp_will_dirty |= 1u << (get_rreg(rregmap_i, dops[i].rt2) & 31); - temp_will_dirty |= 1u << (get_rreg(rregmap_i, dops[i+1].rt1) & 31); - temp_will_dirty |= 1u << (get_rreg(rregmap_i, dops[i+1].rt2) & 31); - temp_will_dirty |= 1u << (get_rreg(rregmap_i, CCREG) & 31); - temp_will_dirty &= hr_candirty; - } - // Merge in delay slot (wont dirty) - temp_wont_dirty |= 1u << (get_rreg(rregmap_i, dops[i].rt1) & 31); - temp_wont_dirty |= 1u << (get_rreg(rregmap_i, dops[i].rt2) & 31); - temp_wont_dirty |= 1u << (get_rreg(rregmap_i, dops[i+1].rt1) & 31); - temp_wont_dirty |= 1u << (get_rreg(rregmap_i, dops[i+1].rt2) & 31); - temp_wont_dirty |= 1u << (get_rreg(rregmap_i, CCREG) & 31); - temp_wont_dirty |= 1u << (get_rreg(branch_rregmap_i, dops[i].rt1) & 31); - temp_wont_dirty |= 1u << (get_rreg(branch_rregmap_i, dops[i].rt2) & 31); - temp_wont_dirty |= 1u << (get_rreg(branch_rregmap_i, dops[i+1].rt1) & 31); - temp_wont_dirty |= 1u << (get_rreg(branch_rregmap_i, dops[i+1].rt2) & 31); - temp_wont_dirty |= 1u << (get_rreg(branch_rregmap_i, CCREG) & 31); - temp_wont_dirty &= ~(1u << 31); - // Deal with changed mappings - if(i0 && regmap_pre[i][r]<34) { - temp_will_dirty|=((unneeded_reg[i]>>regmap_pre[i][r])&1)<>regmap_pre[i][r])&1)<>2,i-1,0); - }else{ - // Limit recursion. It can take an excessive amount - // of time if there are a lot of nested loops. - will_dirty[(ba[i]-start)>>2]=0; - wont_dirty[(ba[i]-start)>>2]=-1; - } - } - /*else*/ if(1) - { - if (dops[i].is_ujump) - { - // Unconditional branch - will_dirty_i=0; - wont_dirty_i=0; - //if(ba[i]>start+i*4) { // Disable recursion (for debugging) - for(r=0;r>2].regmap_entry[r]) { - will_dirty_i|=will_dirty[(ba[i]-start)>>2]&(1<>2]&(1<=0) { - will_dirty_i|=((unneeded_reg[(ba[i]-start)>>2]>>branch_regs[i].regmap[r])&1)<>2]>>branch_regs[i].regmap[r])&1)<start+i*4) // Disable recursion (for debugging) - for(r=0;r>2].regmap_entry[r]) { - will_dirty_i&=will_dirty[(ba[i]-start)>>2]&(1<>2]&(1<=0) { - will_dirty_i&=((unneeded_reg[(ba[i]-start)>>2]>>target_reg)&1)<>2]>>target_reg)&1)< istart && !dops[i].is_jump) { - // Don't store a register immediately after writing it, - // may prevent dual-issue. - wont_dirty_i |= 1u << (get_rreg(rregmap_i, dops[i-1].rt1) & 31); - wont_dirty_i |= 1u << (get_rreg(rregmap_i, dops[i-1].rt2) & 31); - } - // Save it - will_dirty[i]=will_dirty_i; - wont_dirty[i]=wont_dirty_i; - // Mark registers that won't be dirtied as not dirty - if(wr) { - regs[i].dirty|=will_dirty_i; - #ifndef DESTRUCTIVE_WRITEBACK - regs[i].dirty&=wont_dirty_i; - if(dops[i].is_jump) - { - if (i < iend-1 && !dops[i].is_ujump) { - for(r=0;r>r)&1));*/} - } - } - } - } - else - { - if(i>r)&1));*/} - } - } - } - } - #endif - } - // Deal with changed mappings - temp_will_dirty=will_dirty_i; - temp_wont_dirty=wont_dirty_i; - for(r=0;r=0&&(nr=get_rreg(rregmap_i,regmap_pre[i][r]))>=0) { - // Register moved to a different register - will_dirty_i&=~(1<>nr)&1)<>nr)&1)<0 && regmap_pre[i][r]<34) { - will_dirty_i|=((unneeded_reg[i]>>regmap_pre[i][r])&1)<>regmap_pre[i][r])&1)<>r)&1));*/ - } - } - } - } - } -} - -#ifdef DISASM -#include -static char insn[MAXBLOCK][10]; - -#define set_mnemonic(i_, n_) \ - strcpy(insn[i_], n_) - -void print_regmap(const char *name, const signed char *regmap) -{ - char buf[5]; - int i, l; - fputs(name, stdout); - for (i = 0; i < HOST_REGS; i++) { - l = 0; - if (regmap[i] >= 0) - l = snprintf(buf, sizeof(buf), "$%d", regmap[i]); - for (; l < 3; l++) - buf[l] = ' '; - buf[l] = 0; - printf(" r%d=%s", i, buf); - } - fputs("\n", stdout); -} + fputs("\n", stdout); +} /* disassembly */ void disassemble_inst(int i) @@ -6883,7 +6367,6 @@ void new_dynarec_clear_full(void) memset(invalid_code,1,sizeof(invalid_code)); memset(hash_table,0xff,sizeof(hash_table)); memset(mini_ht,-1,sizeof(mini_ht)); - memset(restore_candidate,0,sizeof(restore_candidate)); memset(shadow,0,sizeof(shadow)); copy=shadow; expirep=16384; // Expiry pointer, +2 blocks @@ -6957,6 +6440,8 @@ void new_dynarec_init(void) ram_offset=(uintptr_t)rdram-0x80000000; if (ram_offset!=0) SysPrintf("warning: RAM is not directly mapped, performance will suffer\n"); + SysPrintf("Mapped (RAM/scrp/ROM/LUTs/TC):\n"); + SysPrintf("%p/%p/%p/%p/%p\n", psxM, psxH, psxR, mem_rtab, out); } void new_dynarec_cleanup(void) @@ -6978,6 +6463,7 @@ void new_dynarec_cleanup(void) #ifdef ROM_COPY if (munmap (ROM_COPY, 67108864) < 0) {SysPrintf("munmap() failed\n");} #endif + new_dynarec_print_stats(); } static u_int *get_source_start(u_int addr, u_int *limit) @@ -7088,152 +6574,81 @@ void new_dynarec_load_blocks(const void *save, int size) // change GPRs for speculation to at least partially work.. memcpy(regs_save, &psxRegs.GPR, sizeof(regs_save)); - for (i = 1; i < 32; i++) - psxRegs.GPR.r[i] = 0x80000000; - - for (b = 0; b < count; b++) { - for (f = blocks[b].regflags, i = 0; f; f >>= 1, i++) { - if (f & 1) - psxRegs.GPR.r[i] = 0x1f800000; - } - - get_addr(blocks[b].addr); - - for (f = blocks[b].regflags, i = 0; f; f >>= 1, i++) { - if (f & 1) - psxRegs.GPR.r[i] = 0x80000000; - } - } - - memcpy(&psxRegs.GPR, regs_save, sizeof(regs_save)); -} - -static int apply_hacks(void) -{ - int i; - if (HACK_ENABLED(NDHACK_NO_COMPAT_HACKS)) - return 0; - /* special hack(s) */ - for (i = 0; i < slen - 4; i++) - { - // lui a4, 0xf200; jal ; addu a0, 2; slti v0, 28224 - if (source[i] == 0x3c04f200 && dops[i+1].itype == UJUMP - && source[i+2] == 0x34840002 && dops[i+3].opcode == 0x0a - && imm[i+3] == 0x6e40 && dops[i+3].rs1 == 2) - { - SysPrintf("PE2 hack @%08x\n", start + (i+3)*4); - dops[i + 3].itype = NOP; - } - } - i = slen; - if (i > 10 && source[i-1] == 0 && source[i-2] == 0x03e00008 - && source[i-4] == 0x8fbf0018 && source[i-6] == 0x00c0f809 - && dops[i-7].itype == STORE) - { - i = i-8; - if (dops[i].itype == IMM16) - i--; - // swl r2, 15(r6); swr r2, 12(r6); sw r6, *; jalr r6 - if (dops[i].itype == STORELR && dops[i].rs1 == 6 - && dops[i-1].itype == STORELR && dops[i-1].rs1 == 6) - { - SysPrintf("F1 hack from %08x, old dst %08x\n", start, hack_addr); - f1_hack = 1; - return 1; - } - } - return 0; -} - -int new_recompile_block(u_int addr) -{ - u_int pagelimit = 0; - u_int state_rflags = 0; - int i; - - assem_debug("NOTCOMPILED: addr = %x -> %p\n", addr, out); - //printf("TRACE: count=%d next=%d (compile %x)\n",Count,next_interupt,addr); - //if(debug) - //printf("fpu mapping=%x enabled=%x\n",(Status & 0x04000000)>>26,(Status & 0x20000000)>>29); - - // this is just for speculation - for (i = 1; i < 32; i++) { - if ((psxRegs.GPR.r[i] & 0xffff0000) == 0x1f800000) - state_rflags |= 1 << i; - } - - start = (u_int)addr&~3; - //assert(((u_int)addr&1)==0); // start-in-delay-slot flag - new_dynarec_did_compile=1; - if (Config.HLE && start == 0x80001000) // hlecall - { - // XXX: is this enough? Maybe check hleSoftCall? - void *beginning=start_block(); - u_int page=get_page(start); - - invalid_code[start>>12]=0; - emit_movimm(start,0); - emit_writeword(0,&pcaddr); - emit_far_jump(new_dyna_leave); - literal_pool(0); - end_block(beginning); - ll_add_flags(jump_in+page,start,state_rflags,(void *)beginning); - return 0; - } - else if (f1_hack && hack_addr == 0) { - void *beginning = start_block(); - u_int page = get_page(start); - emit_movimm(start, 0); - emit_writeword(0, &hack_addr); - emit_readword(&psxRegs.GPR.n.sp, 0); - emit_readptr(&mem_rtab, 1); - emit_shrimm(0, 12, 2); - emit_readptr_dualindexedx_ptrlen(1, 2, 1); - emit_addimm(0, 0x18, 0); - emit_adds_ptr(1, 1, 1); - emit_ldr_dualindexed(1, 0, 0); - emit_writeword(0, &psxRegs.GPR.r[26]); // lw k0, 0x18(sp) - emit_far_call(get_addr_ht); - emit_jmpreg(0); // jr k0 - literal_pool(0); - end_block(beginning); - - ll_add_flags(jump_in + page, start, state_rflags, beginning); - SysPrintf("F1 hack to %08x\n", start); - return 0; - } + for (i = 1; i < 32; i++) + psxRegs.GPR.r[i] = 0x80000000; - cycle_multiplier_active = cycle_multiplier_override && cycle_multiplier == CYCLE_MULT_DEFAULT - ? cycle_multiplier_override : cycle_multiplier; + for (b = 0; b < count; b++) { + for (f = blocks[b].regflags, i = 0; f; f >>= 1, i++) { + if (f & 1) + psxRegs.GPR.r[i] = 0x1f800000; + } - source = get_source_start(start, &pagelimit); - if (source == NULL) { - if (addr != hack_addr) { - SysPrintf("Compile at bogus memory address: %08x\n", addr); - hack_addr = addr; + get_addr(blocks[b].addr); + + for (f = blocks[b].regflags, i = 0; f; f >>= 1, i++) { + if (f & 1) + psxRegs.GPR.r[i] = 0x80000000; } - //abort(); - return -1; } - /* Pass 1: disassemble */ - /* Pass 2: register dependencies, branch targets */ - /* Pass 3: register allocation */ - /* Pass 4: branch dependencies */ - /* Pass 5: pre-alloc */ - /* Pass 6: optimize clean/dirty state */ - /* Pass 7: flag 32-bit registers */ - /* Pass 8: assembly */ - /* Pass 9: linker */ - /* Pass 10: garbage collection / free memory */ + memcpy(&psxRegs.GPR, regs_save, sizeof(regs_save)); +} - int j; - int done = 0, ni_count = 0; - unsigned int type,op,op2; +void new_dynarec_print_stats(void) +{ +#ifdef STAT_PRINT + printf("cc %3d,%3d,%3d lu%3d,%3d c%3d inv%3d,%3d tc_offs %zu\n", + stat_bc_pre, stat_bc_direct, stat_bc_restore, + stat_jump_in_lookups, stat_restore_tries, stat_restore_compares, + stat_inv_addr_calls, stat_inv_hits, + out - ndrc->translation_cache); + stat_bc_direct = stat_bc_pre = stat_bc_restore = + stat_jump_in_lookups = stat_restore_tries = stat_restore_compares = + stat_inv_addr_calls = stat_inv_hits = 0; +#endif +} - //printf("addr = %x source = %x %x\n", addr,source,source[0]); +static int apply_hacks(void) +{ + int i; + if (HACK_ENABLED(NDHACK_NO_COMPAT_HACKS)) + return 0; + /* special hack(s) */ + for (i = 0; i < slen - 4; i++) + { + // lui a4, 0xf200; jal ; addu a0, 2; slti v0, 28224 + if (source[i] == 0x3c04f200 && dops[i+1].itype == UJUMP + && source[i+2] == 0x34840002 && dops[i+3].opcode == 0x0a + && imm[i+3] == 0x6e40 && dops[i+3].rs1 == 2) + { + SysPrintf("PE2 hack @%08x\n", start + (i+3)*4); + dops[i + 3].itype = NOP; + } + } + i = slen; + if (i > 10 && source[i-1] == 0 && source[i-2] == 0x03e00008 + && source[i-4] == 0x8fbf0018 && source[i-6] == 0x00c0f809 + && dops[i-7].itype == STORE) + { + i = i-8; + if (dops[i].itype == IMM16) + i--; + // swl r2, 15(r6); swr r2, 12(r6); sw r6, *; jalr r6 + if (dops[i].itype == STORELR && dops[i].rs1 == 6 + && dops[i-1].itype == STORELR && dops[i-1].rs1 == 6) + { + SysPrintf("F1 hack from %08x, old dst %08x\n", start, hack_addr); + f1_hack = 1; + return 1; + } + } + return 0; +} - /* Pass 1 disassembly */ +static noinline void pass1_disassemble(u_int pagelimit) +{ + int i, j, done = 0, ni_count = 0; + unsigned int type,op,op2; for (i = 0; !done; i++) { @@ -7421,7 +6836,7 @@ int new_recompile_block(u_int addr) case 0x3A: set_mnemonic(i, "SWC2"); type=C2LS; break; case 0x3B: set_mnemonic(i, "HLECALL"); type=HLECALL; break; default: set_mnemonic(i, "???"); type=NI; - SysPrintf("NI %08x @%08x (%08x)\n", source[i], addr + i*4, addr); + SysPrintf("NI %08x @%08x (%08x)\n", source[i], start + i*4, start); break; } dops[i].itype=type; @@ -7660,7 +7075,7 @@ int new_recompile_block(u_int addr) // branch in delay slot? if (dops[i].is_jump) { // don't handle first branch and call interpreter if it's hit - SysPrintf("branch in delay slot @%08x (%08x)\n", addr + i*4, addr); + SysPrintf("branch in delay slot @%08x (%08x)\n", start + i*4, start); do_in_intrp=1; } // basic load delay detection @@ -7668,14 +7083,14 @@ int new_recompile_block(u_int addr) int t=(ba[i-1]-start)/4; if(0 <= t && t < i &&(dops[i].rt1==dops[t].rs1||dops[i].rt1==dops[t].rs2)&&dops[t].itype!=CJUMP&&dops[t].itype!=SJUMP) { // jump target wants DS result - potential load delay effect - SysPrintf("load delay @%08x (%08x)\n", addr + i*4, addr); + SysPrintf("load delay @%08x (%08x)\n", start + i*4, start); do_in_intrp=1; dops[t+1].bt=1; // expected return from interpreter } else if(i>=2&&dops[i-2].rt1==2&&dops[i].rt1==2&&dops[i].rs1!=2&&dops[i].rs2!=2&&dops[i-1].rs1!=2&&dops[i-1].rs2!=2&& !(i>=3&&dops[i-3].is_jump)) { // v0 overwrite like this is a sign of trouble, bail out - SysPrintf("v0 overwrite @%08x (%08x)\n", addr + i*4, addr); + SysPrintf("v0 overwrite @%08x (%08x)\n", start + i*4, start); do_in_intrp=1; } } @@ -7691,8 +7106,24 @@ int new_recompile_block(u_int addr) /* Is this the end of the block? */ if (i > 0 && dops[i-1].is_ujump) { - if(dops[i-1].rt1==0) { // Continue past subroutine call (JAL) - done=2; + if (dops[i-1].rt1 == 0) { // not jal + int found_bbranch = 0, t = (ba[i-1] - start) / 4; + if ((u_int)(t - i) < 64 && start + (t+64)*4 < pagelimit) { + // scan for a branch back to i+1 + for (j = t; j < t + 64; j++) { + int tmpop = source[j] >> 26; + if (tmpop == 1 || ((tmpop & ~3) == 4)) { + int t2 = j + 1 + (int)(signed short)source[j]; + if (t2 == i + 1) { + //printf("blk expand %08x<-%08x\n", start + (i+1)*4, start + j*4); + found_bbranch = 1; + break; + } + } + } + } + if (!found_bbranch) + done = 2; } else { if(stop_after_jal) done=1; @@ -7732,15 +7163,164 @@ int new_recompile_block(u_int addr) } } assert(slen>0); +} - int clear_hack_addr = apply_hacks(); - - /* Pass 2 - Register dependencies and branch targets */ +// Basic liveness analysis for MIPS registers +static noinline void pass2_unneeded_regs(int istart,int iend,int r) +{ + int i; + uint64_t u,gte_u,b,gte_b; + uint64_t temp_u,temp_gte_u=0; + uint64_t gte_u_unknown=0; + if (HACK_ENABLED(NDHACK_GTE_UNNEEDED)) + gte_u_unknown=~0ll; + if(iend==slen-1) { + u=1; + gte_u=gte_u_unknown; + }else{ + //u=unneeded_reg[iend+1]; + u=1; + gte_u=gte_unneeded[iend+1]; + } - unneeded_registers(0,slen-1,0); + for (i=iend;i>=istart;i--) + { + //printf("unneeded registers i=%d (%d,%d) r=%d\n",i,istart,iend,r); + if(dops[i].is_jump) + { + // If subroutine call, flag return address as a possible branch target + if(dops[i].rt1==31 && i=(start+slen*4)) + { + // Branch out of this block, flush all regs + u=1; + gte_u=gte_u_unknown; + branch_unneeded_reg[i]=u; + // Merge in delay slot + u|=(1LL<>2].bt=1; + if(ba[i]<=start+i*4) { + // Backward branch + if(dops[i].is_ujump) + { + // Unconditional branch + temp_u=1; + temp_gte_u=0; + } else { + // Conditional branch (not taken case) + temp_u=unneeded_reg[i+2]; + temp_gte_u&=gte_unneeded[i+2]; + } + // Merge in delay slot + temp_u|=(1LL<>2,i-1,r+1); + }else{ + unneeded_reg[(ba[i]-start)>>2]=1; + gte_unneeded[(ba[i]-start)>>2]=gte_u_unknown; + } + } /*else*/ if(1) { + if (dops[i].is_ujump) + { + // Unconditional branch + u=unneeded_reg[(ba[i]-start)>>2]; + gte_u=gte_unneeded[(ba[i]-start)>>2]; + branch_unneeded_reg[i]=u; + // Merge in delay slot + u|=(1LL<>2]; + gte_b=gte_unneeded[(ba[i]-start)>>2]; + branch_unneeded_reg[i]=b; + // Branch delay slot + b|=(1LL<>r)&1) { + if(r==HIREG) printf(" HI"); + else if(r==LOREG) printf(" LO"); + else printf(" r%d",r); + } + } + printf("\n"); + */ + } +} +static noinline void pass3_register_alloc(u_int addr) +{ struct regstat current; // Current register allocations/status clear_all_regs(current.regmap_entry); clear_all_regs(current.regmap); @@ -7754,9 +7334,10 @@ int new_recompile_block(u_int addr) current.waswritten = 0; int ds=0; int cc=0; - int hr=-1; + int hr; + int i, j; - if((u_int)addr&1) { + if (addr & 1) { // First instruction is delay slot cc=-1; dops[1].bt=1; @@ -7769,7 +7350,6 @@ int new_recompile_block(u_int addr) { if(dops[i].bt) { - int hr; for(hr=0;hr=0;i--) { int hr; + __builtin_prefetch(regs[i-2].regmap); if(dops[i].is_jump) { if(ba[i]=(start+slen*4)) @@ -8429,7 +8013,7 @@ int new_recompile_block(u_int addr) if (!dops[i].is_ujump) { if(i=0&&get_reg(regs[i+2].regmap_entry,regmap_pre[i+2][hr])<0) nr&=~(1< 0 && !dops[i].bt && regs[i].wasdirty) for(hr=0;hr0&&!dops[i].bt&&((regs[i].wasdirty>>hr)&1)) { + if((regs[i].wasdirty>>hr)&1) { if((regmap_pre[i][hr]>0&&!((unneeded_reg[i]>>regmap_pre[i][hr])&1))) { if(dops[i-1].rt1==regmap_pre[i][hr]) nr|=1<=0) { + if(f_regmap[hr]!=regs[i].regmap[hr]) { + // dealloc old register + int n; + for(n=0;n %x\n",start+k*4,start+j*4); + while(ki&&f_regmap[HOST_CCREG]==CCREG) + { + //printf("Extend backwards\n"); + int k; + k=i; + while(regs[k-1].regmap[HOST_CCREG]==-1) { + if(count_free_regs(regs[k-1].regmap)<=minimum_free_regs[k-1]) { + //printf("no free regs for store %x\n",start+(k-1)*4); + break; + } + k--; + } + if(regs[k-1].regmap[HOST_CCREG]==CCREG) { + //printf("Extend CC, %x ->\n",start+k*4); + while(k<=i) { + regs[k].regmap_entry[HOST_CCREG]=CCREG; + regs[k].regmap[HOST_CCREG]=CCREG; + regmap_pre[k+1][HOST_CCREG]=CCREG; + regs[k+1].wasdirty|=1<\n",start+k*4); + } + } + } + if(dops[i].itype!=STORE&&dops[i].itype!=STORELR&&dops[i].itype!=C1LS&&dops[i].itype!=SHIFT&& + dops[i].itype!=NOP&&dops[i].itype!=MOV&&dops[i].itype!=ALU&&dops[i].itype!=SHIFTIMM&& + dops[i].itype!=IMM16&&dops[i].itype!=LOAD&&dops[i].itype!=COP1) + { + memcpy(f_regmap,regs[i].regmap,sizeof(f_regmap)); + } + } + } +} + +// This allocates registers (if possible) one instruction prior +// to use, which can avoid a load-use penalty on certain CPUs. +static noinline void pass5b_preallocate2(void) +{ + int i, hr; + for(i=0;i=0) + { + if(regs[i].regmap[hr]<0&®s[i+1].regmap_entry[hr]<0) + { + regs[i].regmap[hr]=regs[i+1].regmap[hr]; + regmap_pre[i+1][hr]=regs[i+1].regmap[hr]; + regs[i+1].regmap_entry[hr]=regs[i+1].regmap[hr]; + regs[i].isconst&=~(1<=0) + { + if(regs[i].regmap[hr]<0&®s[i+1].regmap_entry[hr]<0) + { + regs[i].regmap[hr]=regs[i+1].regmap[hr]; + regmap_pre[i+1][hr]=regs[i+1].regmap[hr]; + regs[i+1].regmap_entry[hr]=regs[i+1].regmap[hr]; + regs[i].isconst&=~(1<=0) + { + if(regs[i].regmap[hr]<0&®s[i+1].regmap_entry[hr]<0) + { + regs[i].regmap[hr]=dops[i+1].rs1; + regmap_pre[i+1][hr]=dops[i+1].rs1; + regs[i+1].regmap_entry[hr]=dops[i+1].rs1; + regs[i].isconst&=~(1<=0) + { + if(regs[i].regmap[hr]<0&®s[i+1].regmap_entry[hr]<0) + { + regs[i].regmap[hr]=dops[i+1].rs1; + regmap_pre[i+1][hr]=dops[i+1].rs1; + regs[i+1].regmap_entry[hr]=dops[i+1].rs1; + regs[i].isconst&=~(1<=0); + if(regs[i].regmap[hr]<0&®s[i+1].regmap_entry[hr]<0) + { + regs[i].regmap[hr]=dops[i+1].rs1; + regmap_pre[i+1][hr]=dops[i+1].rs1; + regs[i+1].regmap_entry[hr]=dops[i+1].rs1; + regs[i].isconst&=~(1<=0); + if(regs[i].regmap[hr]<0&®s[i+1].regmap_entry[hr]<0) + { + regs[i].regmap[hr]=dops[i+1].rs1; + regmap_pre[i+1][hr]=dops[i+1].rs1; + regs[i+1].regmap_entry[hr]=dops[i+1].rs1; + regs[i].isconst&=~(1<=0) + { + // move it to another register + regs[i+1].regmap[hr]=-1; + regmap_pre[i+2][hr]=-1; + regs[i+1].regmap[nr]=FTEMP; + regmap_pre[i+2][nr]=FTEMP; + regs[i].regmap[nr]=dops[i+1].rs1; + regmap_pre[i+1][nr]=dops[i+1].rs1; + regs[i+1].regmap_entry[nr]=dops[i+1].rs1; + regs[i].isconst&=~(1<=0&®s[i].regmap[hr]<0) { + int rs=get_reg(regs[i+1].regmap,dops[i+1].rs1); + if(rs>=0&&((regs[i+1].wasconst>>rs)&1)) { + regs[i].regmap[hr]=AGEN1+((i+1)&1); + regmap_pre[i+1][hr]=AGEN1+((i+1)&1); + regs[i+1].regmap_entry[hr]=AGEN1+((i+1)&1); + regs[i].isconst&=~(1<=istart;i--) + { + signed char rregmap_i[RRMAP_SIZE]; + u_int hr_candirty = 0; + assert(HOST_REGS < 32); + make_rregs(regs[i].regmap, rregmap_i, &hr_candirty); + __builtin_prefetch(regs[i-1].regmap); + if(dops[i].is_jump) + { + signed char branch_rregmap_i[RRMAP_SIZE]; + u_int branch_hr_candirty = 0; + make_rregs(branch_regs[i].regmap, branch_rregmap_i, &branch_hr_candirty); + if(ba[i]=(start+slen*4)) + { + // Branch out of this block, flush all regs + will_dirty_i = 0; + will_dirty_i |= 1u << (get_rreg(branch_rregmap_i, dops[i].rt1) & 31); + will_dirty_i |= 1u << (get_rreg(branch_rregmap_i, dops[i].rt2) & 31); + will_dirty_i |= 1u << (get_rreg(branch_rregmap_i, dops[i+1].rt1) & 31); + will_dirty_i |= 1u << (get_rreg(branch_rregmap_i, dops[i+1].rt2) & 31); + will_dirty_i |= 1u << (get_rreg(branch_rregmap_i, CCREG) & 31); + will_dirty_i &= branch_hr_candirty; + if (dops[i].is_ujump) + { + // Unconditional branch + wont_dirty_i = 0; + // Merge in delay slot (will dirty) + will_dirty_i |= 1u << (get_rreg(rregmap_i, dops[i].rt1) & 31); + will_dirty_i |= 1u << (get_rreg(rregmap_i, dops[i].rt2) & 31); + will_dirty_i |= 1u << (get_rreg(rregmap_i, dops[i+1].rt1) & 31); + will_dirty_i |= 1u << (get_rreg(rregmap_i, dops[i+1].rt2) & 31); + will_dirty_i |= 1u << (get_rreg(rregmap_i, CCREG) & 31); + will_dirty_i &= hr_candirty; + } + else + { + // Conditional branch + wont_dirty_i = wont_dirty_next; + // Merge in delay slot (will dirty) + // (the original code had no explanation why these 2 are commented out) + //will_dirty_i |= 1u << (get_rreg(rregmap_i, dops[i].rt1) & 31); + //will_dirty_i |= 1u << (get_rreg(rregmap_i, dops[i].rt2) & 31); + will_dirty_i |= 1u << (get_rreg(rregmap_i, dops[i+1].rt1) & 31); + will_dirty_i |= 1u << (get_rreg(rregmap_i, dops[i+1].rt2) & 31); + will_dirty_i |= 1u << (get_rreg(rregmap_i, CCREG) & 31); + will_dirty_i &= hr_candirty; + } + // Merge in delay slot (wont dirty) + wont_dirty_i |= 1u << (get_rreg(rregmap_i, dops[i].rt1) & 31); + wont_dirty_i |= 1u << (get_rreg(rregmap_i, dops[i].rt2) & 31); + wont_dirty_i |= 1u << (get_rreg(rregmap_i, dops[i+1].rt1) & 31); + wont_dirty_i |= 1u << (get_rreg(rregmap_i, dops[i+1].rt2) & 31); + wont_dirty_i |= 1u << (get_rreg(rregmap_i, CCREG) & 31); + wont_dirty_i |= 1u << (get_rreg(branch_rregmap_i, dops[i].rt1) & 31); + wont_dirty_i |= 1u << (get_rreg(branch_rregmap_i, dops[i].rt2) & 31); + wont_dirty_i |= 1u << (get_rreg(branch_rregmap_i, dops[i+1].rt1) & 31); + wont_dirty_i |= 1u << (get_rreg(branch_rregmap_i, dops[i+1].rt2) & 31); + wont_dirty_i |= 1u << (get_rreg(branch_rregmap_i, CCREG) & 31); + wont_dirty_i &= ~(1u << 31); + if(wr) { + #ifndef DESTRUCTIVE_WRITEBACK + branch_regs[i].dirty&=wont_dirty_i; + #endif + branch_regs[i].dirty|=will_dirty_i; + } + } + else { - if(hr!=EXCLUDE_REG) { - if(regs[i].regmap[hr]>=0) { - if(f_regmap[hr]!=regs[i].regmap[hr]) { - // dealloc old register - int n; - for(n=0;n0 && regmap_pre[i][r]<34) { + temp_will_dirty|=((unneeded_reg[i]>>regmap_pre[i][r])&1)<>regmap_pre[i][r])&1)< %x\n",start+k*4,start+j*4); - while(k>2,i-1,0); + }else{ + // Limit recursion. It can take an excessive amount + // of time if there are a lot of nested loops. + will_dirty[(ba[i]-start)>>2]=0; + wont_dirty[(ba[i]-start)>>2]=-1; } - regs[j].regmap_entry[HOST_CCREG]=CCREG; } - // Work backwards from the branch target - if(j>i&&f_regmap[HOST_CCREG]==CCREG) + /*else*/ if(1) { - //printf("Extend backwards\n"); - int k; - k=i; - while(regs[k-1].regmap[HOST_CCREG]==-1) { - if(count_free_regs(regs[k-1].regmap)<=minimum_free_regs[k-1]) { - //printf("no free regs for store %x\n",start+(k-1)*4); - break; + if (dops[i].is_ujump) + { + // Unconditional branch + will_dirty_i=0; + wont_dirty_i=0; + //if(ba[i]>start+i*4) { // Disable recursion (for debugging) + for(r=0;r>2].regmap_entry[r]) { + will_dirty_i|=will_dirty[(ba[i]-start)>>2]&(1<>2]&(1<=0) { + will_dirty_i|=((unneeded_reg[(ba[i]-start)>>2]>>branch_regs[i].regmap[r])&1)<>2]>>branch_regs[i].regmap[r])&1)<\n",start+k*4); - while(k<=i) { - regs[k].regmap_entry[HOST_CCREG]=CCREG; - regs[k].regmap[HOST_CCREG]=CCREG; - regmap_pre[k+1][HOST_CCREG]=CCREG; - regs[k+1].wasdirty|=1<start+i*4) // Disable recursion (for debugging) + for(r=0;r>2].regmap_entry[r]) { + will_dirty_i&=will_dirty[(ba[i]-start)>>2]&(1<>2]&(1<=0) { + will_dirty_i&=((unneeded_reg[(ba[i]-start)>>2]>>target_reg)&1)<>2]>>target_reg)&1)<\n",start+k*4); + // Merge in delay slot (won't dirty) + wont_dirty_i |= 1u << (get_rreg(rregmap_i, dops[i].rt1) & 31); + wont_dirty_i |= 1u << (get_rreg(rregmap_i, dops[i].rt2) & 31); + wont_dirty_i |= 1u << (get_rreg(rregmap_i, dops[i+1].rt1) & 31); + wont_dirty_i |= 1u << (get_rreg(rregmap_i, dops[i+1].rt2) & 31); + wont_dirty_i |= 1u << (get_rreg(rregmap_i, CCREG) & 31); + wont_dirty_i |= 1u << (get_rreg(branch_rregmap_i, dops[i].rt1) & 31); + wont_dirty_i |= 1u << (get_rreg(branch_rregmap_i, dops[i].rt2) & 31); + wont_dirty_i |= 1u << (get_rreg(branch_rregmap_i, dops[i+1].rt1) & 31); + wont_dirty_i |= 1u << (get_rreg(branch_rregmap_i, dops[i+1].rt2) & 31); + wont_dirty_i |= 1u << (get_rreg(branch_rregmap_i, CCREG) & 31); + wont_dirty_i &= ~(1u << 31); + if(wr) { + #ifndef DESTRUCTIVE_WRITEBACK + branch_regs[i].dirty&=wont_dirty_i; + #endif + branch_regs[i].dirty|=will_dirty_i; } } } - if(dops[i].itype!=STORE&&dops[i].itype!=STORELR&&dops[i].itype!=C1LS&&dops[i].itype!=SHIFT&& - dops[i].itype!=NOP&&dops[i].itype!=MOV&&dops[i].itype!=ALU&&dops[i].itype!=SHIFTIMM&& - dops[i].itype!=IMM16&&dops[i].itype!=LOAD&&dops[i].itype!=COP1) - { - memcpy(f_regmap,regs[i].regmap,sizeof(f_regmap)); - } } - } - - // This allocates registers (if possible) one instruction prior - // to use, which can avoid a load-use penalty on certain CPUs. - for(i=0;i istart && !dops[i].is_jump) { + // Don't store a register immediately after writing it, + // may prevent dual-issue. + wont_dirty_i |= 1u << (get_rreg(rregmap_i, dops[i-1].rt1) & 31); + wont_dirty_i |= 1u << (get_rreg(rregmap_i, dops[i-1].rt2) & 31); + } + // Save it + will_dirty[i]=will_dirty_i; + wont_dirty[i]=wont_dirty_i; + // Mark registers that won't be dirtied as not dirty + if(wr) { + regs[i].dirty|=will_dirty_i; + #ifndef DESTRUCTIVE_WRITEBACK + regs[i].dirty&=wont_dirty_i; + if(dops[i].is_jump) { - if(dops[i+1].rs1) { - if((hr=get_reg(regs[i+1].regmap,dops[i+1].rs1))>=0) - { - if(regs[i].regmap[hr]<0&®s[i+1].regmap_entry[hr]<0) - { - regs[i].regmap[hr]=regs[i+1].regmap[hr]; - regmap_pre[i+1][hr]=regs[i+1].regmap[hr]; - regs[i+1].regmap_entry[hr]=regs[i+1].regmap[hr]; - regs[i].isconst&=~(1<=0) - { - if(regs[i].regmap[hr]<0&®s[i+1].regmap_entry[hr]<0) - { - regs[i].regmap[hr]=regs[i+1].regmap[hr]; - regmap_pre[i+1][hr]=regs[i+1].regmap[hr]; - regs[i+1].regmap_entry[hr]=regs[i+1].regmap[hr]; - regs[i].isconst&=~(1<=0) - { - if(regs[i].regmap[hr]<0&®s[i+1].regmap_entry[hr]<0) - { - regs[i].regmap[hr]=dops[i+1].rs1; - regmap_pre[i+1][hr]=dops[i+1].rs1; - regs[i+1].regmap_entry[hr]=dops[i+1].rs1; - regs[i].isconst&=~(1<=0) - { - if(regs[i].regmap[hr]<0&®s[i+1].regmap_entry[hr]<0) - { - regs[i].regmap[hr]=dops[i+1].rs1; - regmap_pre[i+1][hr]=dops[i+1].rs1; - regs[i+1].regmap_entry[hr]=dops[i+1].rs1; - regs[i].isconst&=~(1<>r)&1));*/} } } } - // Address for store instruction (non-constant) - if(dops[i+1].itype==STORE||dops[i+1].itype==STORELR - ||(dops[i+1].opcode&0x3b)==0x39||(dops[i+1].opcode&0x3b)==0x3a) { // SB/SH/SW/SD/SWC1/SDC1/SWC2/SDC2 - if(get_reg(regs[i+1].regmap,dops[i+1].rs1)<0) { - hr=get_reg2(regs[i].regmap,regs[i+1].regmap,-1); - if(hr<0) hr=get_reg_temp(regs[i+1].regmap); - else { - regs[i+1].regmap[hr]=AGEN1+((i+1)&1); - regs[i+1].isconst&=~(1<=0); - if(regs[i].regmap[hr]<0&®s[i+1].regmap_entry[hr]<0) - { - regs[i].regmap[hr]=dops[i+1].rs1; - regmap_pre[i+1][hr]=dops[i+1].rs1; - regs[i+1].regmap_entry[hr]=dops[i+1].rs1; - regs[i].isconst&=~(1<>r)&1));*/} } } } - if(dops[i+1].itype==LOADLR||(dops[i+1].opcode&0x3b)==0x31||(dops[i+1].opcode&0x3b)==0x32) { // LWC1/LDC1, LWC2/LDC2 - if(get_reg(regs[i+1].regmap,dops[i+1].rs1)<0) { - int nr; - hr=get_reg(regs[i+1].regmap,FTEMP); - assert(hr>=0); - if(regs[i].regmap[hr]<0&®s[i+1].regmap_entry[hr]<0) - { - regs[i].regmap[hr]=dops[i+1].rs1; - regmap_pre[i+1][hr]=dops[i+1].rs1; - regs[i+1].regmap_entry[hr]=dops[i+1].rs1; - regs[i].isconst&=~(1<=0) - { - // move it to another register - regs[i+1].regmap[hr]=-1; - regmap_pre[i+2][hr]=-1; - regs[i+1].regmap[nr]=FTEMP; - regmap_pre[i+2][nr]=FTEMP; - regs[i].regmap[nr]=dops[i+1].rs1; - regmap_pre[i+1][nr]=dops[i+1].rs1; - regs[i+1].regmap_entry[nr]=dops[i+1].rs1; - regs[i].isconst&=~(1<=0&®s[i].regmap[hr]<0) { - int rs=get_reg(regs[i+1].regmap,dops[i+1].rs1); - if(rs>=0&&((regs[i+1].wasconst>>rs)&1)) { - regs[i].regmap[hr]=AGEN1+((i+1)&1); - regmap_pre[i+1][hr]=AGEN1+((i+1)&1); - regs[i+1].regmap_entry[hr]=AGEN1+((i+1)&1); - regs[i].isconst&=~(1<=0&&(nr=get_rreg(rregmap_i,regmap_pre[i][r]))>=0) { + // Register moved to a different register + will_dirty_i&=~(1<>nr)&1)<>nr)&1)<0 && regmap_pre[i][r]<34) { + will_dirty_i|=((unneeded_reg[i]>>regmap_pre[i][r])&1)<>regmap_pre[i][r])&1)<>r)&1));*/ } } } } } +} + +static noinline void pass10_expire_blocks(void) +{ + int i, end; + end = (((out-ndrc->translation_cache)>>(TARGET_SIZE_2-16)) + 16384) & 65535; + while (expirep != end) + { + int shift=TARGET_SIZE_2-3; // Divide into 8 blocks + uintptr_t base_offs = ((uintptr_t)(expirep >> 13) << shift); // Base offset of this block + uintptr_t base_offs_s = base_offs >> shift; + inv_debug("EXP: Phase %d\n",expirep); + switch((expirep>>11)&3) + { + case 0: + // Clear jump_in and jump_dirty + ll_remove_matching_addrs(jump_in+(expirep&2047),base_offs_s,shift); + ll_remove_matching_addrs(jump_dirty+(expirep&2047),base_offs_s,shift); + ll_remove_matching_addrs(jump_in+2048+(expirep&2047),base_offs_s,shift); + ll_remove_matching_addrs(jump_dirty+2048+(expirep&2047),base_offs_s,shift); + break; + case 1: + // Clear pointers + ll_kill_pointers(jump_out[expirep&2047],base_offs_s,shift); + ll_kill_pointers(jump_out[(expirep&2047)+2048],base_offs_s,shift); + break; + case 2: + // Clear hash table + for(i=0;i<32;i++) { + struct ht_entry *ht_bin = &hash_table[((expirep&2047)<<5)+i]; + uintptr_t o1 = (u_char *)ht_bin->tcaddr[1] - ndrc->translation_cache; + uintptr_t o2 = o1 - MAX_OUTPUT_BLOCK_SIZE; + if ((o1 >> shift) == base_offs_s || (o2 >> shift) == base_offs_s) { + inv_debug("EXP: Remove hash %x -> %p\n",ht_bin->vaddr[1],ht_bin->tcaddr[1]); + ht_bin->vaddr[1] = -1; + ht_bin->tcaddr[1] = NULL; + } + o1 = (u_char *)ht_bin->tcaddr[0] - ndrc->translation_cache; + o2 = o1 - MAX_OUTPUT_BLOCK_SIZE; + if ((o1 >> shift) == base_offs_s || (o2 >> shift) == base_offs_s) { + inv_debug("EXP: Remove hash %x -> %p\n",ht_bin->vaddr[0],ht_bin->tcaddr[0]); + ht_bin->vaddr[0] = ht_bin->vaddr[1]; + ht_bin->tcaddr[0] = ht_bin->tcaddr[1]; + ht_bin->vaddr[1] = -1; + ht_bin->tcaddr[1] = NULL; + } + } + break; + case 3: + // Clear jump_out + if((expirep&2047)==0) + do_clear_cache(); + ll_remove_matching_addrs(jump_out+(expirep&2047),base_offs_s,shift); + ll_remove_matching_addrs(jump_out+2048+(expirep&2047),base_offs_s,shift); + break; + } + expirep=(expirep+1)&65535; + } +} + +int new_recompile_block(u_int addr) +{ + u_int pagelimit = 0; + u_int state_rflags = 0; + int i; + + assem_debug("NOTCOMPILED: addr = %x -> %p\n", addr, out); + + // this is just for speculation + for (i = 1; i < 32; i++) { + if ((psxRegs.GPR.r[i] & 0xffff0000) == 0x1f800000) + state_rflags |= 1 << i; + } + + start = (u_int)addr&~3; + //assert(((u_int)addr&1)==0); // start-in-delay-slot flag + new_dynarec_did_compile=1; + if (Config.HLE && start == 0x80001000) // hlecall + { + // XXX: is this enough? Maybe check hleSoftCall? + void *beginning=start_block(); + u_int page=get_page(start); + + invalid_code[start>>12]=0; + emit_movimm(start,0); + emit_writeword(0,&pcaddr); + emit_far_jump(new_dyna_leave); + literal_pool(0); + end_block(beginning); + ll_add_flags(jump_in+page,start,state_rflags,(void *)beginning); + return 0; + } + else if (f1_hack && hack_addr == 0) { + void *beginning = start_block(); + u_int page = get_page(start); + emit_movimm(start, 0); + emit_writeword(0, &hack_addr); + emit_readword(&psxRegs.GPR.n.sp, 0); + emit_readptr(&mem_rtab, 1); + emit_shrimm(0, 12, 2); + emit_readptr_dualindexedx_ptrlen(1, 2, 1); + emit_addimm(0, 0x18, 0); + emit_adds_ptr(1, 1, 1); + emit_ldr_dualindexed(1, 0, 0); + emit_writeword(0, &psxRegs.GPR.r[26]); // lw k0, 0x18(sp) + emit_far_call(get_addr_ht); + emit_jmpreg(0); // jr k0 + literal_pool(0); + end_block(beginning); + + ll_add_flags(jump_in + page, start, state_rflags, beginning); + SysPrintf("F1 hack to %08x\n", start); + return 0; + } + + cycle_multiplier_active = cycle_multiplier_override && cycle_multiplier == CYCLE_MULT_DEFAULT + ? cycle_multiplier_override : cycle_multiplier; + + source = get_source_start(start, &pagelimit); + if (source == NULL) { + if (addr != hack_addr) { + SysPrintf("Compile at bogus memory address: %08x\n", addr); + hack_addr = addr; + } + //abort(); + return -1; + } + + /* Pass 1: disassemble */ + /* Pass 2: register dependencies, branch targets */ + /* Pass 3: register allocation */ + /* Pass 4: branch dependencies */ + /* Pass 5: pre-alloc */ + /* Pass 6: optimize clean/dirty state */ + /* Pass 7: flag 32-bit registers */ + /* Pass 8: assembly */ + /* Pass 9: linker */ + /* Pass 10: garbage collection / free memory */ + + /* Pass 1 disassembly */ + + pass1_disassemble(pagelimit); + + int clear_hack_addr = apply_hacks(); + + /* Pass 2 - Register dependencies and branch targets */ + + pass2_unneeded_regs(0,slen-1,0); + + /* Pass 3 - Register allocation */ + + pass3_register_alloc(addr); + + /* Pass 4 - Cull unused host registers */ + + pass4_cull_unused_regs(); + + /* Pass 5 - Pre-allocate registers */ + + pass5a_preallocate1(); + pass5b_preallocate2(); /* Pass 6 - Optimize clean/dirty state */ - clean_registers(0,slen-1,1); + pass6_clean_registers(0, slen-1, 1); /* Pass 7 - Identify 32-bit registers */ for (i=slen-1;i>=0;i--) @@ -9087,145 +9194,12 @@ int new_recompile_block(u_int addr) dops[slen-1].bt=1; // Mark as a branch target so instruction can restart after exception } -#ifdef REG_ALLOC_PRINT - /* Debug/disassembly */ - for(i=0;i>r)&1) { - if(r==HIREG) printf(" HI"); - else if(r==LOREG) printf(" LO"); - else printf(" r%d",r); - } - } - printf("\n"); - #if defined(__i386__) || defined(__x86_64__) - printf("pre: eax=%d ecx=%d edx=%d ebx=%d ebp=%d esi=%d edi=%d\n",regmap_pre[i][0],regmap_pre[i][1],regmap_pre[i][2],regmap_pre[i][3],regmap_pre[i][5],regmap_pre[i][6],regmap_pre[i][7]); - #endif - #ifdef __arm__ - printf("pre: r0=%d r1=%d r2=%d r3=%d r4=%d r5=%d r6=%d r7=%d r8=%d r9=%d r10=%d r12=%d\n",regmap_pre[i][0],regmap_pre[i][1],regmap_pre[i][2],regmap_pre[i][3],regmap_pre[i][4],regmap_pre[i][5],regmap_pre[i][6],regmap_pre[i][7],regmap_pre[i][8],regmap_pre[i][9],regmap_pre[i][10],regmap_pre[i][12]); - #endif - #if defined(__i386__) || defined(__x86_64__) - printf("needs: "); - if(needed_reg[i]&1) printf("eax "); - if((needed_reg[i]>>1)&1) printf("ecx "); - if((needed_reg[i]>>2)&1) printf("edx "); - if((needed_reg[i]>>3)&1) printf("ebx "); - if((needed_reg[i]>>5)&1) printf("ebp "); - if((needed_reg[i]>>6)&1) printf("esi "); - if((needed_reg[i]>>7)&1) printf("edi "); - printf("\n"); - printf("entry: eax=%d ecx=%d edx=%d ebx=%d ebp=%d esi=%d edi=%d\n",regs[i].regmap_entry[0],regs[i].regmap_entry[1],regs[i].regmap_entry[2],regs[i].regmap_entry[3],regs[i].regmap_entry[5],regs[i].regmap_entry[6],regs[i].regmap_entry[7]); - printf("dirty: "); - if(regs[i].wasdirty&1) printf("eax "); - if((regs[i].wasdirty>>1)&1) printf("ecx "); - if((regs[i].wasdirty>>2)&1) printf("edx "); - if((regs[i].wasdirty>>3)&1) printf("ebx "); - if((regs[i].wasdirty>>5)&1) printf("ebp "); - if((regs[i].wasdirty>>6)&1) printf("esi "); - if((regs[i].wasdirty>>7)&1) printf("edi "); - #endif - #ifdef __arm__ - printf("entry: r0=%d r1=%d r2=%d r3=%d r4=%d r5=%d r6=%d r7=%d r8=%d r9=%d r10=%d r12=%d\n",regs[i].regmap_entry[0],regs[i].regmap_entry[1],regs[i].regmap_entry[2],regs[i].regmap_entry[3],regs[i].regmap_entry[4],regs[i].regmap_entry[5],regs[i].regmap_entry[6],regs[i].regmap_entry[7],regs[i].regmap_entry[8],regs[i].regmap_entry[9],regs[i].regmap_entry[10],regs[i].regmap_entry[12]); - printf("dirty: "); - if(regs[i].wasdirty&1) printf("r0 "); - if((regs[i].wasdirty>>1)&1) printf("r1 "); - if((regs[i].wasdirty>>2)&1) printf("r2 "); - if((regs[i].wasdirty>>3)&1) printf("r3 "); - if((regs[i].wasdirty>>4)&1) printf("r4 "); - if((regs[i].wasdirty>>5)&1) printf("r5 "); - if((regs[i].wasdirty>>6)&1) printf("r6 "); - if((regs[i].wasdirty>>7)&1) printf("r7 "); - if((regs[i].wasdirty>>8)&1) printf("r8 "); - if((regs[i].wasdirty>>9)&1) printf("r9 "); - if((regs[i].wasdirty>>10)&1) printf("r10 "); - if((regs[i].wasdirty>>12)&1) printf("r12 "); - #endif - printf("\n"); - disassemble_inst(i); - //printf ("ccadj[%d] = %d\n",i,ccadj[i]); - #if defined(__i386__) || defined(__x86_64__) - printf("eax=%d ecx=%d edx=%d ebx=%d ebp=%d esi=%d edi=%d dirty: ",regs[i].regmap[0],regs[i].regmap[1],regs[i].regmap[2],regs[i].regmap[3],regs[i].regmap[5],regs[i].regmap[6],regs[i].regmap[7]); - if(regs[i].dirty&1) printf("eax "); - if((regs[i].dirty>>1)&1) printf("ecx "); - if((regs[i].dirty>>2)&1) printf("edx "); - if((regs[i].dirty>>3)&1) printf("ebx "); - if((regs[i].dirty>>5)&1) printf("ebp "); - if((regs[i].dirty>>6)&1) printf("esi "); - if((regs[i].dirty>>7)&1) printf("edi "); - #endif - #ifdef __arm__ - printf("r0=%d r1=%d r2=%d r3=%d r4=%d r5=%d r6=%d r7=%d r8=%d r9=%d r10=%d r12=%d dirty: ",regs[i].regmap[0],regs[i].regmap[1],regs[i].regmap[2],regs[i].regmap[3],regs[i].regmap[4],regs[i].regmap[5],regs[i].regmap[6],regs[i].regmap[7],regs[i].regmap[8],regs[i].regmap[9],regs[i].regmap[10],regs[i].regmap[12]); - if(regs[i].dirty&1) printf("r0 "); - if((regs[i].dirty>>1)&1) printf("r1 "); - if((regs[i].dirty>>2)&1) printf("r2 "); - if((regs[i].dirty>>3)&1) printf("r3 "); - if((regs[i].dirty>>4)&1) printf("r4 "); - if((regs[i].dirty>>5)&1) printf("r5 "); - if((regs[i].dirty>>6)&1) printf("r6 "); - if((regs[i].dirty>>7)&1) printf("r7 "); - if((regs[i].dirty>>8)&1) printf("r8 "); - if((regs[i].dirty>>9)&1) printf("r9 "); - if((regs[i].dirty>>10)&1) printf("r10 "); - if((regs[i].dirty>>12)&1) printf("r12 "); - #endif - printf("\n"); - if(regs[i].isconst) { - printf("constants: "); - #if defined(__i386__) || defined(__x86_64__) - if(regs[i].isconst&1) printf("eax=%x ",(u_int)constmap[i][0]); - if((regs[i].isconst>>1)&1) printf("ecx=%x ",(u_int)constmap[i][1]); - if((regs[i].isconst>>2)&1) printf("edx=%x ",(u_int)constmap[i][2]); - if((regs[i].isconst>>3)&1) printf("ebx=%x ",(u_int)constmap[i][3]); - if((regs[i].isconst>>5)&1) printf("ebp=%x ",(u_int)constmap[i][5]); - if((regs[i].isconst>>6)&1) printf("esi=%x ",(u_int)constmap[i][6]); - if((regs[i].isconst>>7)&1) printf("edi=%x ",(u_int)constmap[i][7]); - #endif - #if defined(__arm__) || defined(__aarch64__) - int r; - for (r = 0; r < ARRAY_SIZE(constmap[i]); r++) - if ((regs[i].isconst >> r) & 1) - printf(" r%d=%x", r, (u_int)constmap[i][r]); - #endif - printf("\n"); - } - if(dops[i].is_jump) { - #if defined(__i386__) || defined(__x86_64__) - printf("branch(%d): eax=%d ecx=%d edx=%d ebx=%d ebp=%d esi=%d edi=%d dirty: ",i,branch_regs[i].regmap[0],branch_regs[i].regmap[1],branch_regs[i].regmap[2],branch_regs[i].regmap[3],branch_regs[i].regmap[5],branch_regs[i].regmap[6],branch_regs[i].regmap[7]); - if(branch_regs[i].dirty&1) printf("eax "); - if((branch_regs[i].dirty>>1)&1) printf("ecx "); - if((branch_regs[i].dirty>>2)&1) printf("edx "); - if((branch_regs[i].dirty>>3)&1) printf("ebx "); - if((branch_regs[i].dirty>>5)&1) printf("ebp "); - if((branch_regs[i].dirty>>6)&1) printf("esi "); - if((branch_regs[i].dirty>>7)&1) printf("edi "); - #endif - #ifdef __arm__ - printf("branch(%d): r0=%d r1=%d r2=%d r3=%d r4=%d r5=%d r6=%d r7=%d r8=%d r9=%d r10=%d r12=%d dirty: ",i,branch_regs[i].regmap[0],branch_regs[i].regmap[1],branch_regs[i].regmap[2],branch_regs[i].regmap[3],branch_regs[i].regmap[4],branch_regs[i].regmap[5],branch_regs[i].regmap[6],branch_regs[i].regmap[7],branch_regs[i].regmap[8],branch_regs[i].regmap[9],branch_regs[i].regmap[10],branch_regs[i].regmap[12]); - if(branch_regs[i].dirty&1) printf("r0 "); - if((branch_regs[i].dirty>>1)&1) printf("r1 "); - if((branch_regs[i].dirty>>2)&1) printf("r2 "); - if((branch_regs[i].dirty>>3)&1) printf("r3 "); - if((branch_regs[i].dirty>>4)&1) printf("r4 "); - if((branch_regs[i].dirty>>5)&1) printf("r5 "); - if((branch_regs[i].dirty>>6)&1) printf("r6 "); - if((branch_regs[i].dirty>>7)&1) printf("r7 "); - if((branch_regs[i].dirty>>8)&1) printf("r8 "); - if((branch_regs[i].dirty>>9)&1) printf("r9 "); - if((branch_regs[i].dirty>>10)&1) printf("r10 "); - if((branch_regs[i].dirty>>12)&1) printf("r12 "); - #endif - } - } -#endif // REG_ALLOC_PRINT - /* Pass 8 - Assembly */ linkcount=0;stubcount=0; - ds=0;is_delayslot=0; + is_delayslot=0; u_int dirty_pre=0; void *beginning=start_block(); + int ds = 0; if((u_int)addr&1) { ds=1; pagespan_ds(); @@ -9305,9 +9279,9 @@ int new_recompile_block(u_int addr) if(dops[i+1].rs2!=dops[i+1].rs1&&dops[i+1].rs2!=dops[i].rs1&&dops[i+1].rs2!=dops[i].rs2&&(dops[i+1].rs2!=dops[i].rt1||dops[i].rt1==0)) load_regs(regs[i].regmap_entry,regs[i].regmap,dops[i+1].rs2,dops[i+1].rs2); if (ram_offset && (dops[i+1].is_load || dops[i+1].is_store)) - load_regs(regs[i].regmap_entry,regs[i].regmap,ROREG,ROREG); + load_reg(regs[i].regmap_entry,regs[i].regmap,ROREG); if (dops[i+1].is_store) - load_regs(regs[i].regmap_entry,regs[i].regmap,INVCP,INVCP); + load_reg(regs[i].regmap_entry,regs[i].regmap,INVCP); } else if(i+1translation_cache; // Trap writes to any of the pages we compiled - for(i=start>>12;i<=(start+slen*4)>>12;i++) { - invalid_code[i]=0; - } - inv_code_start=inv_code_end=~0; - - // for PCSX we need to mark all mirrors too - if(get_page(start)<(RAM_SIZE>>12)) - for(i=start>>12;i<=(start+slen*4)>>12;i++) - invalid_code[((u_int)0x00000000>>12)|(i&0x1ff)]= - invalid_code[((u_int)0x80000000>>12)|(i&0x1ff)]= - invalid_code[((u_int)0xa0000000>>12)|(i&0x1ff)]=0; + mark_valid_code(start, slen*4); /* Pass 10 - Free memory by expiring oldest blocks */ - int end=(((out-ndrc->translation_cache)>>(TARGET_SIZE_2-16))+16384)&65535; - while(expirep!=end) - { - int shift=TARGET_SIZE_2-3; // Divide into 8 blocks - uintptr_t base_offs = ((uintptr_t)(expirep >> 13) << shift); // Base offset of this block - uintptr_t base_offs_s = base_offs >> shift; - inv_debug("EXP: Phase %d\n",expirep); - switch((expirep>>11)&3) - { - case 0: - // Clear jump_in and jump_dirty - ll_remove_matching_addrs(jump_in+(expirep&2047),base_offs_s,shift); - ll_remove_matching_addrs(jump_dirty+(expirep&2047),base_offs_s,shift); - ll_remove_matching_addrs(jump_in+2048+(expirep&2047),base_offs_s,shift); - ll_remove_matching_addrs(jump_dirty+2048+(expirep&2047),base_offs_s,shift); - break; - case 1: - // Clear pointers - ll_kill_pointers(jump_out[expirep&2047],base_offs_s,shift); - ll_kill_pointers(jump_out[(expirep&2047)+2048],base_offs_s,shift); - break; - case 2: - // Clear hash table - for(i=0;i<32;i++) { - struct ht_entry *ht_bin = &hash_table[((expirep&2047)<<5)+i]; - uintptr_t o1 = (u_char *)ht_bin->tcaddr[1] - ndrc->translation_cache; - uintptr_t o2 = o1 - MAX_OUTPUT_BLOCK_SIZE; - if ((o1 >> shift) == base_offs_s || (o2 >> shift) == base_offs_s) { - inv_debug("EXP: Remove hash %x -> %p\n",ht_bin->vaddr[1],ht_bin->tcaddr[1]); - ht_bin->vaddr[1] = -1; - ht_bin->tcaddr[1] = NULL; - } - o1 = (u_char *)ht_bin->tcaddr[0] - ndrc->translation_cache; - o2 = o1 - MAX_OUTPUT_BLOCK_SIZE; - if ((o1 >> shift) == base_offs_s || (o2 >> shift) == base_offs_s) { - inv_debug("EXP: Remove hash %x -> %p\n",ht_bin->vaddr[0],ht_bin->tcaddr[0]); - ht_bin->vaddr[0] = ht_bin->vaddr[1]; - ht_bin->tcaddr[0] = ht_bin->tcaddr[1]; - ht_bin->vaddr[1] = -1; - ht_bin->tcaddr[1] = NULL; - } - } - break; - case 3: - // Clear jump_out - if((expirep&2047)==0) - do_clear_cache(); - ll_remove_matching_addrs(jump_out+(expirep&2047),base_offs_s,shift); - ll_remove_matching_addrs(jump_out+2048+(expirep&2047),base_offs_s,shift); - break; - } - expirep=(expirep+1)&65535; - } + pass10_expire_blocks(); + #ifdef ASSEM_PRINT fflush(stdout); #endif + stat_inc(stat_bc_direct); return 0; }