X-Git-Url: https://notaz.gp2x.de/cgi-bin/gitweb.cgi?a=blobdiff_plain;f=libpcsxcore%2Fnew_dynarec%2Fpatches%2Ftrace_drc_chk;h=da8616988ed87ef540422f812dc98940fb56f3da;hb=HEAD;hp=d1fc6e96e603df94b5a6e9d4dadf947c8710de42;hpb=a151a8d8331cf743eabeab23ce52e9b7726239e5;p=pcsx_rearmed.git diff --git a/libpcsxcore/new_dynarec/patches/trace_drc_chk b/libpcsxcore/new_dynarec/patches/trace_drc_chk index d1fc6e96..99d1fde8 100644 --- a/libpcsxcore/new_dynarec/patches/trace_drc_chk +++ b/libpcsxcore/new_dynarec/patches/trace_drc_chk @@ -1,269 +1,268 @@ -diff --git a/libpcsxcore/new_dynarec/linkage_arm.S b/libpcsxcore/new_dynarec/linkage_arm.S -index d32dc0b..e52dde8 100644 ---- a/libpcsxcore/new_dynarec/linkage_arm.S -+++ b/libpcsxcore/new_dynarec/linkage_arm.S -@@ -442,7 +442,7 @@ FUNCTION(cc_interrupt): - str r1, [fp, #LO_pending_exception] - and r2, r2, r10, lsr #17 - add r3, fp, #LO_restore_candidate -- str r10, [fp, #LO_cycle] /* PCSX cycles */ -+@@@ str r10, [fp, #LO_cycle] /* PCSX cycles */ - @@ str r10, [fp, #LO_reg_cop0+36] /* Count */ - ldr r4, [r2, r3] - mov r10, lr -@@ -530,7 +530,7 @@ FUNCTION(jump_syscall_hle): - mov r1, #0 /* in delay slot */ - add r2, r2, r10 - mov r0, #0x20 /* cause */ -- str r2, [fp, #LO_cycle] /* PCSX cycle counter */ -+@@@ str r2, [fp, #LO_cycle] /* PCSX cycle counter */ - bl psxException - - /* note: psxException might do recursive recompiler call from it's HLE code, -@@ -551,7 +551,7 @@ FUNCTION(jump_hlecall): - str r0, [fp, #LO_pcaddr] - add r2, r2, r10 - adr lr, pcsx_return -- str r2, [fp, #LO_cycle] /* PCSX cycle counter */ -+@@@ str r2, [fp, #LO_cycle] /* PCSX cycle counter */ - bx r1 - .size jump_hlecall, .-jump_hlecall - -@@ -561,7 +561,7 @@ FUNCTION(jump_intcall): - str r0, [fp, #LO_pcaddr] - add r2, r2, r10 - adr lr, pcsx_return -- str r2, [fp, #LO_cycle] /* PCSX cycle counter */ -+@@@ str r2, [fp, #LO_cycle] /* PCSX cycle counter */ - b execI - .size jump_hlecall, .-jump_hlecall - -@@ -570,7 +570,7 @@ FUNCTION(new_dyna_leave): - ldr r0, [fp, #LO_last_count] - add r12, fp, #28 - add r10, r0, r10 -- str r10, [fp, #LO_cycle] -+@@@ str r10, [fp, #LO_cycle] - ldmfd sp!, {r4, r5, r6, r7, r8, r9, sl, fp, ip, pc} - .size new_dyna_leave, .-new_dyna_leave - -@@ -687,7 +687,7 @@ FUNCTION(new_dyna_start): - \readop r0, [r1, r3, lsl #\tab_shift] - .endif - movcc pc, lr -- str r2, [fp, #LO_cycle] -+@@@ str r2, [fp, #LO_cycle] - bx r1 - .endm - -@@ -722,7 +722,7 @@ FUNCTION(jump_handler_read32): - mov r0, r1 - add r2, r2, r12 - push {r2, lr} -- str r2, [fp, #LO_cycle] -+@@@ str r2, [fp, #LO_cycle] - blx r3 - - ldr r0, [fp, #LO_next_interupt] -@@ -750,7 +750,7 @@ FUNCTION(jump_handler_write_h): - add r2, r2, r12 - mov r0, r1 - push {r2, lr} -- str r2, [fp, #LO_cycle] -+@@@ str r2, [fp, #LO_cycle] - blx r3 - - ldr r0, [fp, #LO_next_interupt] diff --git a/libpcsxcore/new_dynarec/new_dynarec.c b/libpcsxcore/new_dynarec/new_dynarec.c -index 6d7069d..586a6db 100644 +index 300a84c8..e4343533 100644 --- a/libpcsxcore/new_dynarec/new_dynarec.c +++ b/libpcsxcore/new_dynarec/new_dynarec.c -@@ -38,10 +38,10 @@ static int sceBlock; - #include "../psxhle.h" //emulator interface - #include "emu_if.h" //emulator interface - --//#define DISASM --//#define assem_debug printf -+#define DISASM -+#define assem_debug printf - //#define inv_debug printf --#define assem_debug(...) -+//#define assem_debug(...) - #define inv_debug(...) - - #ifdef __i386__ -@@ -362,6 +362,9 @@ static u_int get_vpage(u_int vaddr) - // This is called from the recompiled JR/JALR instructions - void *get_addr(u_int vaddr) +@@ -345,7 +345,7 @@ static struct compile_info + #define stat_clear(s) + #endif + +- #define HACK_ENABLED(x) ((ndrc_g.hacks | ndrc_g.hacks_pergame) & (x)) ++ #define HACK_ENABLED(x) ((NDHACK_NO_STALLS|NDHACK_NO_COMPAT_HACKS) & (x)) + + /* registers that may be allocated */ + /* 1-31 gpr */ +@@ -626,6 +626,7 @@ static int cycle_multiplier_active; + + static int CLOCK_ADJUST(int x) + { ++ return x * 2; + int m = cycle_multiplier_active; + int s = (x >> 31) | 1; + return (x * m + s * 50) / 100; +@@ -837,6 +838,9 @@ static noinline u_int generate_exception(u_int pc) + static void noinline *get_addr(struct ht_entry *ht, const u_int vaddr, + enum ndrc_compile_mode compile_mode) { +#ifdef DRC_DBG +printf("get_addr %08x, pc=%08x\n", vaddr, psxRegs.pc); +#endif - u_int page=get_page(vaddr); - u_int vpage=get_vpage(vaddr); - struct ll_entry *head; -@@ -4403,13 +4406,15 @@ void do_cc(int i,signed char i_regmap[],int *adj,int addr,int taken,int invert) - } - emit_addimm_and_set_flags(cycles,HOST_CCREG); - jaddr=(int)out; -- emit_jns(0); -+// emit_jns(0); -+emit_jmp(0); - } - else - { - emit_cmpimm(HOST_CCREG,-CLOCK_ADJUST(count+2)); - jaddr=(int)out; -- emit_jns(0); -+// emit_jns(0); -+emit_jmp(0); - } - add_stub(CC_STUB,jaddr,idle?idle:(int)out,(*adj==0||invert||idle)?0:(count+2),i,addr,taken,0); - } -@@ -4884,7 +4889,8 @@ void rjump_assemble(int i,struct regstat *i_regs) - // special case for RFE - emit_jmp(0); - else -- emit_jns(0); -+ //emit_jns(0); -+ emit_jmp(0); - //load_regs_bt(branch_regs[i].regmap,branch_regs[i].is32,branch_regs[i].dirty,-1); - #ifdef USE_MINI_HT - if(rs1[i]==31) { -@@ -5034,7 +5040,8 @@ void cjump_assemble(int i,struct regstat *i_regs) - else if(nop) { - emit_addimm_and_set_flags(CLOCK_ADJUST(ccadj[i]+2),cc); - int jaddr=(int)out; -- emit_jns(0); -+// emit_jns(0); -+emit_jmp(0); - add_stub(CC_STUB,jaddr,(int)out,0,i,start+i*4+8,NOTTAKEN,0); - } - else { -@@ -5300,7 +5307,8 @@ void cjump_assemble(int i,struct regstat *i_regs) - emit_loadreg(CCREG,HOST_CCREG); - emit_addimm_and_set_flags(CLOCK_ADJUST(ccadj[i]+2),HOST_CCREG); - int jaddr=(int)out; -- emit_jns(0); -+// emit_jns(0); -+emit_jmp(0); - add_stub(CC_STUB,jaddr,(int)out,0,i,start+i*4+8,NOTTAKEN,0); - emit_storereg(CCREG,HOST_CCREG); - } -@@ -5309,7 +5317,8 @@ void cjump_assemble(int i,struct regstat *i_regs) - assert(cc==HOST_CCREG); - emit_addimm_and_set_flags(CLOCK_ADJUST(ccadj[i]+2),cc); - int jaddr=(int)out; -- emit_jns(0); -+// emit_jns(0); -+emit_jmp(0); - add_stub(CC_STUB,jaddr,(int)out,0,i,start+i*4+8,likely[i]?NULLDS:NOTTAKEN,0); - } - } -@@ -5419,7 +5428,8 @@ void sjump_assemble(int i,struct regstat *i_regs) - else if(nevertaken) { - emit_addimm_and_set_flags(CLOCK_ADJUST(ccadj[i]+2),cc); - int jaddr=(int)out; -- emit_jns(0); -+// emit_jns(0); -+emit_jmp(0); - add_stub(CC_STUB,jaddr,(int)out,0,i,start+i*4+8,NOTTAKEN,0); - } - else { -@@ -5628,7 +5638,8 @@ void sjump_assemble(int i,struct regstat *i_regs) - emit_loadreg(CCREG,HOST_CCREG); - emit_addimm_and_set_flags(CLOCK_ADJUST(ccadj[i]+2),HOST_CCREG); - int jaddr=(int)out; -- emit_jns(0); -+// emit_jns(0); -+emit_jmp(0); - add_stub(CC_STUB,jaddr,(int)out,0,i,start+i*4+8,NOTTAKEN,0); - emit_storereg(CCREG,HOST_CCREG); - } -@@ -5637,7 +5648,8 @@ void sjump_assemble(int i,struct regstat *i_regs) - assert(cc==HOST_CCREG); - emit_addimm_and_set_flags(CLOCK_ADJUST(ccadj[i]+2),cc); - int jaddr=(int)out; -- emit_jns(0); -+// emit_jns(0); -+emit_jmp(0); - add_stub(CC_STUB,jaddr,(int)out,0,i,start+i*4+8,likely[i]?NULLDS:NOTTAKEN,0); - } - } -@@ -5833,7 +5845,8 @@ void fjump_assemble(int i,struct regstat *i_regs) - emit_loadreg(CCREG,HOST_CCREG); - emit_addimm_and_set_flags(CLOCK_ADJUST(ccadj[i]+2),HOST_CCREG); - int jaddr=(int)out; -- emit_jns(0); -+// emit_jns(0); -+emit_jmp(0); - add_stub(CC_STUB,jaddr,(int)out,0,i,start+i*4+8,NOTTAKEN,0); - emit_storereg(CCREG,HOST_CCREG); - } -@@ -5842,7 +5855,8 @@ void fjump_assemble(int i,struct regstat *i_regs) - assert(cc==HOST_CCREG); - emit_addimm_and_set_flags(CLOCK_ADJUST(ccadj[i]+2),cc); - int jaddr=(int)out; -- emit_jns(0); -+// emit_jns(0); -+emit_jmp(0); - add_stub(CC_STUB,jaddr,(int)out,0,i,start+i*4+8,likely[i]?NULLDS:NOTTAKEN,0); - } - } -@@ -6463,7 +6477,7 @@ void unneeded_registers(int istart,int iend,int r) + u_int start_page = get_page_prev(vaddr); + u_int i, page, end_page = get_page(vaddr); + void *found_clean = NULL; +@@ -7421,7 +7425,7 @@ static noinline void pass2b_unneeded_regs(int istart, int iend, int r) // R0 is always unneeded - u|=1;uu|=1; + u|=1; // Save it - unneeded_reg[i]=u; + unneeded_reg[i]=1;//u; - unneeded_reg_upper[i]=uu; gte_unneeded[i]=gte_u; /* -@@ -9676,6 +9690,7 @@ int new_recompile_block(int addr) - - // This allocates registers (if possible) one instruction prior - // to use, which can avoid a load-use penalty on certain CPUs. -+#if 0 - for(i=0;i>16)==0x1000) - literal_pool(1024); - else -@@ -10256,7 +10277,7 @@ int new_recompile_block(int addr) - } - } - // External Branch Targets (jump_in) -- if(copy+slen*4>(void *)shadow+sizeof(shadow)) copy=shadow; -+ if(copy+slen*4>(void *)shadow+sizeof(shadow)) {copy=shadow;printf("shadow overflow\n");} - for(i=0;in.Cause &= ~0x400; ++ u32 c2 = cp0->n.Cause & ~0x400; + if (psxHu32(0x1070) & psxHu32(0x1074)) +- cp0->n.Cause |= 0x400; +- if (((cp0->n.Cause | 1) & cp0->n.SR & 0x401) == 0x401) ++ c2 |= 0x400; ++ if (((c2 | 1) & cp0->n.SR & 0x401) == 0x401) { ++ cp0->n.Cause = c2; + psxException(0, 0, cp0); ++ } + } + + void gen_interupt(psxCP0Regs *cp0) +diff --git a/libpcsxcore/psxinterpreter.c b/libpcsxcore/psxinterpreter.c +index 68d79321..50a38f8d 100644 +--- a/libpcsxcore/psxinterpreter.c ++++ b/libpcsxcore/psxinterpreter.c +@@ -243,7 +243,7 @@ static inline void addCycle(psxRegisters *regs) + { + assert(regs->subCycleStep >= 0x10000); + regs->subCycle += regs->subCycleStep; +- regs->cycle += regs->subCycle >> 16; ++ regs->cycle += 2; //regs->subCycle >> 16; + regs->subCycle &= 0xffff; + } + +@@ -440,7 +440,9 @@ static void doBranch(psxRegisters *regs, u32 tar, enum R3000Abdt taken) { + regs->CP0.n.Target = pc_final; + regs->branching = 0; + ++ psxRegs.cycle += 2; + psxBranchTest(); ++ psxRegs.cycle -= 2; + } + + static void doBranchReg(psxRegisters *regs, u32 tar) { +@@ -973,7 +975,7 @@ void MTC0(psxRegisters *regs_, int reg, u32 val) { + } + } + +-OP(psxMTC0) { MTC0(regs_, _Rd_, _u32(_rRt_)); } ++OP(psxMTC0) { MTC0(regs_, _Rd_, _u32(_rRt_)); psxBranchTest(); } + + // no exception + static inline void psxNULLne(psxRegisters *regs) { +@@ -1132,6 +1134,7 @@ OP(psxHLE) { + dloadFlush(regs_); + psxHLEt[hleCode](); + regs_->branchSeen = 1; ++ regs_->cycle -= 2; + } + + static void (INT_ATTR *psxBSC[64])(psxRegisters *regs_, u32 code) = { +@@ -1182,18 +1185,20 @@ static void intReset() { + static inline void execI_(u8 **memRLUT, psxRegisters *regs) { + u32 pc = regs->pc; + +- addCycle(regs); ++ //addCycle(regs); + dloadStep(regs); + + regs->pc += 4; + regs->code = fetch(regs, memRLUT, pc); + psxBSC[regs->code >> 26](regs, regs->code); ++ psxRegs.cycle += 2; ++ fetchNoCache(regs, memRLUT, regs->pc); // bus err check + } + + static inline void execIbp(u8 **memRLUT, psxRegisters *regs) { + u32 pc = regs->pc; + +- addCycle(regs); ++ //addCycle(regs); + dloadStep(regs); + + if (execBreakCheck(regs, pc)) +@@ -1202,6 +1207,8 @@ static inline void execIbp(u8 **memRLUT, psxRegisters *regs) { + regs->pc += 4; + regs->code = fetch(regs, memRLUT, pc); + psxBSC[regs->code >> 26](regs, regs->code); ++ psxRegs.cycle += 2; ++ fetchNoCache(regs, memRLUT, regs->pc); // bus err check + } + + static void intExecute(psxRegisters *regs) { +@@ -1218,20 +1225,28 @@ static void intExecuteBp(psxRegisters *regs) { + execIbp(memRLUT, regs); + } + ++ extern int last_count; ++ void do_insn_cmp(void); + static void intExecuteBlock(psxRegisters *regs, enum blockExecCaller caller) { + u8 **memRLUT = psxMemRLUT; + ++ last_count = 0; + regs->branchSeen = 0; +- while (!regs->branchSeen) ++ while (!regs->branchSeen || (regs->dloadReg[0] || regs->dloadReg[1])) { ++ do_insn_cmp(); + execI_(memRLUT, regs); ++ } + } + + static void intExecuteBlockBp(psxRegisters *regs, enum blockExecCaller caller) { + u8 **memRLUT = psxMemRLUT; + ++ last_count = 0; + regs->branchSeen = 0; +- while (!regs->branchSeen) ++ while (!regs->branchSeen || (regs->dloadReg[0] || regs->dloadReg[1])) { ++ do_insn_cmp(); + execIbp(memRLUT, regs); ++ } + } + + static void intClear(u32 Addr, u32 Size) { +@@ -1263,7 +1278,7 @@ static void setupCop(u32 sr) + else + psxBSC[17] = psxCOPd; + if (sr & (1u << 30)) +- psxBSC[18] = Config.DisableStalls ? psxCOP2 : psxCOP2_stall; ++ psxBSC[18] = psxCOP2; + else + psxBSC[18] = psxCOPd; + if (sr & (1u << 31)) +@@ -1282,7 +1297,7 @@ void intApplyConfig() { + assert(psxSPC[26] == psxDIV || psxSPC[26] == psxDIV_stall); + assert(psxSPC[27] == psxDIVU || psxSPC[27] == psxDIVU_stall); + +- if (Config.DisableStalls) { ++ if (1) { + psxBSC[18] = psxCOP2; + psxBSC[50] = gteLWC2; + psxBSC[58] = gteSWC2; +@@ -1365,8 +1380,12 @@ static void intShutdown() { + // single step (may do several ops in case of a branch or load delay) + // called by asm/dynarec + void execI(psxRegisters *regs) { ++ printf("execI %08x c %u, ni %u\n", regs->pc, regs->cycle, regs->next_interupt); ++ last_count = 0; + do { + execIbp(psxMemRLUT, regs); ++ if (regs->dloadReg[0] || regs->dloadReg[1]) ++ do_insn_cmp(); + } while (regs->dloadReg[0] || regs->dloadReg[1]); }