X-Git-Url: https://notaz.gp2x.de/cgi-bin/gitweb.cgi?a=blobdiff_plain;f=libpcsxcore%2Fnew_dynarec%2Fpatches%2Ftrace_drc_chk;h=da8616988ed87ef540422f812dc98940fb56f3da;hb=HEAD;hp=e98a48e7f94d9ce0c5ba807773f74e9a6792784b;hpb=2330734fa3064bf3a159c3c56f9a2e005598360e;p=pcsx_rearmed.git

diff --git a/libpcsxcore/new_dynarec/patches/trace_drc_chk b/libpcsxcore/new_dynarec/patches/trace_drc_chk
index e98a48e7..da861698 100644
--- a/libpcsxcore/new_dynarec/patches/trace_drc_chk
+++ b/libpcsxcore/new_dynarec/patches/trace_drc_chk
@@ -1,35 +1,35 @@
 diff --git a/libpcsxcore/new_dynarec/new_dynarec.c b/libpcsxcore/new_dynarec/new_dynarec.c
-index f1005db..ebd1d4f 100644
+index 74f32ee3..4eec8a83 100644
 --- a/libpcsxcore/new_dynarec/new_dynarec.c
 +++ b/libpcsxcore/new_dynarec/new_dynarec.c
-@@ -235,7 +235,7 @@ static struct decoded_insn
+@@ -325,7 +325,7 @@ static struct compile_info
    int new_dynarec_hacks_old;
    int new_dynarec_did_compile;
  
 -  #define HACK_ENABLED(x) ((new_dynarec_hacks | new_dynarec_hacks_pergame) & (x))
 +  #define HACK_ENABLED(x) ((NDHACK_NO_STALLS) & (x))
  
-   extern int cycle_count; // ... until end of the timeslice, counts -N -> 0
+   extern int cycle_count; // ... until end of the timeslice, counts -N -> 0 (CCREG)
    extern int last_count;  // last absolute target, often = next_interupt
-@@ -471,6 +471,7 @@ int cycle_multiplier_old;
+@@ -603,6 +603,7 @@ static int cycle_multiplier_active;
  
  static int CLOCK_ADJUST(int x)
  {
 +  return x * 2;
-   int m = cycle_multiplier_override && cycle_multiplier == CYCLE_MULT_DEFAULT
-         ? cycle_multiplier_override : cycle_multiplier;
-   int s=(x>>31)|1;
-@@ -522,6 +523,9 @@ static int doesnt_expire_soon(void *tcaddr)
+   int m = cycle_multiplier_active;
+   int s = (x >> 31) | 1;
+   return (x * m + s * 50) / 100;
+@@ -808,6 +809,9 @@ static noinline u_int generate_exception(u_int pc)
  // This is called from the recompiled JR/JALR instructions
- void noinline *get_addr(u_int vaddr)
+ static void noinline *get_addr(u_int vaddr, int can_compile)
  {
 +#ifdef DRC_DBG
 +printf("get_addr %08x, pc=%08x\n", vaddr, psxRegs.pc);
 +#endif
-   u_int page=get_page(vaddr);
-   u_int vpage=get_vpage(vaddr);
-   struct ll_entry *head;
-@@ -6248,7 +6252,7 @@ void unneeded_registers(int istart,int iend,int r)
+   u_int start_page = get_page_prev(vaddr);
+   u_int i, page, end_page = get_page(vaddr);
+   void *found_clean = NULL;
+@@ -7213,7 +7217,7 @@ static noinline void pass2_unneeded_regs(int istart,int iend,int r)
      // R0 is always unneeded
      u|=1;
      // Save it
@@ -38,36 +38,16 @@ index f1005db..ebd1d4f 100644
      gte_unneeded[i]=gte_u;
      /*
      printf("ur (%d,%d) %x: ",istart,iend,start+i*4);
-@@ -8794,6 +8798,7 @@ int new_recompile_block(u_int addr)
- 
-   // This allocates registers (if possible) one instruction prior
-   // to use, which can avoid a load-use penalty on certain CPUs.
-+#if 0
+@@ -8355,6 +8359,7 @@ static noinline void pass5a_preallocate1(void)
+ static noinline void pass5b_preallocate2(void)
+ {
+   int i, hr;
++ return;
    for(i=0;i<slen-1;i++)
    {
      if (!i || !dops[i-1].is_jump)
-@@ -8950,6 +8955,7 @@ int new_recompile_block(u_int addr)
-       }
-     }
-   }
-+#endif
- 
-   /* Pass 6 - Optimize clean/dirty state */
-   clean_registers(0,slen-1,1);
-@@ -9204,6 +9210,11 @@ int new_recompile_block(u_int addr)
-         load_regs(regs[i].regmap_entry,regs[i].regmap,INVCP,INVCP);
- 
-       ds = assemble(i, &regs[i], ccadj[i]);
-+#ifdef DRC_DBG
-+       // write-out non-consts, consts are likely different because of get_final_value()
-+       if (!dops[i].is_jump)
-+         wb_dirtys(regs[i].regmap,regs[i].dirty&~regs[i].loadedconst);
-+#endif
+@@ -9380,6 +9385,10 @@ static int new_recompile_block(u_int addr)
  
-       if (dops[i].is_ujump)
-         literal_pool(1024);
-@@ -9439,6 +9450,10 @@ int new_recompile_block(u_int addr)
-   }
  #ifdef ASSEM_PRINT
    fflush(stdout);
 +#endif
@@ -75,26 +55,26 @@ index f1005db..ebd1d4f 100644
 +printf("new_recompile_block done\n");
 +fflush(stdout);
  #endif
+   stat_inc(stat_bc_direct);
    return 0;
- }
 diff --git a/libpcsxcore/new_dynarec/pcsxmem.c b/libpcsxcore/new_dynarec/pcsxmem.c
-index bb471b6..8f68a3b 100644
+index f4b1d90e..d3975ceb 100644
 --- a/libpcsxcore/new_dynarec/pcsxmem.c
 +++ b/libpcsxcore/new_dynarec/pcsxmem.c
-@@ -272,6 +272,8 @@ static void write_biu(u32 value)
- 	if (address != 0xfffe0130)
+@@ -258,6 +258,8 @@ static void write_biu(u32 value)
  		return;
+ 	}
  
 +extern u32 handler_cycle;
 +handler_cycle = psxRegs.cycle;
- 	switch (value) {
- 	case 0x800: case 0x804:
- 		unmap_ram_write();
+ 	memprintf("write_biu %08x @%08x %u\n", value, psxRegs.pc, psxRegs.cycle);
+ 	psxRegs.biuReg = value;
+ }
 diff --git a/libpcsxcore/psxcounters.c b/libpcsxcore/psxcounters.c
-index b2cc07b..f916580 100644
+index d0d45ec5..4ed03c40 100644
 --- a/libpcsxcore/psxcounters.c
 +++ b/libpcsxcore/psxcounters.c
-@@ -378,9 +378,12 @@ void psxRcntUpdate()
+@@ -428,9 +428,12 @@ void psxRcntUpdate()
  
  /******************************************************************************/
  
@@ -107,7 +87,7 @@ index b2cc07b..f916580 100644
  
      _psxRcntWcount( index, value );
      psxRcntSet();
-@@ -389,6 +392,7 @@ void psxRcntWcount( u32 index, u32 value )
+@@ -439,6 +442,7 @@ void psxRcntWcount( u32 index, u32 value )
  void psxRcntWmode( u32 index, u32 value )
  {
      verboseLog( 1, "[RCNT %i] wmode: %x\n", index, value );
@@ -115,7 +95,7 @@ index b2cc07b..f916580 100644
  
      _psxRcntWmode( index, value );
      _psxRcntWcount( index, 0 );
-@@ -400,6 +404,7 @@ void psxRcntWmode( u32 index, u32 value )
+@@ -450,6 +454,7 @@ void psxRcntWmode( u32 index, u32 value )
  void psxRcntWtarget( u32 index, u32 value )
  {
      verboseLog( 1, "[RCNT %i] wtarget: %x\n", index, value );
@@ -123,11 +103,40 @@ index b2cc07b..f916580 100644
  
      rcnts[index].target = value;
  
-@@ -412,6 +417,7 @@ void psxRcntWtarget( u32 index, u32 value )
- u32 psxRcntRcount( u32 index )
+@@ -463,6 +468,7 @@ u32 psxRcntRcount0()
  {
+     u32 index = 0;
      u32 count;
 +handler_cycle = psxRegs.cycle;
  
-     count = _psxRcntRcount( index );
+     if ((rcnts[0].mode & 7) == (RcSyncModeEnable | Rc01UnblankReset) ||
+         (rcnts[0].mode & 7) == (RcSyncModeEnable | Rc01UnblankReset2))
+diff --git a/libpcsxcore/psxinterpreter.c b/libpcsxcore/psxinterpreter.c
+index f6ff2e8b..2f7147c3 100644
+--- a/libpcsxcore/psxinterpreter.c
++++ b/libpcsxcore/psxinterpreter.c
+@@ -245,7 +245,7 @@ static inline void addCycle(psxRegisters *regs)
+ {
+ 	assert(regs->subCycleStep >= 0x10000);
+ 	regs->subCycle += regs->subCycleStep;
+-	regs->cycle += regs->subCycle >> 16;
++	regs->cycle += 2; //regs->subCycle >> 16;
+ 	regs->subCycle &= 0xffff;
+ }
+ 
+@@ -1348,8 +1348,15 @@ static void intShutdown() {
+ // single step (may do several ops in case of a branch or load delay)
+ // called by asm/dynarec
+ void execI(psxRegisters *regs) {
++ extern int last_count;
++ extern u32 next_interupt;
++ void do_insn_cmp(void);
++ printf("execI %08x c %u, ni %u\n", regs->pc, regs->cycle, next_interupt);
++ last_count = 0;
+ 	do {
+ 		execIbp(psxMemRLUT, regs);
++		if (regs->dloadReg[0] || regs->dloadReg[1])
++			do_insn_cmp();
+ 	} while (regs->dloadReg[0] || regs->dloadReg[1]);
+ }