X-Git-Url: https://notaz.gp2x.de/cgi-bin/gitweb.cgi?a=blobdiff_plain;f=libpcsxcore%2Fnew_dynarec%2Fpcsxmem.c;h=a32b418301895e0c5d5ba194e5c7010db34bab43;hb=e3973c6949814717f22e3db91129829a62941232;hp=47b876ef3bdeb03179308ca124aa235ba2e3dba1;hpb=5b9f1b9e4aa51af5712cf1d90552ace57d9f486b;p=pcsx_rearmed.git

diff --git a/libpcsxcore/new_dynarec/pcsxmem.c b/libpcsxcore/new_dynarec/pcsxmem.c
index 47b876ef..a32b4183 100644
--- a/libpcsxcore/new_dynarec/pcsxmem.c
+++ b/libpcsxcore/new_dynarec/pcsxmem.c
@@ -6,42 +6,49 @@
  */
 
 #include <stdio.h>
-#include <sys/mman.h>
 #include "../psxhw.h"
 #include "../cdrom.h"
 #include "../mdec.h"
 #include "../gpu.h"
+#include "../psxmem_map.h"
 #include "emu_if.h"
 #include "pcsxmem.h"
 
 #ifdef __thumb__
-#error the dynarec does not have Thumb support, please remove -mthumb
+#error the dynarec is incompatible with Thumb functions,
+#error please add -marm to compile flags
 #endif
 
 //#define memprintf printf
 #define memprintf(...)
 
-static u32 *mem_readtab;
-static u32 *mem_writetab;
-static u32 mem_iortab[(1+2+4) * 0x1000 / 4];
-static u32 mem_iowtab[(1+2+4) * 0x1000 / 4];
-static u32 mem_ffwtab[(1+2+4) * 0x1000 / 4];
-//static u32 mem_unmrtab[(1+2+4) * 0x1000 / 4];
-static u32 mem_unmwtab[(1+2+4) * 0x1000 / 4];
-
-static void map_item(u32 *out, const void *h, u32 flag)
+static uintptr_t *mem_readtab;
+static uintptr_t *mem_writetab;
+static uintptr_t mem_iortab[(1+2+4) * 0x1000 / 4];
+static uintptr_t mem_iowtab[(1+2+4) * 0x1000 / 4];
+static uintptr_t mem_ffwtab[(1+2+4) * 0x1000 / 4];
+//static uintptr_t mem_unmrtab[(1+2+4) * 0x1000 / 4];
+static uintptr_t mem_unmwtab[(1+2+4) * 0x1000 / 4];
+
+static
+#ifdef __clang__
+// When this is called in a loop, and 'h' is a function pointer, clang will crash.
+__attribute__ ((noinline))
+#endif
+void map_item(uintptr_t *out, const void *h, uintptr_t flag)
 {
-	u32 hv = (u32)h;
+	uintptr_t hv = (uintptr_t)h;
 	if (hv & 1) {
-		fprintf(stderr, "FATAL: %p has LSB set\n", h);
+		SysPrintf("FATAL: %p has LSB set\n", h);
 		abort();
 	}
-	*out = (hv >> 1) | (flag << 31);
+	*out = (hv >> 1) | (flag << (sizeof(hv) * 8 - 1));
 }
 
 // size must be power of 2, at least 4k
 #define map_l1_mem(tab, i, addr, size, base) \
-	map_item(&tab[((addr)>>12) + i], (u8 *)(base) - (u32)(addr) - ((i << 12) & ~(size - 1)), 0)
+	map_item(&tab[((addr)>>12) + i], \
+		 (u8 *)(base) - (u32)((addr) + ((i << 12) & ~(size - 1))), 0)
 
 #define IOMEM32(a) (((a) & 0xfff) / 4)
 #define IOMEM16(a) (0x1000/4 + (((a) & 0xfff) / 2))
@@ -84,7 +91,7 @@ static void io_write_sio32(u32 value)
 	sioWrite8((unsigned char)(value >> 24));
 }
 
-#ifndef DRC_DBG
+#if !defined(DRC_DBG) && defined(__arm__)
 
 static void map_rcnt_rcount0(u32 mode)
 {
@@ -146,9 +153,7 @@ make_rcnt_funcs(2)
 
 static void io_write_ireg16(u32 value)
 {
-	if (Config.Sio) psxHu16ref(0x1070) |= 0x80;
-	if (Config.SpuIrq) psxHu16ref(0x1070) |= 0x200;
-	psxHu16ref(0x1070) &= psxHu16(0x1074) & value;
+	psxHu16ref(0x1070) &= value;
 }
 
 static void io_write_imask16(u32 value)
@@ -160,9 +165,7 @@ static void io_write_imask16(u32 value)
 
 static void io_write_ireg32(u32 value)
 {
-	if (Config.Sio) psxHu32ref(0x1070) |= 0x80;
-	if (Config.SpuIrq) psxHu32ref(0x1070) |= 0x200;
-	psxHu32ref(0x1070) &= psxHu32(0x1074) & value;
+	psxHu32ref(0x1070) &= value;
 }
 
 static void io_write_imask32(u32 value)
@@ -204,7 +207,7 @@ make_dma_func(6)
 static void io_spu_write16(u32 value)
 {
 	// meh
-	SPU_writeRegister(address, value);
+	SPU_writeRegister(address, value, psxRegs.cycle);
 }
 
 static void io_spu_write32(u32 value)
@@ -212,8 +215,8 @@ static void io_spu_write32(u32 value)
 	SPUwriteRegister wfunc = SPU_writeRegister;
 	u32 a = address;
 
-	wfunc(a, value & 0xffff);
-	wfunc(a + 2, value >> 16);
+	wfunc(a, value & 0xffff, psxRegs.cycle);
+	wfunc(a + 2, value >> 16, psxRegs.cycle);
 }
 
 static u32 io_gpu_read_status(void)
@@ -286,7 +289,7 @@ void new_dyna_pcsx_mem_load_state(void)
 	map_rcnt_rcount2(rcnts[2].mode);
 }
 
-int pcsxmem_is_handler_dynamic(u_int addr)
+int pcsxmem_is_handler_dynamic(unsigned int addr)
 {
 	if ((addr & 0xfffff000) != 0x1f801000)
 		return 0;
@@ -299,17 +302,10 @@ void new_dyna_pcsx_mem_init(void)
 {
 	int i;
 
-#ifdef CUSTOM_MEMMAPS
-	// WIZ lack-of-RAM hack
-	extern void *memtab_mmap(void *addr, size_t size);
-	mem_readtab = memtab_mmap((void *)0x08000000, 0x200000 * 4);
-#else
 	// have to map these further to keep tcache close to .text
-	mem_readtab = mmap((void *)0x08000000, 0x200000 * 4, PROT_READ | PROT_WRITE,
-		MAP_FIXED | MAP_PRIVATE | MAP_ANONYMOUS, -1, 0);
-#endif
-	if (mem_readtab == MAP_FAILED) {
-		fprintf(stderr, "failed to map mem tables\n");
+	mem_readtab = psxMap(0x08000000, 0x200000 * sizeof(mem_readtab[0]), 0, MAP_TAG_LUTS);
+	if (mem_readtab == NULL) {
+		SysPrintf("failed to map mem tables\n");
 		exit(1);
 	}
 	mem_writetab = mem_readtab + 0x100000;
@@ -344,11 +340,17 @@ void new_dyna_pcsx_mem_init(void)
 
 	// scratchpad
 	map_l1_mem(mem_readtab, 0, 0x1f800000, 0x1000, psxH);
+	map_l1_mem(mem_readtab, 0, 0x9f800000, 0x1000, psxH);
 	map_l1_mem(mem_writetab, 0, 0x1f800000, 0x1000, psxH);
+	map_l1_mem(mem_writetab, 0, 0x9f800000, 0x1000, psxH);
 
 	// I/O
 	map_item(&mem_readtab[0x1f801000 >> 12], mem_iortab, 1);
+	map_item(&mem_readtab[0x9f801000 >> 12], mem_iortab, 1);
+	map_item(&mem_readtab[0xbf801000 >> 12], mem_iortab, 1);
 	map_item(&mem_writetab[0x1f801000 >> 12], mem_iowtab, 1);
+	map_item(&mem_writetab[0x9f801000 >> 12], mem_iowtab, 1);
+	map_item(&mem_writetab[0xbf801000 >> 12], mem_iowtab, 1);
 
 	// L2
 	// unmapped tables
@@ -481,3 +483,9 @@ void new_dyna_pcsx_mem_reset(void)
 
 	map_item(&mem_iowtab[IOMEM32(0x1810)], GPU_writeData, 1);
 }
+
+void new_dyna_pcsx_mem_shutdown(void)
+{
+	psxUnmap(mem_readtab, 0x200000 * 4, MAP_TAG_LUTS);
+	mem_writetab = mem_readtab = NULL;
+}