X-Git-Url: https://notaz.gp2x.de/cgi-bin/gitweb.cgi?a=blobdiff_plain;f=libpcsxcore%2Fpsxbios.c;h=4c097db8752286b9f2316aa6419de34da4b0a609;hb=4d4e34c6eeae1e91e595ab6802652f312a560342;hp=7e88c9cdec5c0e856c289c8112088235d75405f2;hpb=31cd6032b51dd31def3cee4d778e480c8fb0df67;p=pcsx_rearmed.git diff --git a/libpcsxcore/psxbios.c b/libpcsxcore/psxbios.c index 7e88c9cd..4c097db8 100644 --- a/libpcsxcore/psxbios.c +++ b/libpcsxcore/psxbios.c @@ -253,12 +253,11 @@ typedef struct { u32 mcfile; } FileDesc; -static int *pad_buf = NULL; -static u32 heap_size = 0; -static u32 *heap_addr = NULL; -static u32 *heap_end = NULL; +// todo: FileDesc layout is wrong +// todo: get rid of these globals static FileDesc FDesc[32]; -static u32 card_active_chan = 0; +static char ffile[64], *pfile; +static int nfile; // fixed RAM offsets, SCPH1001 compatible #define A_TT_ExCB 0x0100 @@ -275,17 +274,25 @@ static u32 card_active_chan = 0; #define A_KMALLOC_PTR 0x7460 #define A_KMALLOC_SIZE 0x7464 #define A_KMALLOC_END 0x7468 -#define A_PADCRD_CHN_E 0x74a8 // pad/card irq chain entry +#define A_PADCRD_CHN_E 0x74a8 // pad/card irq chain entry, see hleExcPadCard1() #define A_PAD_IRQR_ENA 0x74b8 // pad read on vint irq (nocash 'pad_enable_flag') #define A_CARD_IRQR_ENA 0x74bc // same for card #define A_PAD_INBUF 0x74c8 // 2x buffers for rx pad data #define A_PAD_OUTBUF 0x74d0 // 2x buffers for tx pad data #define A_PAD_IN_LEN 0x74d8 #define A_PAD_OUT_LEN 0x74e0 +#define A_PAD_DR_DST 0x74c4 +#define A_CARD_CHAN1 0x7500 +#define A_PAD_DR_BUF1 0x7570 +#define A_PAD_DR_BUF2 0x7598 #define A_EEXIT_PTR 0x75d0 #define A_EXC_STACK 0x85d8 // exception stack top #define A_RCNT_VBL_ACK 0x8600 #define A_PAD_ACK_VBL 0x8914 // enable vint ack by pad reading code +#define A_HEAP_BASE 0x9000 +#define A_HEAP_SIZE 0x9004 +#define A_HEAP_END 0x9008 +#define A_HEAP_FLAG 0x900c #define A_CD_EVENTS 0xb9b8 #define A_EXC_GP 0xf450 @@ -337,6 +344,11 @@ static void mips_return(u32 val) pc0 = ra; } +static void mips_return_void(void) +{ + pc0 = ra; +} + static void use_cycles(u32 cycle) { psxRegs.cycle += cycle * 2; @@ -407,6 +419,7 @@ static void CloseEvent(u32 ev); PSXBIOS_LOG("read %d: %x,%x (%s)\n", FDesc[1 + mcd].mcfile, FDesc[1 + mcd].offset, a2, Mcd##mcd##Data + 128 * FDesc[1 + mcd].mcfile + 0xa); \ ptr = Mcd##mcd##Data + 8192 * FDesc[1 + mcd].mcfile + FDesc[1 + mcd].offset; \ memcpy(Ra1, ptr, length); \ + psxCpu->Clear(a1, (length + 3) / 4); \ if (FDesc[1 + mcd].mode & 0x8000) { \ DeliverEvent(0xf0000011, 0x0004); \ DeliverEvent(0xf4000001, 0x0004); \ @@ -897,37 +910,69 @@ void psxBios_tolower() { // 0x26 pc0 = ra; } -void psxBios_bcopy() { // 0x27 - char *p1 = (char *)Ra1, *p2 = (char *)Ra0; - v0 = a0; - if (a0 == 0 || a2 > 0x7FFFFFFF) - { - pc0 = ra; - return; +static void do_memset(u32 dst, u32 v, s32 len) +{ + u32 d = dst; + s32 l = len; + while (l-- > 0) { + u8 *db = PSXM(d); + if (db != INVALID_PTR) + *db = v; + d++; } - while ((s32)a2-- > 0) *p1++ = *p2++; - a2 = 0; - pc0 = ra; + psxCpu->Clear(dst, (len + 3) / 4); } -void psxBios_bzero() { // 0x28 - char *p = (char *)Ra0; - v0 = a0; - /* Same as memset here (See memset below) */ - if (a1 > 0x7FFFFFFF || a1 == 0) +static void do_memcpy(u32 dst, u32 src, s32 len) +{ + u32 d = dst, s = src; + s32 l = len; + while (l-- > 0) { + const u8 *sb = PSXM(s); + u8 *db = PSXM(d); + if (db != INVALID_PTR && sb != INVALID_PTR) + *db = *sb; + d++; + s++; + } + psxCpu->Clear(dst, (len + 3) / 4); +} + +static void psxBios_memcpy(); + +static void psxBios_bcopy() { // 0x27 - memcpy with args swapped + //PSXBIOS_LOG("psxBios_%s %x %x %x\n", biosA0n[0x27], a0, a1, a2); + u32 ret = a0, cycles = 0; + if (a0 == 0) // ...but it checks src this time { - v0 = 0; - pc0 = ra; + mips_return_c(0, 4); return; } - else if (a0 == 0) + v1 = a0; + if ((s32)a2 > 0) { + do_memcpy(a1, a0, a2); + cycles = a2 * 6; + a0 += a2; + a1 += a2; + a2 = 0; + } + mips_return_c(ret, cycles + 5); +} + +static void psxBios_bzero() { // 0x28 + /* Same as memset here (See memset below) */ + u32 ret = a0, cycles; + if (a0 == 0 || (s32)a1 <= 0) { - pc0 = ra; + mips_return_c(0, 6); return; } - while ((s32)a1-- > 0) *p++ = '\0'; + do_memset(a0, 0, a1); + cycles = a1 * 4; + a0 += a1; a1 = 0; - pc0 = ra; + // todo: many more cycles due to uncached bios mem + mips_return_c(ret, cycles + 5); } void psxBios_bcmp() { // 0x29 @@ -946,57 +991,70 @@ void psxBios_bcmp() { // 0x29 v0 = 0; pc0 = ra; } -void psxBios_memcpy() { // 0x2a - char *p1 = (char *)Ra0, *p2 = (char *)Ra1; - v0 = a0; - if (a0 == 0 || a2 > 0x7FFFFFFF) +static void psxBios_memcpy() { // 0x2a + u32 ret = a0, cycles = 0; + if (a0 == 0) { - pc0 = ra; + mips_return_c(0, 4); return; } - while ((s32)a2-- > 0) { - *p1++ = *p2++; + v1 = a0; + if ((s32)a2 > 0) { + do_memcpy(a0, a1, a2); + cycles = a2 * 6; + a0 += a2; + a1 += a2; + a2 = 0; } - a2 = 0; - pc0 = ra; + mips_return_c(ret, cycles + 5); } -void psxBios_memset() { // 0x2b - char *p = (char *)Ra0; - v0 = a0; - if (a2 > 0x7FFFFFFF || a2 == 0) - { - v0 = 0; - pc0 = ra; - return; - } - if (a0 == 0) +static void psxBios_memset() { // 0x2b + u32 ret = a0, cycles; + if (a0 == 0 || (s32)a2 <= 0) { - pc0 = ra; + mips_return_c(0, 6); return; } - while ((s32)a2-- > 0) *p++ = (char)a1; + do_memset(a0, a1, a2); + cycles = a2 * 4; + a0 += a2; a2 = 0; - v0 = a0; pc0 = ra; + // todo: many more cycles due to uncached bios mem + mips_return_c(ret, cycles + 5); } void psxBios_memmove() { // 0x2c - char *p1 = (char *)Ra0, *p2 = (char *)Ra1; - v0 = a0; - if (a0 == 0 || a2 > 0x7FFFFFFF) + u32 ret = a0, cycles = 0; + if (a0 == 0) { - pc0 = ra; + mips_return_c(0, 4); return; } - if (p2 <= p1 && p2 + a2 > p1) { - a2++; // BUG: copy one more byte here - p1 += a2; - p2 += a2; - while ((s32)a2-- > 0) *--p1 = *--p2; - } else { - while ((s32)a2-- > 0) *p1++ = *p2++; + v1 = a0; + if ((s32)a2 > 0 && a0 > a1 && a0 < a1 + a2) { + u32 dst = a0, len = a2 + 1; + a0 += a2; + a1 += a2; + while ((s32)a2 >= 0) { // BUG: copies one more byte here + const u8 *sb = PSXM(a1); + u8 *db = PSXM(a0); + if (db != INVALID_PTR && sb != INVALID_PTR) + *db = *sb; + a0--; + a1--; + a2--; + } + psxCpu->Clear(dst, (len + 3) / 4); + cycles = 10 + len * 8; + } else if ((s32)a2 > 0) { + do_memcpy(a0, a1, a2); + cycles = a2 * 6; + a0 += a2; + a1 += a2; + a2 = 0; } - pc0 = ra; + mips_return_c(ret, cycles + 5); } void psxBios_memcmp() { // 0x2d @@ -1140,14 +1198,16 @@ void psxBios_qsort() { // 0x31 pc0 = ra; } -void psxBios_malloc() { // 0x33 +// this isn't how the real bios works, but maybe good enough +static void psxBios_malloc() { // 0x33 + u32 *heap_addr, *heap_end; u32 *chunk, *newchunk = NULL; unsigned int dsize = 0, csize, cstat; int colflag; -#ifdef PSXBIOS_LOG - PSXBIOS_LOG("psxBios_%s\n", biosA0n[0x33]); -#endif - if (!a0 || (!heap_size || !heap_addr)) { + PSXBIOS_LOG("psxBios_%s %x\n", biosA0n[0x33], a0); + heap_addr = loadRam32ptr(A_HEAP_BASE); + heap_end = loadRam32ptr(A_HEAP_END); + if (heap_addr >= heap_end) { v0 = 0; pc0 = ra; return; @@ -1244,27 +1304,24 @@ void psxBios_malloc() { // 0x33 pc0 = ra; } -void psxBios_free() { // 0x34 - - PSXBIOS_LOG("psxBios_%s\n", biosA0n[0x34]); - PSXBIOS_LOG("free %x: %x bytes\n", a0, *(u32*)(Ra0-4)); - - if (a0) - *(u32*)(Ra0-4) |= 1; // set chunk to free - pc0 = ra; +static void psxBios_free() { // 0x34 + PSXBIOS_LOG("psxBios_%s %x (%x bytes)\n", biosA0n[0x34], a0, loadRam32(a0 - 4)); + storeRam32(a0 - 4, loadRam32(a0 - 4) | 1); // set chunk to free + mips_return_void_c(5); } -void psxBios_calloc() { // 0x37 - void *pv0; -#ifdef PSXBIOS_LOG - PSXBIOS_LOG("psxBios_%s\n", biosA0n[0x37]); -#endif +static void psxBios_calloc() { // 0x37 + u32 ret, size; + PSXBIOS_LOG("psxBios_%s %x %x\n", biosA0n[0x37], a0, a1); - a0 = a0 * a1; + a0 = size = a0 * a1; psxBios_malloc(); - pv0 = Rv0; - if (pv0) - memset(pv0, 0, a0); + ret = v0; + if (ret) { + a0 = ret; a1 = size; + psxBios_bzero(); + } + mips_return_c(ret, 21); } void psxBios_realloc() { // 0x38 @@ -1297,27 +1354,16 @@ void psxBios_realloc() { // 0x38 /* InitHeap(void *block , int n) */ -void psxBios_InitHeap() { // 0x39 - unsigned int size; - -#ifdef PSXBIOS_LOG - PSXBIOS_LOG("psxBios_%s\n", biosA0n[0x39]); -#endif +static void psxBios_InitHeap() { // 0x39 + PSXBIOS_LOG("psxBios_%s %x %x\n", biosA0n[0x39], a0, a1); - if (((a0 & 0x1fffff) + a1)>= 0x200000) size = 0x1ffffc - (a0 & 0x1fffff); - else size = a1; + storeRam32(A_HEAP_BASE, a0); + storeRam32(A_HEAP_SIZE, a1); + storeRam32(A_HEAP_END, a0 + (a1 & ~3) + 4); + storeRam32(A_HEAP_FLAG, 0); + storeRam32(a0, 0); - size &= 0xfffffffc; - - heap_addr = (u32 *)Ra0; - heap_size = size; - heap_end = (u32 *)((u8 *)heap_addr + heap_size); - /* HACKFIX: Commenting out this line fixes GTA2 crash */ - //*heap_addr = SWAP32(size | 1); - - PSXBIOS_LOG("InitHeap %x,%x : %x %x\n",a0,a1, (int)((uptr)heap_addr-(uptr)psxM), size); - - pc0 = ra; + mips_return_void_c(14); } void psxBios_getchar() { //0x3b @@ -1429,6 +1475,14 @@ static void psxBios_SystemErrorUnresolvedException() { mips_return_void_c(1000); } +static void FlushCache() { + psxCpu->Notify(R3000ACPU_NOTIFY_CACHE_ISOLATED, NULL); + psxCpu->Notify(R3000ACPU_NOTIFY_CACHE_UNISOLATED, NULL); + k0 = 0xbfc0193c; + // runs from uncached mem so tons of cycles + use_cycles(500); +} + /* * long Load(char *name, struct EXEC *header); */ @@ -1438,8 +1492,10 @@ void psxBios_Load() { // 0x42 void *pa1; pa1 = Ra1; - if (pa1 && LoadCdromFile(Ra0, &eheader) == 0) { + if (pa1 != INVALID_PTR && LoadCdromFile(Ra0, &eheader) == 0) { memcpy(pa1, ((char*)&eheader)+16, sizeof(EXEC)); + psxCpu->Clear(a1, sizeof(EXEC) / 4); + FlushCache(); v0 = 1; } else v0 = 0; PSXBIOS_LOG("psxBios_%s: %s, %d -> %d\n", biosA0n[0x42], Ra0, a1, v0); @@ -1486,13 +1542,10 @@ void psxBios_Exec() { // 43 pc0 = SWAP32(header->_pc0); } -void psxBios_FlushCache() { // 44 -#ifdef PSXBIOS_LOG +static void psxBios_FlushCache() { // 44 PSXBIOS_LOG("psxBios_%s\n", biosA0n[0x44]); -#endif - psxCpu->Notify(R3000ACPU_NOTIFY_CACHE_ISOLATED, NULL); - psxCpu->Notify(R3000ACPU_NOTIFY_CACHE_UNISOLATED, NULL); - pc0 = ra; + FlushCache(); + mips_return_void(); } void psxBios_GPU_dw() { // 0x46 @@ -1683,19 +1736,18 @@ void psxBios_SetMem() { // 9f } /* TODO FIXME : Not compliant. -1 indicates failure but using 1 for now. */ -void psxBios_get_cd_status(void) //a6 +static void psxBios_get_cd_status() // a6 { + PSXBIOS_LOG("psxBios_%s\n", biosA0n[0xa6]); v0 = 1; pc0 = ra; } -void psxBios__card_info() { // ab -#ifdef PSXBIOS_LOG +static void psxBios__card_info() { // ab PSXBIOS_LOG("psxBios_%s: %x\n", biosA0n[0xab], a0); -#endif u32 ret, port; - card_active_chan = a0; - port = card_active_chan >> 4; + storeRam32(A_CARD_CHAN1, a0); + port = a0 >> 4; switch (port) { case 0x0: @@ -1705,9 +1757,7 @@ void psxBios__card_info() { // ab ret = 0x0100; break; default: -#ifdef PSXBIOS_LOG - PSXBIOS_LOG("psxBios_%s: UNKNOWN PORT 0x%x\n", biosA0n[0xab], card_active_chan); -#endif + PSXBIOS_LOG("psxBios_%s: UNKNOWN PORT 0x%x\n", biosA0n[0xab], a0); ret = 0x0302; break; } @@ -1726,7 +1776,7 @@ void psxBios__card_load() { // ac PSXBIOS_LOG("psxBios_%s: %x\n", biosA0n[0xac], a0); #endif - card_active_chan = a0; + storeRam32(A_CARD_CHAN1, a0); // DeliverEvent(0xf0000011, 0x0004); DeliverEvent(0xf4000001, 0x0004); @@ -2078,7 +2128,7 @@ void psxBios_InitPAD() { // 0x12 PSXBIOS_LOG("psxBios_%s %x %x %x %x\n", biosB0n[0x12], a0, a1, a2, a3); // printf("%s", "PS-X Control PAD Driver Ver 3.0"); - // PAD_dr_enable = 0; + ram32[A_PAD_DR_DST/4] = 0; ram32[A_PAD_OUTBUF/4 + 0] = 0; ram32[A_PAD_OUTBUF/4 + 1] = 0; ram32[A_PAD_OUT_LEN/4 + 0] = 0; @@ -2125,30 +2175,53 @@ void psxBios_StopPAD() { // 14 mips_return_void_c(200); } -void psxBios_PAD_init() { // 15 -#ifdef PSXBIOS_LOG +static void psxBios_PAD_init() { // 15 + u32 ret = 0; PSXBIOS_LOG("psxBios_%s\n", biosB0n[0x15]); -#endif - if (!(a0 == 0x20000000 || a0 == 0x20000001)) + if (a0 == 0x20000000 || a0 == 0x20000001) { - v0 = 0; - pc0 = ra; - return; + u32 dst = a1; + a0 = A_PAD_DR_BUF1; a1 = 0x22; + a2 = A_PAD_DR_BUF2; a3 = 0x22; + psxBios_InitPAD(); + psxBios_StartPAD(); + storeRam32(A_PAD_DR_DST, dst); + ret = 2; + } + mips_return_c(ret, 100); +} + +static u32 psxBios_PAD_dr_() { + u8 *dst = loadRam32ptr(A_PAD_DR_DST); + u8 *buf1 = castRam8ptr(A_PAD_DR_BUF1); + u8 *buf2 = castRam8ptr(A_PAD_DR_BUF2); + dst[0] = dst[1] = dst[2] = dst[3] = ~0; + if (buf1[0] == 0 && (buf1[1] == 0x23 || buf1[1] == 0x41)) + { + dst[0] = buf1[3], dst[1] = buf1[2]; + if (buf1[1] == 0x23) { + dst[0] |= 0xc7, dst[1] |= 7; + if (buf1[5] >= 0x10) dst[0] &= ~(1u << 6); + if (buf1[6] >= 0x10) dst[0] &= ~(1u << 7); + } } - psxHwWrite16(0x1f801074, (u16)(psxHwRead16(0x1f801074) | 0x1)); - pad_buf = (int *)Ra1; - *pad_buf = -1; - psxRegs.CP0.n.SR |= 0x401; - v0 = 2; - pc0 = ra; + if (buf2[0] == 0 && (buf2[1] == 0x23 || buf2[1] == 0x41)) + { + dst[2] = buf2[3], dst[3] = buf2[2]; + if (buf2[1] == 0x23) { + dst[2] |= 0xc7, dst[3] |= 7; + if (buf2[5] >= 0x10) dst[2] &= ~(1u << 6); + if (buf2[6] >= 0x10) dst[2] &= ~(1u << 7); + } + } + use_cycles(55); + return SWAP32(*(u32 *)dst); } -void psxBios_PAD_dr() { // 16 -#ifdef PSXBIOS_LOG +static void psxBios_PAD_dr() { // 16 PSXBIOS_LOG("psxBios_%s\n", biosB0n[0x16]); -#endif - - v0 = -1; pc0 = ra; + u32 ret = psxBios_PAD_dr_(); + mips_return(ret); } static void psxBios_ReturnFromException() { // 17 @@ -2196,9 +2269,6 @@ static void psxBios_UnDeliverEvent() { // 0x20 mips_return(ret); } -char ffile[64], *pfile; -int nfile; - static void buopen(int mcd, char *ptr, char *cfg) { int i; @@ -2611,11 +2681,12 @@ void psxBios_InitCARD() { // 4a u32 *ram32 = (u32 *)psxM; PSXBIOS_LOG("psxBios_%s: %x\n", biosB0n[0x4a], a0); write_chain(ram32 + A_PADCRD_CHN_E/4, 0, 0x49bc, 0x4a4c); - // (maybe) todo: early_card_irq, FlushCache etc + // (maybe) todo: early_card_irq, etc ram32[A_PAD_IRQR_ENA/4] = SWAP32(a0); - mips_return_c(0, 300); + psxBios_FlushCache(); + mips_return_c(0, 34+13+15+6); } void psxBios_StartCARD() { // 4b @@ -2658,7 +2729,7 @@ void psxBios__card_write() { // 0x4e v0 = 0; pc0 = ra; return; } - card_active_chan = a0; + storeRam32(A_CARD_CHAN1, a0); port = a0 >> 4; if (pa2 != INVALID_PTR) { @@ -2694,7 +2765,7 @@ void psxBios__card_read() { // 0x4f v0 = 0; pc0 = ra; return; } - card_active_chan = a0; + storeRam32(A_CARD_CHAN1, a0); port = a0 >> 4; if (pa2 != INVALID_PTR) { @@ -2785,13 +2856,14 @@ void psxBios_GetB0Table() { // 57 mips_return_c(A_B0_TABLE, 3); } -void psxBios__card_chan() { // 0x58 -#ifdef PSXBIOS_LOG +static void psxBios__card_chan() { // 0x58 + u32 ret; PSXBIOS_LOG("psxBios_%s\n", biosB0n[0x58]); -#endif - v0 = card_active_chan; - pc0 = ra; + // todo: should return active slot chan + // (active - which was last processed by irq code) + ret = loadRam32(A_CARD_CHAN1); + mips_return_c(ret, 8); } static void psxBios_ChangeClearPad() { // 5b @@ -2803,21 +2875,17 @@ static void psxBios_ChangeClearPad() { // 5b mips_return_c(ret, 6); } -void psxBios__card_status() { // 5c -#ifdef PSXBIOS_LOG - PSXBIOS_LOG("psxBios_%s: %x\n", biosB0n[0x5c], a0); -#endif +static void psxBios__card_status() { // 5c + PSXBIOS_LOG("psxBios_%s %x\n", biosB0n[0x5c], a0); - v0 = card_active_chan; + v0 = 1; // ready pc0 = ra; } -void psxBios__card_wait() { // 5d -#ifdef PSXBIOS_LOG - PSXBIOS_LOG("psxBios_%s: %x\n", biosB0n[0x5d], a0); -#endif +static void psxBios__card_wait() { // 5d + PSXBIOS_LOG("psxBios_%s %x\n", biosB0n[0x5d], a0); - v0 = 1; + v0 = 1; // ready pc0 = ra; } @@ -3030,8 +3098,8 @@ static void write_chain(u32 *d, u32 next, u32 handler1, u32 handler2) d[2] = SWAPu32(handler2); // install the hle traps - PSXMu32ref(handler1) = HLEOP(chain_hle_op(handler1)); - PSXMu32ref(handler2) = HLEOP(chain_hle_op(handler2)); + if (handler1) PSXMu32ref(handler1) = HLEOP(chain_hle_op(handler1)); + if (handler2) PSXMu32ref(handler2) = HLEOP(chain_hle_op(handler2)); } static void setup_tt(u32 tcb_cnt, u32 evcb_cnt) @@ -3498,12 +3566,7 @@ void psxBiosInit() { //************** THE END *************************************** /**/ - pad_buf = NULL; - heap_addr = NULL; - heap_end = NULL; - heap_size = 0; memset(FDesc, 0, sizeof(FDesc)); - card_active_chan = 0; // initial RNG seed psxMu32ref(0x9010) = SWAPu32(0xac20cc00); @@ -3524,6 +3587,13 @@ void psxBiosInit() { len = 0x80000 - 0x69d68; uncompress((Bytef *)(psxR + 0x69d68), &len, font_889f, sizeof(font_889f)); + // trap attempts to call bios directly + rom32[0x00000/4] = HLEOP(hleop_dummy); + rom32[0x00180/4] = HLEOP(hleop_dummy); + rom32[0x3fffc/4] = HLEOP(hleop_dummy); + rom32[0x65ffc/4] = HLEOP(hleop_dummy); + rom32[0x7ff2c/4] = HLEOP(hleop_dummy); + /* Some games like R-Types, CTR, Fade to Black read from adress 0x00000000 due to uninitialized pointers. See Garbage Area at Address 00000000h in Nocash PSX Specfications for more information. Here are some examples of games not working with this fix in place : @@ -3633,40 +3703,6 @@ void psxBiosCnfLoaded(u32 tcb_cnt, u32 evcb_cnt) { } \ } -static void biosPadHLE() { - if (pad_buf != NULL) { - u32 *buf = (u32*)pad_buf; - - PAD1_startPoll(1); - if (PAD1_poll(0x42) == 0x23) { - PAD1_poll(0); - *buf = PAD1_poll(0) << 8; - *buf |= PAD1_poll(0); - PAD1_poll(0); - *buf &= ~((PAD1_poll(0) > 0x20) ? 1 << 6 : 0); - *buf &= ~((PAD1_poll(0) > 0x20) ? 1 << 7 : 0); - } else { - PAD1_poll(0); - *buf = PAD1_poll(0) << 8; - *buf|= PAD1_poll(0); - } - - PAD2_startPoll(2); - if (PAD2_poll(0x42) == 0x23) { - PAD2_poll(0); - *buf |= PAD2_poll(0) << 24; - *buf |= PAD2_poll(0) << 16; - PAD2_poll(0); - *buf &= ~((PAD2_poll(0) > 0x20) ? 1 << 22 : 0); - *buf &= ~((PAD2_poll(0) > 0x20) ? 1 << 23 : 0); - } else { - PAD2_poll(0); - *buf |= PAD2_poll(0) << 24; - *buf |= PAD2_poll(0) << 16; - } - } -} - static void handle_chain_x_x_1(u32 enable, u32 irqbit) { use_cycles(10); @@ -3719,9 +3755,9 @@ void hleExc0_1_2() // A(90h) - CdromIoIrqFunc1 void hleExc0_2_2_syscall() // not in any A/B/C table { - u32 code = (psxRegs.CP0.n.Cause & 0x3c) >> 2; u32 tcbPtr = loadRam32(A_TT_PCB); TCB *tcb = loadRam32ptr(tcbPtr); + u32 code = SWAP32(tcb->cause) >> 2; if (code != R3000E_Syscall) { if (code != 0) { @@ -3732,9 +3768,9 @@ void hleExc0_2_2_syscall() // not in any A/B/C table return; } - //printf("%s c=%d a0=%d\n", __func__, code, a0); + //printf("%s c=%d a0=%d\n", __func__, code, SWAP32(tcb->reg[4])); tcb->epc += SWAP32(4); - switch (a0) { + switch (SWAP32(tcb->reg[4])) { // a0 case 0: // noop break; @@ -3750,7 +3786,7 @@ void hleExc0_2_2_syscall() // not in any A/B/C table case 3: { // ChangeThreadSubFunction u32 tcbPtr = loadRam32(A_TT_PCB); - storeRam32(tcbPtr, a1); + storeRam32(tcbPtr, SWAP32(tcb->reg[5])); // a1 break; } default: @@ -3852,8 +3888,9 @@ void hleExcPadCard1(void) psxBios_PADpoll(1); psxBios_PADpoll(2); - biosPadHLE(); use_cycles(100); + if (loadRam32(A_PAD_DR_DST)) + psxBios_PAD_dr_(); } if (loadRam32(A_PAD_ACK_VBL)) psxHwWrite16(0x1f801070, ~1); @@ -3954,9 +3991,5 @@ void psxBiosException() { void psxBiosFreeze(int Mode) { u32 base = 0x40000; - bfreezepsxMptr(pad_buf, int); - bfreezepsxMptr(heap_addr, u32); bfreezes(FDesc); - bfreezel(&card_active_chan); - bfreezel(&heap_size); }