X-Git-Url: https://notaz.gp2x.de/cgi-bin/gitweb.cgi?a=blobdiff_plain;f=libpcsxcore%2Fpsxcounters.c;h=e8d2796b5a9b0a3546a4865e707ae70a0e3d1c56;hb=ddbaf678c49d33cf60f1eac5069e3275baa2c685;hp=90c3d1491c9628052eb9acf9ac41a2035631dcc0;hpb=9f7ee52edab5d7ba8f7da69f3c15d1d0025bd15b;p=pcsx_rearmed.git

diff --git a/libpcsxcore/psxcounters.c b/libpcsxcore/psxcounters.c
index 90c3d149..e8d2796b 100644
--- a/libpcsxcore/psxcounters.c
+++ b/libpcsxcore/psxcounters.c
@@ -22,17 +22,11 @@
  */
 
 #include "psxcounters.h"
+#include "gpu.h"
 #include "debug.h"
 
 /******************************************************************************/
 
-typedef struct Rcnt
-{
-    u16 mode, target;
-    u32 rate, irq, counterState, irqState;
-    u32 cycle, cycleStart;
-} Rcnt;
-
 enum
 {
     Rc0Gate           = 0x0001, // 0    not implemented
@@ -75,12 +69,14 @@ static const s32 VerboseLevel     = VERBOSE_LEVEL;
 
 /******************************************************************************/
 
-static Rcnt rcnts[ CounterQuantity ];
+Rcnt rcnts[ CounterQuantity ];
 
 static u32 hSyncCount = 0;
 static u32 spuSyncCount = 0;
 static u32 hsync_steps = 0;
 static u32 gpu_wants_hcnt = 0;
+static u32 base_cycle = 0;
+static u32 frame_counter = 0;
 
 u32 psxNextCounter = 0, psxNextsCounter = 0;
 
@@ -183,6 +179,9 @@ void psxRcntSet()
             psxNextCounter = countToUpdate;
         }
     }
+
+    psxRegs.interrupt |= (1 << PSXINT_RCNT);
+    new_dyna_set_event(PSXINT_RCNT, psxNextCounter);
 }
 
 /******************************************************************************/
@@ -297,7 +296,9 @@ void psxRcntUpdate()
         if( hSyncCount == VBlankStart[Config.PsxType] )
         {
             GPU_vBlank( 1, &hSyncCount, &gpu_wants_hcnt );
-            
+            //if( !(HW_GPU_STATUS & PSXGPU_ILACE) ) // hmh
+                HW_GPU_STATUS |= PSXGPU_LCF;
+
             // For the best times. :D
             //setIrq( 0x01 );
         }
@@ -306,12 +307,17 @@ void psxRcntUpdate()
         if( hSyncCount >= (Config.VSyncWA ? HSyncTotal[Config.PsxType] / BIAS : HSyncTotal[Config.PsxType]) )
         {
             hSyncCount = 0;
+            frame_counter++;
 
             GPU_vBlank( 0, &hSyncCount, &gpu_wants_hcnt );
             setIrq( 0x01 );
 
             EmuUpdate();
             GPU_updateLace();
+
+            HW_GPU_STATUS &= ~PSXGPU_LCF;
+            if( HW_GPU_STATUS & PSXGPU_ILACE )
+                HW_GPU_STATUS |= frame_counter << 31;
         }
 
         // Schedule next call, in hsyncs
@@ -326,7 +332,14 @@ void psxRcntUpdate()
             hsync_steps = 1;
 
         rcnts[3].cycleStart = cycle - leftover_cycles;
-        rcnts[3].cycle = hsync_steps * rcnts[3].target;
+        if (Config.PsxType)
+                // 20.12 precision, clk / 50 / 313 ~= 2164.14
+                base_cycle += hsync_steps * 8864320;
+        else
+                // clk / 60 / 263 ~= 2146.31
+                base_cycle += hsync_steps * 8791293;
+        rcnts[3].cycle = base_cycle >> 12;
+        base_cycle &= 0xfff;
         psxRcntSet();
     }
 
@@ -498,6 +511,8 @@ s32 psxRcntFreeze( gzFile f, s32 Mode )
     if (Mode == 0)
         hsync_steps = (psxRegs.cycle - rcnts[3].cycleStart) / rcnts[3].target;
 
+    base_cycle = 0;
+
     return 0;
 }