X-Git-Url: https://notaz.gp2x.de/cgi-bin/gitweb.cgi?a=blobdiff_plain;f=libpcsxcore%2Fpsxdma.c;h=24570968dd07cba6d2593845b50cbabdff82ce15;hb=9a0a61d27586bfb93aa443cc59d9588d2b9cf992;hp=ff7d6a3be2a4a9ebbae42482d79f735d0edfc5b6;hpb=650adfd2da779ba8855623362c2900583e22931e;p=pcsx_rearmed.git

diff --git a/libpcsxcore/psxdma.c b/libpcsxcore/psxdma.c
index ff7d6a3b..24570968 100644
--- a/libpcsxcore/psxdma.c
+++ b/libpcsxcore/psxdma.c
@@ -24,6 +24,13 @@
 #include "psxdma.h"
 #include "gpu.h"
 
+#ifndef min
+#define min(a, b) ((b) < (a) ? (b) : (a))
+#endif
+#ifndef PSXDMA_LOG
+#define PSXDMA_LOG(...)
+#endif
+
 // Dma0/1 in Mdec.c
 // Dma3   in CdRom.c
 
@@ -36,46 +43,47 @@ void spuInterrupt() {
 }
 
 void psxDma4(u32 madr, u32 bcr, u32 chcr) { // SPU
+	u32 words, words_max = 0, words_copy;
 	u16 *ptr;
-	u32 size;
+
+	madr &= ~3;
+	ptr = getDmaRam(madr, &words_max);
+	if (ptr == INVALID_PTR)
+		log_unhandled("bad dma4 madr %x\n", madr);
+
+	words = words_copy = (bcr >> 16) * (bcr & 0xffff);
+	if (words_copy > words_max) {
+		log_unhandled("bad dma4 madr %x bcr %x\n", madr, bcr);
+		words_copy = words_max;
+	}
 
 	switch (chcr) {
 		case 0x01000201: //cpu to spu transfer
-#ifdef PSXDMA_LOG
 			PSXDMA_LOG("*** DMA4 SPU - mem2spu *** %x addr = %x size = %x\n", chcr, madr, bcr);
-#endif
-			ptr = (u16 *)PSXM(madr);
-			if (ptr == NULL) {
-#ifdef CPU_LOG
-				CPU_LOG("*** DMA4 SPU - mem2spu *** NULL Pointer!!!\n");
-#endif
+			if (ptr == INVALID_PTR)
 				break;
-			}
-			SPU_writeDMAMem(ptr, (bcr >> 16) * (bcr & 0xffff) * 2, psxRegs.cycle);
-			SPUDMA_INT((bcr >> 16) * (bcr & 0xffff) / 2);
+			SPU_writeDMAMem(ptr, words_copy * 2, psxRegs.cycle);
+			HW_DMA4_MADR = SWAPu32(madr + words_copy * 2);
+			// This should be much slower, like 12+ cycles/byte, it's like
+			// that because the CPU runs too fast and fifo is not emulated.
+			// See also set_dma_end().
+			set_event(PSXINT_SPUDMA, words * 4);
 			return;
 
 		case 0x01000200: //spu to cpu transfer
-#ifdef PSXDMA_LOG
 			PSXDMA_LOG("*** DMA4 SPU - spu2mem *** %x addr = %x size = %x\n", chcr, madr, bcr);
-#endif
-			ptr = (u16 *)PSXM(madr);
-			if (ptr == NULL) {
-#ifdef CPU_LOG
-				CPU_LOG("*** DMA4 SPU - spu2mem *** NULL Pointer!!!\n");
-#endif
+			if (ptr == INVALID_PTR)
 				break;
-			}
-			size = (bcr >> 16) * (bcr & 0xffff) * 2;
-			SPU_readDMAMem(ptr, size, psxRegs.cycle);
-			psxCpu->Clear(madr, size);
-			break;
+			SPU_readDMAMem(ptr, words_copy * 2, psxRegs.cycle);
+			psxCpu->Clear(madr, words_copy);
+
+			HW_DMA4_MADR = SWAPu32(madr + words_copy * 4);
+			set_event(PSXINT_SPUDMA, words * 4);
+			return;
 
-#ifdef PSXDMA_LOG
 		default:
-			PSXDMA_LOG("*** DMA4 SPU - unknown *** %x addr = %x size = %x\n", chcr, madr, bcr);
+			log_unhandled("*** DMA4 SPU - unknown *** %x addr = %x size = %x\n", chcr, madr, bcr);
 			break;
-#endif
 	}
 
 	HW_DMA4_CHCR &= SWAP32(~0x01000000);
@@ -117,132 +125,153 @@ static u32 gpuDmaChainSize(u32 addr) {
 		// next 32-bit pointer
 		addr = psxMu32( addr & ~0x3 ) & 0xffffff;
 		size += 1;
-	} while (addr != 0xffffff);
+	} while (!(addr & 0x800000)); // contrary to some documentation, the end-of-linked-list marker is not actually 0xFF'FFFF
+                                  // any pointer with bit 23 set will do.
 
 	return size;
 }
 
 void psxDma2(u32 madr, u32 bcr, u32 chcr) { // GPU
-	u32 *ptr;
-	u32 size;
+	u32 *ptr, madr_next, *madr_next_p, size;
+	u32 words, words_left, words_max, words_copy;
+	int do_walking;
 
+	madr &= ~3;
 	switch (chcr) {
 		case 0x01000200: // vram2mem
-#ifdef PSXDMA_LOG
 			PSXDMA_LOG("*** DMA2 GPU - vram2mem *** %lx addr = %lx size = %lx\n", chcr, madr, bcr);
-#endif
-			ptr = (u32 *)PSXM(madr);
-			if (ptr == NULL) {
-#ifdef CPU_LOG
-				CPU_LOG("*** DMA2 GPU - vram2mem *** NULL Pointer!!!\n");
-#endif
+			ptr = getDmaRam(madr, &words_max);
+			if (ptr == INVALID_PTR) {
+				log_unhandled("bad dma2 madr %x\n", madr);
 				break;
 			}
 			// BA blocks * BS words (word = 32-bits)
-			size = (bcr >> 16) * (bcr & 0xffff);
-			GPU_readDataMem(ptr, size);
-			psxCpu->Clear(madr, size);
+			words = words_copy = (bcr >> 16) * (bcr & 0xffff);
+			if (words > words_max) {
+				log_unhandled("bad dma2 madr %x bcr %x\n", madr, bcr);
+				words_copy = words_max;
+			}
+			GPU_readDataMem(ptr, words_copy);
+			psxCpu->Clear(madr, words_copy);
+
+			HW_DMA2_MADR = SWAPu32(madr + words_copy * 4);
 
+			// careful: gpu_state_change() also messes with this
+			HW_GPU_STATUS &= SWAP32(~PSXGPU_nBUSY);
 			// already 32-bit word size ((size * 4) / 4)
-			GPUDMA_INT(size / 4);
+			set_event(PSXINT_GPUDMA, words / 4);
 			return;
 
 		case 0x01000201: // mem2vram
-#ifdef PSXDMA_LOG
 			PSXDMA_LOG("*** DMA 2 - GPU mem2vram *** %lx addr = %lx size = %lx\n", chcr, madr, bcr);
-#endif
-			ptr = (u32 *)PSXM(madr);
-			if (ptr == NULL) {
-#ifdef CPU_LOG
-				CPU_LOG("*** DMA2 GPU - mem2vram *** NULL Pointer!!!\n");
-#endif
-				break;
+			words = words_left = (bcr >> 16) * (bcr & 0xffff);
+			while (words_left > 0) {
+				ptr = getDmaRam(madr, &words_max);
+				if (ptr == INVALID_PTR) {
+					log_unhandled("bad2 dma madr %x\n", madr);
+					break;
+				}
+				words_copy = min(words_left, words_max);
+				GPU_writeDataMem(ptr, words_copy);
+				words_left -= words_copy;
+				madr += words_copy * 4;
 			}
-			// BA blocks * BS words (word = 32-bits)
-			size = (bcr >> 16) * (bcr & 0xffff);
-			GPU_writeDataMem(ptr, size);
 
+			HW_DMA2_MADR = SWAPu32(madr);
+
+			// careful: gpu_state_change() also messes with this
+			HW_GPU_STATUS &= SWAP32(~PSXGPU_nBUSY);
 			// already 32-bit word size ((size * 4) / 4)
-			GPUDMA_INT(size / 4);
+			set_event(PSXINT_GPUDMA, words / 4);
 			return;
 
 		case 0x01000401: // dma chain
-#ifdef PSXDMA_LOG
 			PSXDMA_LOG("*** DMA 2 - GPU dma chain *** %lx addr = %lx size = %lx\n", chcr, madr, bcr);
-#endif
+			// when not emulating walking progress, end immediately
+			madr_next = 0xffffff;
 
-			size = GPU_dmaChain((u32 *)psxM, madr & 0x1fffff);
+			do_walking = Config.GpuListWalking;
+			if (do_walking < 0)
+				do_walking = Config.hacks.gpu_slow_list_walking;
+			madr_next_p = do_walking ? &madr_next : NULL;
+
+			size = GPU_dmaChain((u32 *)psxM, madr & 0x1fffff, madr_next_p);
 			if ((int)size <= 0)
 				size = gpuDmaChainSize(madr);
-			HW_GPU_STATUS &= ~PSXGPU_nBUSY;
-			
+
+			HW_GPU_STATUS &= SWAP32(~PSXGPU_nBUSY);
+			HW_DMA2_MADR = SWAPu32(madr_next);
+
 			// Tekken 3 = use 1.0 only (not 1.5x)
 
 			// Einhander = parse linked list in pieces (todo)
-			// Final Fantasy 4 = internal vram time (todo)
 			// Rebel Assault 2 = parse linked list in pieces (todo)
-			// Vampire Hunter D = allow edits to linked list (todo)
-			GPUDMA_INT(size);
+			set_event(PSXINT_GPUDMA, size);
 			return;
 
-#ifdef PSXDMA_LOG
 		default:
-			PSXDMA_LOG("*** DMA 2 - GPU unknown *** %lx addr = %lx size = %lx\n", chcr, madr, bcr);
+			log_unhandled("*** DMA 2 - GPU unknown *** %x addr = %x size = %x\n", chcr, madr, bcr);
 			break;
-#endif
 	}
 
 	HW_DMA2_CHCR &= SWAP32(~0x01000000);
 	DMA_INTERRUPT(2);
 }
 
+// note: this is also (ab)used for non-dma prim command
+// to delay gpu returning to idle state, see gpu_state_change()
 void gpuInterrupt() {
+	if (HW_DMA2_CHCR == SWAP32(0x01000401) && !(HW_DMA2_MADR & SWAP32(0x800000)))
+	{
+		u32 size, madr_next = 0xffffff;
+		size = GPU_dmaChain((u32 *)psxM, HW_DMA2_MADR & 0x1fffff, &madr_next);
+		HW_DMA2_MADR = SWAPu32(madr_next);
+		set_event(PSXINT_GPUDMA, size);
+		return;
+	}
 	if (HW_DMA2_CHCR & SWAP32(0x01000000))
 	{
 		HW_DMA2_CHCR &= SWAP32(~0x01000000);
 		DMA_INTERRUPT(2);
 	}
-	HW_GPU_STATUS |= PSXGPU_nBUSY; // GPU no longer busy
+	HW_GPU_STATUS |= SWAP32(PSXGPU_nBUSY); // GPU no longer busy
 }
 
 void psxDma6(u32 madr, u32 bcr, u32 chcr) {
-	u32 size;
-	u32 *mem = (u32 *)PSXM(madr);
+	u32 words, words_max;
+	u32 *mem;
 
-#ifdef PSXDMA_LOG
 	PSXDMA_LOG("*** DMA6 OT *** %x addr = %x size = %x\n", chcr, madr, bcr);
-#endif
 
 	if (chcr == 0x11000002) {
-		if (mem == NULL) {
-#ifdef CPU_LOG
-			CPU_LOG("*** DMA6 OT *** NULL Pointer!!!\n");
-#endif
-			HW_DMA6_CHCR &= SWAP32(~0x01000000);
+		mem = getDmaRam(madr, &words_max);
+		if (mem == INVALID_PTR) {
+			log_unhandled("bad6 dma madr %x\n", madr);
+			HW_DMA6_CHCR &= SWAP32(~0x11000000);
 			DMA_INTERRUPT(6);
 			return;
 		}
 
 		// already 32-bit size
-		size = bcr;
+		words = bcr;
 
-		while (bcr--) {
+		while (bcr-- && mem > (u32 *)psxM) {
 			*mem-- = SWAP32((madr - 4) & 0xffffff);
 			madr -= 4;
 		}
-		mem++; *mem = 0xffffff;
+		*++mem = SWAP32(0xffffff);
 
-		GPUOTCDMA_INT(size);
+		// halted
+		psxRegs.cycle += words;
+		set_event(PSXINT_GPUOTCDMA, 16);
 		return;
 	}
-#ifdef PSXDMA_LOG
 	else {
 		// Unknown option
-		PSXDMA_LOG("*** DMA6 OT - unknown *** %x addr = %x size = %x\n", chcr, madr, bcr);
+		log_unhandled("*** DMA6 OT - unknown *** %x addr = %x size = %x\n", chcr, madr, bcr);
 	}
-#endif
 
-	HW_DMA6_CHCR &= SWAP32(~0x01000000);
+	HW_DMA6_CHCR &= SWAP32(~0x11000000);
 	DMA_INTERRUPT(6);
 }
 
@@ -250,7 +279,7 @@ void gpuotcInterrupt()
 {
 	if (HW_DMA6_CHCR & SWAP32(0x01000000))
 	{
-		HW_DMA6_CHCR &= SWAP32(~0x01000000);
+		HW_DMA6_CHCR &= SWAP32(~0x11000000);
 		DMA_INTERRUPT(6);
 	}
 }