X-Git-Url: https://notaz.gp2x.de/cgi-bin/gitweb.cgi?a=blobdiff_plain;f=libpcsxcore%2Fpsxdma.c;h=24570968dd07cba6d2593845b50cbabdff82ce15;hb=c2eee46bfb8a3fde297735a8b115330498d442b4;hp=c0aee7ed4938cf422076e43a9d7ea58d0db9a6e4;hpb=3c7a8977ddbdbfb4a8840a487fadade29bd939d6;p=pcsx_rearmed.git

diff --git a/libpcsxcore/psxdma.c b/libpcsxcore/psxdma.c
index c0aee7ed..24570968 100644
--- a/libpcsxcore/psxdma.c
+++ b/libpcsxcore/psxdma.c
@@ -67,7 +67,7 @@ void psxDma4(u32 madr, u32 bcr, u32 chcr) { // SPU
 			// This should be much slower, like 12+ cycles/byte, it's like
 			// that because the CPU runs too fast and fifo is not emulated.
 			// See also set_dma_end().
-			SPUDMA_INT(words * 4);
+			set_event(PSXINT_SPUDMA, words * 4);
 			return;
 
 		case 0x01000200: //spu to cpu transfer
@@ -78,7 +78,7 @@ void psxDma4(u32 madr, u32 bcr, u32 chcr) { // SPU
 			psxCpu->Clear(madr, words_copy);
 
 			HW_DMA4_MADR = SWAPu32(madr + words_copy * 4);
-			SPUDMA_INT(words * 4);
+			set_event(PSXINT_SPUDMA, words * 4);
 			return;
 
 		default:
@@ -156,8 +156,10 @@ void psxDma2(u32 madr, u32 bcr, u32 chcr) { // GPU
 
 			HW_DMA2_MADR = SWAPu32(madr + words_copy * 4);
 
+			// careful: gpu_state_change() also messes with this
+			HW_GPU_STATUS &= SWAP32(~PSXGPU_nBUSY);
 			// already 32-bit word size ((size * 4) / 4)
-			GPUDMA_INT(words / 4);
+			set_event(PSXINT_GPUDMA, words / 4);
 			return;
 
 		case 0x01000201: // mem2vram
@@ -177,8 +179,10 @@ void psxDma2(u32 madr, u32 bcr, u32 chcr) { // GPU
 
 			HW_DMA2_MADR = SWAPu32(madr);
 
+			// careful: gpu_state_change() also messes with this
+			HW_GPU_STATUS &= SWAP32(~PSXGPU_nBUSY);
 			// already 32-bit word size ((size * 4) / 4)
-			GPUDMA_INT(words / 4);
+			set_event(PSXINT_GPUDMA, words / 4);
 			return;
 
 		case 0x01000401: // dma chain
@@ -202,7 +206,7 @@ void psxDma2(u32 madr, u32 bcr, u32 chcr) { // GPU
 
 			// Einhander = parse linked list in pieces (todo)
 			// Rebel Assault 2 = parse linked list in pieces (todo)
-			GPUDMA_INT(size);
+			set_event(PSXINT_GPUDMA, size);
 			return;
 
 		default:
@@ -214,13 +218,15 @@ void psxDma2(u32 madr, u32 bcr, u32 chcr) { // GPU
 	DMA_INTERRUPT(2);
 }
 
+// note: this is also (ab)used for non-dma prim command
+// to delay gpu returning to idle state, see gpu_state_change()
 void gpuInterrupt() {
 	if (HW_DMA2_CHCR == SWAP32(0x01000401) && !(HW_DMA2_MADR & SWAP32(0x800000)))
 	{
 		u32 size, madr_next = 0xffffff;
 		size = GPU_dmaChain((u32 *)psxM, HW_DMA2_MADR & 0x1fffff, &madr_next);
 		HW_DMA2_MADR = SWAPu32(madr_next);
-		GPUDMA_INT(size);
+		set_event(PSXINT_GPUDMA, size);
 		return;
 	}
 	if (HW_DMA2_CHCR & SWAP32(0x01000000))
@@ -255,10 +261,9 @@ void psxDma6(u32 madr, u32 bcr, u32 chcr) {
 		}
 		*++mem = SWAP32(0xffffff);
 
-		//GPUOTCDMA_INT(size);
 		// halted
 		psxRegs.cycle += words;
-		GPUOTCDMA_INT(16);
+		set_event(PSXINT_GPUOTCDMA, 16);
 		return;
 	}
 	else {