X-Git-Url: https://notaz.gp2x.de/cgi-bin/gitweb.cgi?a=blobdiff_plain;f=libpcsxcore%2Fpsxdma.c;h=55d2a0a77459b485a4928eb23cbcd0d30b590ae9;hb=HEAD;hp=42fb3bab6ac67b65d3b22857bbb4b621492e99ab;hpb=206a936ef243684c027c3a7827259b07113e8af5;p=pcsx_rearmed.git

diff --git a/libpcsxcore/psxdma.c b/libpcsxcore/psxdma.c
index 42fb3bab..55d2a0a7 100644
--- a/libpcsxcore/psxdma.c
+++ b/libpcsxcore/psxdma.c
@@ -64,7 +64,10 @@ void psxDma4(u32 madr, u32 bcr, u32 chcr) { // SPU
 				break;
 			SPU_writeDMAMem(ptr, words_copy * 2, psxRegs.cycle);
 			HW_DMA4_MADR = SWAPu32(madr + words_copy * 2);
-			SPUDMA_INT(words * 4);
+			// This should be much slower, like 12+ cycles/byte, it's like
+			// that because the CPU runs too fast and fifo is not emulated.
+			// See also set_dma_end().
+			set_event(PSXINT_SPUDMA, words * 4 * 4);
 			return;
 
 		case 0x01000200: //spu to cpu transfer
@@ -75,7 +78,7 @@ void psxDma4(u32 madr, u32 bcr, u32 chcr) { // SPU
 			psxCpu->Clear(madr, words_copy);
 
 			HW_DMA4_MADR = SWAPu32(madr + words_copy * 4);
-			SPUDMA_INT(words * 4);
+			set_event(PSXINT_SPUDMA, words * 4 * 4);
 			return;
 
 		default:
@@ -87,6 +90,7 @@ void psxDma4(u32 madr, u32 bcr, u32 chcr) { // SPU
 	DMA_INTERRUPT(4);
 }
 
+#if 0
 // Taken from PEOPS SOFTGPU
 static inline boolean CheckForEndlessLoop(u32 laddr, u32 *lUsedAddr) {
 	if (laddr == lUsedAddr[1]) return TRUE;
@@ -127,11 +131,12 @@ static u32 gpuDmaChainSize(u32 addr) {
 
 	return size;
 }
+#endif
 
 void psxDma2(u32 madr, u32 bcr, u32 chcr) { // GPU
-	u32 *ptr, madr_next, *madr_next_p, size;
+	u32 *ptr, madr_next, *madr_next_p;
 	u32 words, words_left, words_max, words_copy;
-	int do_walking;
+	int cycles_sum, cycles_last_cmd = 0, do_walking;
 
 	madr &= ~3;
 	switch (chcr) {
@@ -153,8 +158,10 @@ void psxDma2(u32 madr, u32 bcr, u32 chcr) { // GPU
 
 			HW_DMA2_MADR = SWAPu32(madr + words_copy * 4);
 
+			// careful: gpu_state_change() also messes with this
+			psxRegs.gpuIdleAfter = psxRegs.cycle + words / 4 + 16;
 			// already 32-bit word size ((size * 4) / 4)
-			GPUDMA_INT(words / 4);
+			set_event(PSXINT_GPUDMA, words / 4);
 			return;
 
 		case 0x01000201: // mem2vram
@@ -174,8 +181,10 @@ void psxDma2(u32 madr, u32 bcr, u32 chcr) { // GPU
 
 			HW_DMA2_MADR = SWAPu32(madr);
 
+			// careful: gpu_state_change() also messes with this
+			psxRegs.gpuIdleAfter = psxRegs.cycle + words / 4 + 16;
 			// already 32-bit word size ((size * 4) / 4)
-			GPUDMA_INT(words / 4);
+			set_event(PSXINT_GPUDMA, words / 4);
 			return;
 
 		case 0x01000401: // dma chain
@@ -184,22 +193,23 @@ void psxDma2(u32 madr, u32 bcr, u32 chcr) { // GPU
 			madr_next = 0xffffff;
 
 			do_walking = Config.GpuListWalking;
-			if (do_walking < 0)
+			if (do_walking < 0 || Config.hacks.gpu_timing1024)
 				do_walking = Config.hacks.gpu_slow_list_walking;
 			madr_next_p = do_walking ? &madr_next : NULL;
 
-			size = GPU_dmaChain((u32 *)psxM, madr & 0x1fffff, madr_next_p);
-			if ((int)size <= 0)
-				size = gpuDmaChainSize(madr);
+			cycles_sum = GPU_dmaChain((u32 *)psxM, madr & 0x1fffff,
+					madr_next_p, &cycles_last_cmd);
 
-			HW_GPU_STATUS &= SWAP32(~PSXGPU_nBUSY);
 			HW_DMA2_MADR = SWAPu32(madr_next);
 
-			// Tekken 3 = use 1.0 only (not 1.5x)
+			// a hack for Judge Dredd which is annoyingly sensitive to timing
+			if (Config.hacks.gpu_timing1024)
+				cycles_sum = 1024;
 
-			// Einhander = parse linked list in pieces (todo)
-			// Rebel Assault 2 = parse linked list in pieces (todo)
-			GPUDMA_INT(size);
+			psxRegs.gpuIdleAfter = psxRegs.cycle + cycles_sum + cycles_last_cmd;
+			set_event(PSXINT_GPUDMA, cycles_sum);
+			//printf("%u dma2cf: %6d,%4d %08x %08x %08x %08x\n", psxRegs.cycle,
+			//  cycles_sum, cycles_last_cmd, madr, bcr, chcr, HW_DMA2_MADR);
 			return;
 
 		default:
@@ -214,10 +224,17 @@ void psxDma2(u32 madr, u32 bcr, u32 chcr) { // GPU
 void gpuInterrupt() {
 	if (HW_DMA2_CHCR == SWAP32(0x01000401) && !(HW_DMA2_MADR & SWAP32(0x800000)))
 	{
-		u32 size, madr_next = 0xffffff;
-		size = GPU_dmaChain((u32 *)psxM, HW_DMA2_MADR & 0x1fffff, &madr_next);
+		u32 madr_next = 0xffffff, madr = SWAPu32(HW_DMA2_MADR);
+		int cycles_sum, cycles_last_cmd = 0;
+		cycles_sum = GPU_dmaChain((u32 *)psxM, madr & 0x1fffff,
+				&madr_next, &cycles_last_cmd);
 		HW_DMA2_MADR = SWAPu32(madr_next);
-		GPUDMA_INT(size);
+		if ((s32)(psxRegs.gpuIdleAfter - psxRegs.cycle) > 0)
+			cycles_sum += psxRegs.gpuIdleAfter - psxRegs.cycle;
+		psxRegs.gpuIdleAfter = psxRegs.cycle + cycles_sum + cycles_last_cmd;
+		set_event(PSXINT_GPUDMA, cycles_sum);
+		//printf("%u dma2cn: %6d,%4d %08x\n", psxRegs.cycle, cycles_sum,
+		//	cycles_last_cmd, HW_DMA2_MADR);
 		return;
 	}
 	if (HW_DMA2_CHCR & SWAP32(0x01000000))
@@ -225,7 +242,10 @@ void gpuInterrupt() {
 		HW_DMA2_CHCR &= SWAP32(~0x01000000);
 		DMA_INTERRUPT(2);
 	}
-	HW_GPU_STATUS |= SWAP32(PSXGPU_nBUSY); // GPU no longer busy
+}
+
+void psxAbortDma2() {
+	psxRegs.gpuIdleAfter = psxRegs.cycle + 32;
 }
 
 void psxDma6(u32 madr, u32 bcr, u32 chcr) {
@@ -235,6 +255,7 @@ void psxDma6(u32 madr, u32 bcr, u32 chcr) {
 	PSXDMA_LOG("*** DMA6 OT *** %x addr = %x size = %x\n", chcr, madr, bcr);
 
 	if (chcr == 0x11000002) {
+		madr &= ~3;
 		mem = getDmaRam(madr, &words_max);
 		if (mem == INVALID_PTR) {
 			log_unhandled("bad6 dma madr %x\n", madr);
@@ -252,10 +273,9 @@ void psxDma6(u32 madr, u32 bcr, u32 chcr) {
 		}
 		*++mem = SWAP32(0xffffff);
 
-		//GPUOTCDMA_INT(size);
 		// halted
 		psxRegs.cycle += words;
-		GPUOTCDMA_INT(16);
+		set_event(PSXINT_GPUOTCDMA, 16);
 		return;
 	}
 	else {