X-Git-Url: https://notaz.gp2x.de/cgi-bin/gitweb.cgi?a=blobdiff_plain;f=libpcsxcore%2Fpsxhw.c;h=60ff6c4ca1a8149a118d16538e304ef78ee542c1;hb=abf094858889145af1fde9840429dfb8a0e70a39;hp=e85d8b5c9d01a66b0e9294c015bd1cb298dcd393;hpb=a01b90c372831080aa3f9dedf5251f76f300038c;p=pcsx_rearmed.git diff --git a/libpcsxcore/psxhw.c b/libpcsxcore/psxhw.c index e85d8b5c..60ff6c4c 100644 --- a/libpcsxcore/psxhw.c +++ b/libpcsxcore/psxhw.c @@ -43,7 +43,7 @@ void psxHwReset() { void psxHwWriteIstat(u32 value) { - u32 stat = psxHu16(0x1070) & SWAPu16(value); + u32 stat = psxHu16(0x1070) & value; psxHu16ref(0x1070) = SWAPu16(stat); psxRegs.CP0.n.Cause &= ~0x400; @@ -55,7 +55,7 @@ void psxHwWriteImask(u32 value) { u32 stat = psxHu16(0x1070); psxHu16ref(0x1074) = SWAPu16(value); - if (stat & SWAPu16(value)) { + if (stat & value) { //if ((psxRegs.CP0.n.SR & 0x401) == 0x401) // log_unhandled("irq on unmask @%08x\n", psxRegs.pc); new_dyna_set_event(PSXINT_NEWDRC_CHECK, 1); @@ -120,8 +120,11 @@ u8 psxHwRead8(u32 add) { log_unhandled("unhandled r8 %08x @%08x\n", add, psxRegs.pc); // falthrough default: - if (0x1f801c00 <= add && add < 0x1f802000) - log_unhandled("spu r8 %02x @%08x\n", add, psxRegs.pc); + if (0x1f801c00 <= add && add < 0x1f802000) { + u16 val = SPU_readRegister(add & ~1, psxRegs.cycle); + hard = (add & 1) ? val >> 8 : val; + break; + } hard = psxHu8(add); #ifdef PSXHW_LOG PSXHW_LOG("*Unkwnown 8bit read at address %x\n", add); @@ -175,7 +178,7 @@ u16 psxHwRead16(u32 add) { return 0x80; case 0x1f801100: - hard = psxRcntRcount(0); + hard = psxRcntRcount0(); #ifdef PSXHW_LOG PSXHW_LOG("T0 count read16: %x\n", hard); #endif @@ -193,7 +196,7 @@ u16 psxHwRead16(u32 add) { #endif return hard; case 0x1f801110: - hard = psxRcntRcount(1); + hard = psxRcntRcount1(); #ifdef PSXHW_LOG PSXHW_LOG("T1 count read16: %x\n", hard); #endif @@ -211,7 +214,7 @@ u16 psxHwRead16(u32 add) { #endif return hard; case 0x1f801120: - hard = psxRcntRcount(2); + hard = psxRcntRcount2(); #ifdef PSXHW_LOG PSXHW_LOG("T2 count read16: %x\n", hard); #endif @@ -253,7 +256,7 @@ u16 psxHwRead16(u32 add) { // falthrough default: if (0x1f801c00 <= add && add < 0x1f802000) - return SPU_readRegister(add); + return SPU_readRegister(add, psxRegs.cycle); hard = psxHu16(add); #ifdef PSXHW_LOG PSXHW_LOG("*Unkwnown 16bit read at address %x\n", add); @@ -346,7 +349,7 @@ u32 psxHwRead32(u32 add) { // time for rootcounters :) case 0x1f801100: - hard = psxRcntRcount(0); + hard = psxRcntRcount0(); #ifdef PSXHW_LOG PSXHW_LOG("T0 count read32: %x\n", hard); #endif @@ -364,7 +367,7 @@ u32 psxHwRead32(u32 add) { #endif return hard; case 0x1f801110: - hard = psxRcntRcount(1); + hard = psxRcntRcount1(); #ifdef PSXHW_LOG PSXHW_LOG("T1 count read32: %x\n", hard); #endif @@ -382,7 +385,7 @@ u32 psxHwRead32(u32 add) { #endif return hard; case 0x1f801120: - hard = psxRcntRcount(2); + hard = psxRcntRcount2(); #ifdef PSXHW_LOG PSXHW_LOG("T2 count read32: %x\n", hard); #endif @@ -411,8 +414,8 @@ u32 psxHwRead32(u32 add) { // falthrough default: if (0x1f801c00 <= add && add < 0x1f802000) { - hard = SPU_readRegister(add); - hard |= SPU_readRegister(add + 2) << 16; + hard = SPU_readRegister(add, psxRegs.cycle); + hard |= SPU_readRegister(add + 2, psxRegs.cycle) << 16; return hard; } hard = psxHu32(add);