X-Git-Url: https://notaz.gp2x.de/cgi-bin/gitweb.cgi?a=blobdiff_plain;f=libpcsxcore%2Fpsxmem.c;h=6f85f82f7dbeae377329563a6eeedd01f338384f;hb=630b122be82914a74fac752688abe5d5dd798aa8;hp=7d9f8bf61f3d3978a70cc466315489a01d969c2c;hpb=589bd99ba31de8216624dbf0cbbc016f0663ce3d;p=pcsx_rearmed.git diff --git a/libpcsxcore/psxmem.c b/libpcsxcore/psxmem.c index 7d9f8bf6..6f85f82f 100644 --- a/libpcsxcore/psxmem.c +++ b/libpcsxcore/psxmem.c @@ -54,16 +54,7 @@ void (*psxUnmapHook)(void *ptr, size_t size, enum psxMapTag tag); void *psxMap(unsigned long addr, size_t size, int is_fixed, enum psxMapTag tag) { -#ifdef LIGHTREC -#ifdef MAP_FIXED_NOREPLACE - int flags = MAP_PRIVATE | MAP_ANONYMOUS | MAP_FIXED_NOREPLACE; -#else - int flags = MAP_PRIVATE | MAP_ANONYMOUS | MAP_FIXED; -#endif -#else int flags = MAP_PRIVATE | MAP_ANONYMOUS; -#endif - int try_ = 0; unsigned long mask; void *req, *ret; @@ -156,36 +147,17 @@ int psxMemInit() { memset(psxMemRLUT, 0, 0x10000 * sizeof(void *)); memset(psxMemWLUT, 0, 0x10000 * sizeof(void *)); -#ifdef LIGHTREC - psxM = psxMap(0x30000000, 0x00210000, 1, MAP_TAG_RAM); - if (psxM == NULL) - psxM = psxMap(0x70000000, 0x00210000, 1, MAP_TAG_RAM); - -#else psxM = psxMap(0x80000000, 0x00210000, 1, MAP_TAG_RAM); -#endif -#ifndef RAM_FIXED if (psxM == NULL) psxM = psxMap(0x77000000, 0x00210000, 0, MAP_TAG_RAM); -#endif if (psxM == NULL) { SysMessage(_("mapping main RAM failed")); return -1; } psxP = &psxM[0x200000]; -#ifdef LIGHTREC - psxH = psxMap(0x4f800000, 0x10000, 0, MAP_TAG_OTHER); - if (psxH == NULL) - psxH = psxMap(0x8f800000, 0x10000, 0, MAP_TAG_OTHER); - - psxR = psxMap(0x4fc00000, 0x80000, 0, MAP_TAG_OTHER); - if (psxR == NULL) - psxR = psxMap(0x8fc00000, 0x80000, 0, MAP_TAG_OTHER); -#else psxH = psxMap(0x1f800000, 0x10000, 0, MAP_TAG_OTHER); psxR = psxMap(0x1fc00000, 0x80000, 0, MAP_TAG_OTHER); -#endif if (psxMemRLUT == NULL || psxMemWLUT == NULL || psxR == NULL || psxP == NULL || psxH == NULL) { @@ -351,7 +323,7 @@ void psxMemWrite8(u32 mem, u8 value) { if (Config.Debug) DebugCheckBP((mem & 0xffffff) | 0x80000000, W1); *(u8 *)(p + (mem & 0xffff)) = value; -#ifdef PSXREC +#ifndef DRC_DISABLE psxCpu->Clear((mem & (~3)), 1); #endif } else { @@ -378,7 +350,7 @@ void psxMemWrite16(u32 mem, u16 value) { if (Config.Debug) DebugCheckBP((mem & 0xffffff) | 0x80000000, W2); *(u16 *)(p + (mem & 0xffff)) = SWAPu16(value); -#ifdef PSXREC +#ifndef DRC_DISABLE psxCpu->Clear((mem & (~3)), 1); #endif } else { @@ -391,36 +363,12 @@ void psxMemWrite16(u32 mem, u16 value) { void psxMemWrite32(u32 mem, u32 value) { char *p; -#if defined(ICACHE_EMULATION) - /* Stores in PS1 code during cache isolation invalidate cachelines. - * It is assumed that cache-flush routines write to the lowest 4KB of - * address space for Icache, or 1KB for Dcache/scratchpad. - * Originally, stores had to check 'writeok' in psxRegs struct before - * writing to RAM. To eliminate this necessity, we could simply patch the - * BIOS 0x44 FlushCache() A0 jumptable entry. Unfortunately, this won't - * work for some games that use less-buggy non-BIOS cache-flush routines - * like '007 Tomorrow Never Dies', often provided by SN-systems, the PS1 - * toolchain provider. - * Instead, we backup the lowest 64KB PS1 RAM when the cache is isolated. - * All stores write to RAM regardless of cache state. Thus, cache-flush - * routines temporarily trash the lowest 4KB of PS1 RAM. Fortunately, they - * ran in a 'critical section' with interrupts disabled, so there's little - * worry of PS1 code ever reading the trashed contents. - * We point the relevant portions of psxMemRLUT[] to the 64KB backup while - * cache is isolated. This is in case the dynarec needs to recompile some - * code during isolation. As long as it reads code using psxMemRLUT[] ptrs, - * it should never see trashed RAM contents. - * - * -senquack, mips dynarec team, 2017 - */ - static u32 mem_bak[0x10000/4]; -#endif u32 t; - u32 m = mem & 0xffff; + // if ((mem&0x1fffff) == 0x71E18 || value == 0x48088800) SysPrintf("t2fix!!\n"); t = mem >> 16; if (t == 0x1f80 || t == 0x9f80 || t == 0xbf80) { - if (m < 0x400) + if ((mem & 0xffff) < 0x400) psxHu32ref(mem) = SWAPu32(value); else psxHwWrite32(mem, value); @@ -430,12 +378,12 @@ void psxMemWrite32(u32 mem, u32 value) { if (Config.Debug) DebugCheckBP((mem & 0xffffff) | 0x80000000, W4); *(u32 *)(p + (mem & 0xffff)) = SWAPu32(value); -#ifdef PSXREC +#ifndef DRC_DISABLE psxCpu->Clear(mem, 1); #endif } else { if (mem != 0xfffe0130) { -#ifdef PSXREC +#ifndef DRC_DISABLE if (!writeok) psxCpu->Clear(mem, 1); #endif @@ -448,39 +396,22 @@ void psxMemWrite32(u32 mem, u32 value) { switch (value) { case 0x800: case 0x804: - if (writeok == FALSE) break; - writeok = FALSE; + if (writeok == 0) break; + writeok = 0; memset(psxMemWLUT + 0x0000, 0, 0x80 * sizeof(void *)); memset(psxMemWLUT + 0x8000, 0, 0x80 * sizeof(void *)); memset(psxMemWLUT + 0xa000, 0, 0x80 * sizeof(void *)); -#ifdef ICACHE_EMULATION - /* Cache is now isolated, pending cache-flush sequence: - * Backup lower 64KB of PS1 RAM, adjust psxMemRLUT[]. - */ - memcpy((void*)mem_bak, (void*)psxM, sizeof(mem_bak)); - psxMemRLUT[0x0000] = psxMemRLUT[0x0020] = psxMemRLUT[0x0040] = psxMemRLUT[0x0060] = (u8 *)mem_bak; - psxMemRLUT[0x8000] = psxMemRLUT[0x8020] = psxMemRLUT[0x8040] = psxMemRLUT[0x8060] = (u8 *)mem_bak; - psxMemRLUT[0xa000] = psxMemRLUT[0xa020] = psxMemRLUT[0xa040] = psxMemRLUT[0xa060] = (u8 *)mem_bak; + /* Required for icache interpreter otherwise Armored Core won't boot on icache interpreter */ psxCpu->Notify(R3000ACPU_NOTIFY_CACHE_ISOLATED, NULL); -#endif break; case 0x00: case 0x1e988: - if (writeok == TRUE) break; - writeok = TRUE; + if (writeok == 1) break; + writeok = 1; for (i = 0; i < 0x80; i++) psxMemWLUT[i + 0x0000] = (void *)&psxM[(i & 0x1f) << 16]; memcpy(psxMemWLUT + 0x8000, psxMemWLUT, 0x80 * sizeof(void *)); memcpy(psxMemWLUT + 0xa000, psxMemWLUT, 0x80 * sizeof(void *)); -#ifdef ICACHE_EMULATION - /* Cache is now unisolated: - * Restore lower 64KB RAM contents and psxMemRLUT[]. - */ - memcpy((void*)psxM, (void*)mem_bak, sizeof(mem_bak)); - psxMemRLUT[0x0000] = psxMemRLUT[0x0020] = psxMemRLUT[0x0040] = psxMemRLUT[0x0060] = (u8 *)psxM; - psxMemRLUT[0x8000] = psxMemRLUT[0x8020] = psxMemRLUT[0x8040] = psxMemRLUT[0x8060] = (u8 *)psxM; - psxMemRLUT[0xa000] = psxMemRLUT[0xa020] = psxMemRLUT[0xa040] = psxMemRLUT[0xa060] = (u8 *)psxM; /* Dynarecs might take this opportunity to flush their code cache */ psxCpu->Notify(R3000ACPU_NOTIFY_CACHE_UNISOLATED, NULL); -#endif break; default: #ifdef PSXMEM_LOG