X-Git-Url: https://notaz.gp2x.de/cgi-bin/gitweb.cgi?a=blobdiff_plain;f=libpcsxcore%2Fr3000a.c;h=0be8a53c4f068a1a57659983931e3a125e8dfe7e;hb=0b1da49108ea0344f762d78c03c2d6eff2b21069;hp=dffbf6e74aec59677f61e8add220406ddec64b90;hpb=3d1c03e76934037a5abab13f250bf5f27629d356;p=pcsx_rearmed.git

diff --git a/libpcsxcore/r3000a.c b/libpcsxcore/r3000a.c
index dffbf6e7..0be8a53c 100644
--- a/libpcsxcore/r3000a.c
+++ b/libpcsxcore/r3000a.c
@@ -61,8 +61,10 @@ void psxReset() {
 
 	psxRegs.CP0.n.SR   = 0x10600000; // COP0 enabled | BEV = 1 | TS = 1
 	psxRegs.CP0.n.PRid = 0x00000002; // PRevID = Revision ID, same as R3000A
-	if (Config.HLE)
-		psxRegs.CP0.n.SR |= 1u << 30; // COP2 enabled
+	if (Config.HLE) {
+		psxRegs.CP0.n.SR |= 1u << 30;    // COP2 enabled
+		psxRegs.CP0.n.SR &= ~(1u << 22); // RAM exception vector
+	}
 
 	psxCpu->ApplyConfig();
 	psxCpu->Reset();
@@ -107,7 +109,7 @@ void psxException(u32 cause, enum R3000Abdt bdt, psxCP0Regs *cp0) {
 	}
 
 	// Set the Cause
-	cp0->n.Cause = (bdt << 30) | (cp0->n.Cause & 0x300) | cause;
+	cp0->n.Cause = (bdt << 30) | (cp0->n.Cause & 0x700) | cause;
 
 	// Set the EPC & PC
 	cp0->n.EPC = bdt ? psxRegs.pc - 4 : psxRegs.pc;
@@ -119,8 +121,6 @@ void psxException(u32 cause, enum R3000Abdt bdt, psxCP0Regs *cp0) {
 
 	// Set the SR
 	cp0->n.SR = (cp0->n.SR & ~0x3f) | ((cp0->n.SR & 0x0f) << 2);
-
-	if (Config.HLE) psxBiosException();
 }
 
 void psxBranchTest() {
@@ -196,15 +196,11 @@ void psxBranchTest() {
 		}
 	}
 
-	if (psxHu32(0x1070) & psxHu32(0x1074)) {
-		if ((psxRegs.CP0.n.SR & 0x401) == 0x401) {
-#ifdef PSXCPU_LOG
-			PSXCPU_LOG("Interrupt: %x %x\n", psxHu32(0x1070), psxHu32(0x1074));
-#endif
-//			SysPrintf("Interrupt (%x): %x %x\n", psxRegs.cycle, psxHu32(0x1070), psxHu32(0x1074));
-			psxException(0x400, 0, &psxRegs.CP0);
-		}
-	}
+	psxRegs.CP0.n.Cause &= ~0x400;
+	if (psxHu32(0x1070) & psxHu32(0x1074))
+		psxRegs.CP0.n.Cause |= 0x400;
+	if (((psxRegs.CP0.n.Cause | 1) & psxRegs.CP0.n.SR & 0x401) == 0x401)
+		psxException(0, 0, &psxRegs.CP0);
 }
 
 void psxJumpTest() {