X-Git-Url: https://notaz.gp2x.de/cgi-bin/gitweb.cgi?a=blobdiff_plain;f=libpcsxcore%2Fr3000a.c;h=7e6f16b48182caf55a75ca95261b6e9f59983e96;hb=c979e8c288de90834ceecfd7a37543a44cdd9402;hp=cccfa602994a9829d08f4979fce286db9d337885;hpb=62656449abd4cc364e2a87608efb12a97ce26a3d;p=pcsx_rearmed.git

diff --git a/libpcsxcore/r3000a.c b/libpcsxcore/r3000a.c
index cccfa602..7e6f16b4 100644
--- a/libpcsxcore/r3000a.c
+++ b/libpcsxcore/r3000a.c
@@ -25,18 +25,22 @@
 #include "cdrom.h"
 #include "mdec.h"
 #include "gte.h"
+#include "psxinterpreter.h"
 
 R3000Acpu *psxCpu = NULL;
+#ifdef DRC_DISABLE
 psxRegisters psxRegs;
+#endif
 
 int psxInit() {
 	SysPrintf(_("Running PCSX Version %s (%s).\n"), PACKAGE_VERSION, __DATE__);
 
-#ifdef PSXREC
+#ifndef DRC_DISABLE
 	if (Config.Cpu == CPU_INTERPRETER) {
 		psxCpu = &psxInt;
 	} else psxCpu = &psxRec;
 #else
+	Config.Cpu = CPU_INTERPRETER;
 	psxCpu = &psxInt;
 #endif
 
@@ -79,7 +83,9 @@ void psxShutdown() {
 }
 
 void psxException(u32 code, u32 bd) {
-	if (!Config.HLE && ((((psxRegs.code = PSXMu32(psxRegs.pc)) >> 24) & 0xfe) == 0x4a)) {
+	psxRegs.code = fetch(psxRegs.pc);
+	
+	if (!Config.HLE && ((((psxRegs.code) >> 24) & 0xfe) == 0x4a)) {
 		// "hokuto no ken" / "Crash Bandicot 2" ...
 		// BIOS does not allow to return to GTE instructions
 		// (just skips it, supposedly because it's scheduled already)
@@ -89,14 +95,13 @@ void psxException(u32 code, u32 bd) {
 	}
 
 	// Set the Cause
-	psxRegs.CP0.n.Cause = code;
+	psxRegs.CP0.n.Cause = (psxRegs.CP0.n.Cause & 0x300) | code;
 
 	// Set the EPC & PC
 	if (bd) {
 #ifdef PSXCPU_LOG
 		PSXCPU_LOG("bd set!!!\n");
 #endif
-		SysPrintf("bd set!!!\n");
 		psxRegs.CP0.n.Cause |= 0x80000000;
 		psxRegs.CP0.n.EPC = (psxRegs.pc - 4);
 	} else
@@ -185,6 +190,12 @@ void psxBranchTest() {
 				cdrLidSeekInterrupt();
 			}
 		}
+		if (psxRegs.interrupt & (1 << PSXINT_SPU_UPDATE)) { // scheduled spu update
+			if ((psxRegs.cycle - psxRegs.intCycle[PSXINT_SPU_UPDATE].sCycle) >= psxRegs.intCycle[PSXINT_SPU_UPDATE].cycle) {
+				psxRegs.interrupt &= ~(1 << PSXINT_SPU_UPDATE);
+				spuUpdate();
+			}
+		}
 	}
 
 	if (psxHu32(0x1070) & psxHu32(0x1074)) {