X-Git-Url: https://notaz.gp2x.de/cgi-bin/gitweb.cgi?a=blobdiff_plain;f=libpcsxcore%2Fr3000a.h;h=2339d5957efe85632895b4538df04f4f4638d3e9;hb=d5aeda23720ba9374312f8d387f299024fedb7e6;hp=d436af786cb15d3b4e7d356a1dee1d7810e8471c;hpb=52082bc1e755206eb1c9865153fdc733cbc12941;p=pcsx_rearmed.git diff --git a/libpcsxcore/r3000a.h b/libpcsxcore/r3000a.h index d436af78..2339d595 100644 --- a/libpcsxcore/r3000a.h +++ b/libpcsxcore/r3000a.h @@ -29,24 +29,29 @@ extern "C" { #include "psxcounters.h" #include "psxbios.h" +enum { + R3000ACPU_NOTIFY_CACHE_ISOLATED = 0, + R3000ACPU_NOTIFY_CACHE_UNISOLATED = 1, + R3000ACPU_NOTIFY_DMA3_EXE_LOAD = 2 +}; + typedef struct { int (*Init)(); void (*Reset)(); void (*Execute)(); /* executes up to a break */ void (*ExecuteBlock)(); /* executes up to a jump */ void (*Clear)(u32 Addr, u32 Size); + void (*Notify)(int note, void *data); + void (*ApplyConfig)(); void (*Shutdown)(); } R3000Acpu; extern R3000Acpu *psxCpu; extern R3000Acpu psxInt; -#if (defined(__x86_64__) || defined(__i386__) || defined(__sh__) || defined(__ppc__) || defined(__arm__)) && !defined(NOPSXREC) extern R3000Acpu psxRec; -#define PSXREC -#endif typedef union { -#if defined(__BIGENDIAN__) +#if __BYTE_ORDER__ == __ORDER_BIG_ENDIAN__ struct { u8 h3, h2, h, l; } b; struct { s8 h3, h2, h, l; } sb; struct { u16 h, l; } w; @@ -152,20 +157,44 @@ enum { PSXINT_GPUDMA, PSXINT_MDECOUTDMA, PSXINT_SPUDMA, + PSXINT_GPUBUSY, + PSXINT_MDECINDMA, + PSXINT_GPUOTCDMA, + PSXINT_CDRDMA, PSXINT_NEWDRC_CHECK, + PSXINT_RCNT, + PSXINT_CDRLID, + PSXINT_CDRPLAY_OLD, /* unused */ + PSXINT_SPU_UPDATE, PSXINT_COUNT }; +typedef struct psxCP2Regs { + psxCP2Data CP2D; /* Cop2 data registers */ + psxCP2Ctrl CP2C; /* Cop2 control registers */ +} psxCP2Regs; + typedef struct { psxGPRRegs GPR; /* General Purpose Registers */ psxCP0Regs CP0; /* Coprocessor0 Registers */ - psxCP2Data CP2D; /* Cop2 data registers */ - psxCP2Ctrl CP2C; /* Cop2 control registers */ + union { + struct { + psxCP2Data CP2D; /* Cop2 data registers */ + psxCP2Ctrl CP2C; /* Cop2 control registers */ + }; + psxCP2Regs CP2; + }; u32 pc; /* Program counter */ u32 code; /* The instruction */ u32 cycle; u32 interrupt; struct { u32 sCycle, cycle; } intCycle[32]; + u32 gteBusyCycle; + u32 muldivBusyCycle; + u32 subCycle; /* interpreter cycle counting */ + u32 subCycleStep; + // warning: changing anything in psxRegisters requires update of all + // asm in libpcsxcore/new_dynarec/ } psxRegisters; extern psxRegisters psxRegs; @@ -174,89 +203,22 @@ extern psxRegisters psxRegs; extern u32 event_cycles[PSXINT_COUNT]; extern u32 next_interupt; -void new_dyna_save(void); -void new_dyna_restore(void); +void new_dyna_before_save(void); +void new_dyna_after_save(void); +void new_dyna_freeze(void *f, int mode); -#define new_dyna_set_event(e, c) { \ - s32 c_ = c; \ - u32 abs_ = psxRegs.cycle + c_; \ - s32 odi_ = next_interupt - psxRegs.cycle; \ +#define new_dyna_set_event_abs(e, abs) { \ + u32 abs_ = abs; \ + s32 di_ = next_interupt - abs_; \ event_cycles[e] = abs_; \ - if (c_ < odi_) { \ - /*printf("%u: next_interupt %d -> %d (%u)\n", psxRegs.cycle, odi_, c_, abs_);*/ \ + if (di_ > 0) { \ + /*printf("%u: next_interupt %u -> %u\n", psxRegs.cycle, next_interupt, abs_);*/ \ next_interupt = abs_; \ } \ } -#if defined(__BIGENDIAN__) - -#define _i32(x) *(s32 *)&x -#define _u32(x) x - -#define _i16(x) (((short *)&x)[1]) -#define _u16(x) (((unsigned short *)&x)[1]) - -#define _i8(x) (((char *)&x)[3]) -#define _u8(x) (((unsigned char *)&x)[3]) - -#else - -#define _i32(x) *(s32 *)&x -#define _u32(x) x - -#define _i16(x) *(short *)&x -#define _u16(x) *(unsigned short *)&x - -#define _i8(x) *(char *)&x -#define _u8(x) *(unsigned char *)&x - -#endif - -/**** R3000A Instruction Macros ****/ -#define _PC_ psxRegs.pc // The next PC to be executed - -#define _fOp_(code) ((code >> 26) ) // The opcode part of the instruction register -#define _fFunct_(code) ((code ) & 0x3F) // The funct part of the instruction register -#define _fRd_(code) ((code >> 11) & 0x1F) // The rd part of the instruction register -#define _fRt_(code) ((code >> 16) & 0x1F) // The rt part of the instruction register -#define _fRs_(code) ((code >> 21) & 0x1F) // The rs part of the instruction register -#define _fSa_(code) ((code >> 6) & 0x1F) // The sa part of the instruction register -#define _fIm_(code) ((u16)code) // The immediate part of the instruction register -#define _fTarget_(code) (code & 0x03ffffff) // The target part of the instruction register - -#define _fImm_(code) ((s16)code) // sign-extended immediate -#define _fImmU_(code) (code&0xffff) // zero-extended immediate - -#define _Op_ _fOp_(psxRegs.code) -#define _Funct_ _fFunct_(psxRegs.code) -#define _Rd_ _fRd_(psxRegs.code) -#define _Rt_ _fRt_(psxRegs.code) -#define _Rs_ _fRs_(psxRegs.code) -#define _Sa_ _fSa_(psxRegs.code) -#define _Im_ _fIm_(psxRegs.code) -#define _Target_ _fTarget_(psxRegs.code) - -#define _Imm_ _fImm_(psxRegs.code) -#define _ImmU_ _fImmU_(psxRegs.code) - -#define _rRs_ psxRegs.GPR.r[_Rs_] // Rs register -#define _rRt_ psxRegs.GPR.r[_Rt_] // Rt register -#define _rRd_ psxRegs.GPR.r[_Rd_] // Rd register -#define _rSa_ psxRegs.GPR.r[_Sa_] // Sa register -#define _rFs_ psxRegs.CP0.r[_Rd_] // Fs register - -#define _c2dRs_ psxRegs.CP2D.r[_Rs_] // Rs cop2 data register -#define _c2dRt_ psxRegs.CP2D.r[_Rt_] // Rt cop2 data register -#define _c2dRd_ psxRegs.CP2D.r[_Rd_] // Rd cop2 data register -#define _c2dSa_ psxRegs.CP2D.r[_Sa_] // Sa cop2 data register - -#define _rHi_ psxRegs.GPR.n.hi // The HI register -#define _rLo_ psxRegs.GPR.n.lo // The LO register - -#define _JumpTarget_ ((_Target_ * 4) + (_PC_ & 0xf0000000)) // Calculates the target during a jump instruction -#define _BranchTarget_ ((s16)_Im_ * 4 + _PC_) // Calculates the target during a branch instruction - -#define _SetLink(x) psxRegs.GPR.r[x] = _PC_ + 4; // Sets the return address in the link register +#define new_dyna_set_event(e, c) \ + new_dyna_set_event_abs(e, psxRegs.cycle + (c)) int psxInit(); void psxReset(); @@ -264,9 +226,6 @@ void psxShutdown(); void psxException(u32 code, u32 bd); void psxBranchTest(); void psxExecuteBios(); -int psxTestLoadDelay(int reg, u32 tmp); -void psxDelayTest(int reg, u32 bpc); -void psxTestSWInts(); void psxJumpTest(); #ifdef __cplusplus