X-Git-Url: https://notaz.gp2x.de/cgi-bin/gitweb.cgi?a=blobdiff_plain;f=libpcsxcore%2Fr3000a.h;h=778bd8d9f48eff4594fa2c3cdd1a393a114b4a90;hb=f9ae4f29a408556f4b1d0f843995b389e66608c5;hp=a052a59a3e014d740cdb82524e7bde5552d19e32;hpb=d75460620efa21df695967c72a92265dac04001f;p=pcsx_rearmed.git

diff --git a/libpcsxcore/r3000a.h b/libpcsxcore/r3000a.h
index a052a59a..778bd8d9 100644
--- a/libpcsxcore/r3000a.h
+++ b/libpcsxcore/r3000a.h
@@ -29,18 +29,38 @@ extern "C" {
 #include "psxcounters.h"
 #include "psxbios.h"
 
-enum {
+enum R3000Aexception {
+	R3000E_Int = 0,      // Interrupt
+	R3000E_AdEL = 4,     // Address error (on load/I-fetch)
+	R3000E_AdES = 5,     // Address error (on store)
+	R3000E_IBE = 6,      // Bus error (instruction fetch)
+	R3000E_DBE = 7,      // Bus error (data load)
+	R3000E_Syscall = 8,  // syscall instruction
+	R3000E_Bp = 9,       // Breakpoint - a break instruction
+	R3000E_RI = 10,      // reserved instruction
+	R3000E_CpU = 11,     // Co-Processor unusable
+	R3000E_Ov = 12       // arithmetic overflow
+};
+
+enum R3000Anote {
 	R3000ACPU_NOTIFY_CACHE_ISOLATED = 0,
 	R3000ACPU_NOTIFY_CACHE_UNISOLATED = 1,
+	R3000ACPU_NOTIFY_BEFORE_SAVE,
+	R3000ACPU_NOTIFY_AFTER_LOAD,
+};
+
+enum blockExecCaller {
+	EXEC_CALLER_BOOT,
+	EXEC_CALLER_HLE,
 };
 
 typedef struct {
 	int  (*Init)();
 	void (*Reset)();
-	void (*Execute)();		/* executes up to a break */
-	void (*ExecuteBlock)();	/* executes up to a jump */
+	void (*Execute)();
+	void (*ExecuteBlock)(enum blockExecCaller caller); /* executes up to a jump */
 	void (*Clear)(u32 Addr, u32 Size);
-	void (*Notify)(int note, void *data);
+	void (*Notify)(enum R3000Anote note, void *data);
 	void (*ApplyConfig)();
 	void (*Shutdown)();
 } R3000Acpu;
@@ -74,7 +94,7 @@ typedef union {
 	PAIR p[34];
 } psxGPRRegs;
 
-typedef union {
+typedef union psxCP0Regs_ {
 	struct {
 		u32	Index,     Random,    EntryLo0,  EntryLo1,
 						Context,   PageMask,  Wired,     Reserved0,
@@ -174,6 +194,8 @@ typedef struct psxCP2Regs {
 } psxCP2Regs;
 
 typedef struct {
+	// note: some cores like lightrec don't keep their data here,
+	// so use R3000ACPU_NOTIFY_BEFORE_SAVE to sync
 	psxGPRRegs GPR;		/* General Purpose Registers */
 	psxCP0Regs CP0;		/* Coprocessor0 Registers */
 	union {
@@ -183,8 +205,8 @@ typedef struct {
 		};
 		psxCP2Regs CP2;
 	};
-    u32 pc;				/* Program counter */
-    u32 code;			/* The instruction */
+	u32 pc;				/* Program counter */
+	u32 code;			/* The instruction */
 	u32 cycle;
 	u32 interrupt;
 	struct { u32 sCycle, cycle; } intCycle[32];
@@ -192,6 +214,11 @@ typedef struct {
 	u32 muldivBusyCycle;
 	u32 subCycle;		/* interpreter cycle counting */
 	u32 subCycleStep;
+	u32 biuReg;
+	u8  reserved;
+	u8  dloadSel;
+	u8  dloadReg[2];
+	u32 dloadVal[2];
 	// warning: changing anything in psxRegisters requires update of all
 	// asm in libpcsxcore/new_dynarec/
 } psxRegisters;
@@ -202,8 +229,6 @@ extern psxRegisters psxRegs;
 extern u32 event_cycles[PSXINT_COUNT];
 extern u32 next_interupt;
 
-void new_dyna_before_save(void);
-void new_dyna_after_save(void);
 void new_dyna_freeze(void *f, int mode);
 
 #define new_dyna_set_event_abs(e, abs) { \
@@ -222,7 +247,7 @@ void new_dyna_freeze(void *f, int mode);
 int  psxInit();
 void psxReset();
 void psxShutdown();
-void psxException(u32 code, u32 bd);
+void psxException(u32 code, u32 bd, psxCP0Regs *cp0);
 void psxBranchTest();
 void psxExecuteBios();
 void psxJumpTest();