X-Git-Url: https://notaz.gp2x.de/cgi-bin/gitweb.cgi?a=blobdiff_plain;f=pico%2F32x%2F32x.c;h=1c166cee24249e13d2782242e66f7fe7c4746aba;hb=24aab4da7352b5cecad4e09b0dcc0807b14786f2;hp=e95fccdde27d707f58e8875b31ce5ae6a647bc98;hpb=fa8fb7544593a0ed43f3354cc5f41150464b55bf;p=picodrive.git diff --git a/pico/32x/32x.c b/pico/32x/32x.c index e95fccd..1c166ce 100644 --- a/pico/32x/32x.c +++ b/pico/32x/32x.c @@ -134,28 +134,31 @@ void p32x_reset_sh2s(void) // if we don't have BIOS set, perform it's work here. // MSH2 if (p32x_bios_m == NULL) { - unsigned int idl_src, idl_dst, idl_size; // initial data load - unsigned int vbr; + sh2_set_gbr(0, 0x20004000); - // initial data - idl_src = HWSWAP(*(unsigned int *)(Pico.rom + 0x3d4)) & ~0xf0000000; - idl_dst = HWSWAP(*(unsigned int *)(Pico.rom + 0x3d8)) & ~0xf0000000; - idl_size= HWSWAP(*(unsigned int *)(Pico.rom + 0x3dc)); - if (idl_size > Pico.romsize || idl_src + idl_size > Pico.romsize || - idl_size > 0x40000 || idl_dst + idl_size > 0x40000 || (idl_src & 3) || (idl_dst & 3)) { - elprintf(EL_STATUS|EL_ANOMALY, "32x: invalid initial data ptrs: %06x -> %06x, %06x", - idl_src, idl_dst, idl_size); - } - else - memcpy(Pico32xMem->sdram + idl_dst, Pico.rom + idl_src, idl_size); + if (!(PicoAHW & PAHW_MCD)) { + unsigned int idl_src, idl_dst, idl_size; // initial data load + unsigned int vbr; + + // initial data + idl_src = HWSWAP(*(unsigned int *)(Pico.rom + 0x3d4)) & ~0xf0000000; + idl_dst = HWSWAP(*(unsigned int *)(Pico.rom + 0x3d8)) & ~0xf0000000; + idl_size= HWSWAP(*(unsigned int *)(Pico.rom + 0x3dc)); + if (idl_size > Pico.romsize || idl_src + idl_size > Pico.romsize || + idl_size > 0x40000 || idl_dst + idl_size > 0x40000 || (idl_src & 3) || (idl_dst & 3)) { + elprintf(EL_STATUS|EL_ANOMALY, "32x: invalid initial data ptrs: %06x -> %06x, %06x", + idl_src, idl_dst, idl_size); + } + else + memcpy(Pico32xMem->sdram + idl_dst, Pico.rom + idl_src, idl_size); - // GBR/VBR - vbr = HWSWAP(*(unsigned int *)(Pico.rom + 0x3e8)); - sh2_set_gbr(0, 0x20004000); - sh2_set_vbr(0, vbr); + // VBR + vbr = HWSWAP(*(unsigned int *)(Pico.rom + 0x3e8)); + sh2_set_vbr(0, vbr); - // checksum and M_OK - Pico32x.regs[0x28 / 2] = *(unsigned short *)(Pico.rom + 0x18e); + // checksum and M_OK + Pico32x.regs[0x28 / 2] = *(unsigned short *)(Pico.rom + 0x18e); + } // program will set M_OK } @@ -203,7 +206,6 @@ void PicoUnload32x(void) void PicoReset32x(void) { if (PicoAHW & PAHW_32X) { - msh2.m68krcycles_done = ssh2.m68krcycles_done = SekCyclesDone(); p32x_trigger_irq(NULL, SekCyclesDone(), P32XI_VRES); p32x_sh2_poll_event(&msh2, SH2_IDLE_STATES, 0); p32x_sh2_poll_event(&ssh2, SH2_IDLE_STATES, 0); @@ -228,7 +230,7 @@ static void p32x_start_blank(void) // XXX: no proper handling of 32col mode.. if ((Pico32x.vdp_regs[0] & P32XV_Mx) != 0 && // 32x not blanking (Pico.video.reg[12] & 1) && // 40col mode - (PicoDrawMask & PDRAW_32X_ON)) + (!(Pico.video.debug_p & PVD_KILL_32X))) { int md_bg = Pico.video.reg[7] & 0x3f; @@ -295,9 +297,9 @@ typedef void (event_cb)(unsigned int now); unsigned int p32x_event_times[P32X_EVENT_COUNT]; static unsigned int event_time_next; static event_cb *p32x_event_cbs[P32X_EVENT_COUNT] = { - [P32X_EVENT_PWM] = p32x_pwm_irq_event, - [P32X_EVENT_FILLEND] = fillend_event, - [P32X_EVENT_HINT] = hint_event, + p32x_pwm_irq_event, // P32X_EVENT_PWM + fillend_event, // P32X_EVENT_FILLEND + hint_event, // P32X_EVENT_HINT }; // schedule event at some time 'after', in m68k clocks @@ -364,7 +366,7 @@ static void p32x_run_events(unsigned int until) oldest, event_time_next); } -static inline void run_sh2(SH2 *sh2, int m68k_cycles) +static void run_sh2(SH2 *sh2, int m68k_cycles) { int cycles, done; @@ -548,6 +550,9 @@ void PicoFrame32x(void) p32x_sh2_poll_event(&msh2, SH2_STATE_VPOLL, 0); p32x_sh2_poll_event(&ssh2, SH2_STATE_VPOLL, 0); + if (PicoAHW & PAHW_MCD) + pcd_prepare_frame(); + PicoFrameStart(); PicoFrameHints(); sh2_drc_frame();