X-Git-Url: https://notaz.gp2x.de/cgi-bin/gitweb.cgi?a=blobdiff_plain;f=pico%2F32x%2F32x.c;h=20a942ad8e486b6ad15e91a981e657ce8de72e0e;hb=b78efee2b2213cf62a1b8a3b7a5adf05e39b4e4e;hp=dc881a964f4a84a9350e0675b74f946045168b00;hpb=be2c420828ab3c36ef652584fbdef0e0597c7028;p=picodrive.git

diff --git a/pico/32x/32x.c b/pico/32x/32x.c
index dc881a96..20a942ad 100644
--- a/pico/32x/32x.c
+++ b/pico/32x/32x.c
@@ -1,7 +1,37 @@
 #include "../pico_int.h"
+#include "../sound/ym2612.h"
 
 struct Pico32x Pico32x;
 
+static void sh2_irq_cb(int id, int level)
+{
+  // diagnostic for now
+  elprintf(EL_32X, "%csh2 ack %d @ %08x", id ? 's' : 'm', level, sh2_pc(id));
+}
+
+void p32x_update_irls(void)
+{
+  int irqs, mlvl = 0, slvl = 0;
+
+  // msh2
+  irqs = (Pico32x.sh2irqs | Pico32x.sh2irqi[0]) & ((Pico32x.sh2irq_mask[0] << 3) | P32XI_VRES);
+  while ((irqs >>= 1))
+    mlvl++;
+  mlvl *= 2;
+
+  // ssh2
+  irqs = (Pico32x.sh2irqs | Pico32x.sh2irqi[1]) & ((Pico32x.sh2irq_mask[1] << 3) | P32XI_VRES);
+  while ((irqs >>= 1))
+    slvl++;
+  slvl *= 2;
+
+  elprintf(EL_32X, "update_irls: m %d, s %d", mlvl, slvl);
+  sh2_irl_irq(&msh2, mlvl);
+  if (mlvl)
+    p32x_poll_event(0);
+  sh2_irl_irq(&ssh2, slvl);
+}
+
 void Pico32xStartup(void)
 {
   elprintf(EL_STATUS|EL_32X, "32X startup");
@@ -9,23 +39,108 @@ void Pico32xStartup(void)
   PicoAHW |= PAHW_32X;
   PicoMemSetup32x();
 
-  // probably should only done on power
-//  memset(&Pico32x, 0, sizeof(Pico32x));
+  sh2_init(&msh2, 0);
+  msh2.irq_callback = sh2_irq_cb;
+  sh2_reset(&msh2);
+
+  sh2_init(&ssh2, 1);
+  ssh2.irq_callback = sh2_irq_cb;
+  sh2_reset(&ssh2);
 
   if (!Pico.m.pal)
-    Pico32x.vdp_regs[0] |= 0x8000;
+    Pico32x.vdp_regs[0] |= P32XV_nPAL;
 
-  // prefill checksum
-  Pico32x.regs[0x28/2] = *(unsigned short *)(Pico.rom + 0x18e);
+  emu_32x_startup();
 }
 
 void Pico32xInit(void)
 {
-  // XXX: mv
-  Pico32x.regs[0] = 0x0082;
+}
+
+void PicoPower32x(void)
+{
+  memset(&Pico32x, 0, sizeof(Pico32x));
+
+  Pico32x.regs[0] = 0x0082; // SH2 reset?
+  Pico32x.vdp_regs[0x0a/2] = P32XV_VBLK|P32XV_HBLK|P32XV_PEN;
+}
+
+void PicoUnload32x(void)
+{
+  if (Pico32xMem != NULL)
+    free(Pico32xMem);
+  Pico32xMem = NULL;
+
+  PicoAHW &= ~PAHW_32X;
 }
 
 void PicoReset32x(void)
 {
+  extern int p32x_csum_faked;
+  p32x_csum_faked = 0; // tmp
+}
+
+static void p32x_start_blank(void)
+{
+  // enter vblank
+  Pico32x.vdp_regs[0x0a/2] |= P32XV_VBLK|P32XV_PEN;
+
+  // FB swap waits until vblank
+  if ((Pico32x.vdp_regs[0x0a/2] ^ Pico32x.pending_fb) & P32XV_FS) {
+    Pico32x.vdp_regs[0x0a/2] &= ~P32XV_FS;
+    Pico32x.vdp_regs[0x0a/2] |= Pico32x.pending_fb;
+    Pico32xSwapDRAM(Pico32x.pending_fb ^ 1);
+  }
+
+  p32x_poll_event(1);
+}
+
+// FIXME..
+static __inline void SekRunM68k(int cyc)
+{
+  int cyc_do;
+  SekCycleAim += cyc;
+  if (Pico32x.emu_flags & P32XF_68KPOLL) {
+    SekCycleCnt = SekCycleAim;
+    return;
+  }
+  if ((cyc_do = SekCycleAim - SekCycleCnt) <= 0)
+    return;
+#if defined(EMU_CORE_DEBUG)
+  // this means we do run-compare
+  SekCycleCnt+=CM_compareRun(cyc_do, 0);
+#elif defined(EMU_C68K)
+  PicoCpuCM68k.cycles=cyc_do;
+  CycloneRun(&PicoCpuCM68k);
+  SekCycleCnt+=cyc_do-PicoCpuCM68k.cycles;
+#elif defined(EMU_M68K)
+  SekCycleCnt+=m68k_execute(cyc_do);
+#elif defined(EMU_F68K)
+  SekCycleCnt+=fm68k_emulate(cyc_do+1, 0, 0);
+#endif
 }
 
+// ~1463.8, but due to cache misses and slow mem
+// it's much lower than that
+#define SH2_LINE_CYCLES 700
+
+#define PICO_32X
+#define RUN_SH2S \
+  if (!(Pico32x.emu_flags & (P32XF_MSH2POLL|P32XF_MSH2VPOLL))) \
+    sh2_execute(&msh2, SH2_LINE_CYCLES); \
+  if (!(Pico32x.emu_flags & (P32XF_SSH2POLL|P32XF_SSH2VPOLL))) \
+    sh2_execute(&ssh2, SH2_LINE_CYCLES);
+
+#include "../pico_cmn.c"
+
+void PicoFrame32x(void)
+{
+  Pico32x.vdp_regs[0x0a/2] &= ~P32XV_VBLK; // get out of vblank
+  if ((Pico32x.vdp_regs[0] & 3 ) != 0) // no forced blanking
+    Pico32x.vdp_regs[0x0a/2] &= ~P32XV_PEN; // no pal access
+
+  p32x_poll_event(1);
+
+  PicoFrameStart();
+  PicoFrameHints();
+}