X-Git-Url: https://notaz.gp2x.de/cgi-bin/gitweb.cgi?a=blobdiff_plain;f=pico%2F32x%2F32x.c;h=f461187671e513a3a29e04702a589ae998361f50;hb=f8675e282e7aa72bc6ab0edbb1dada4395d1c44c;hp=5581b0940bf33bf70d152627310add6998cd14f6;hpb=ed4402a7dfd12dbbf34c547b438a671ae8114197;p=picodrive.git

diff --git a/pico/32x/32x.c b/pico/32x/32x.c
index 5581b09..f461187 100644
--- a/pico/32x/32x.c
+++ b/pico/32x/32x.c
@@ -1,34 +1,42 @@
 /*
  * PicoDrive
- * (C) notaz, 2009,2010
+ * (C) notaz, 2009,2010,2013
  *
  * This work is licensed under the terms of MAME license.
  * See COPYING file in the top-level directory.
  */
 #include "../pico_int.h"
 #include "../sound/ym2612.h"
+#include "../../cpu/sh2/compiler.h"
 
 struct Pico32x Pico32x;
 SH2 sh2s[2];
 
+#define SH2_IDLE_STATES (SH2_STATE_CPOLL|SH2_STATE_VPOLL|SH2_STATE_SLEEP)
+
 static int REGPARM(2) sh2_irq_cb(SH2 *sh2, int level)
 {
   if (sh2->pending_irl > sh2->pending_int_irq) {
-    elprintf(EL_32X, "%csh2 ack/irl %d @ %08x",
-      sh2->is_slave ? 's' : 'm', level, sh2->pc);
+    elprintf_sh2(sh2, EL_32X, "ack/irl %d @ %08x",
+      level, sh2_pc(sh2));
     return 64 + sh2->pending_irl / 2;
   } else {
-    elprintf(EL_32X, "%csh2 ack/int %d/%d @ %08x",
-      sh2->is_slave ? 's' : 'm', level, sh2->pending_int_vector, sh2->pc);
+    elprintf_sh2(sh2, EL_32X, "ack/int %d/%d @ %08x",
+      level, sh2->pending_int_vector, sh2_pc(sh2));
     sh2->pending_int_irq = 0; // auto-clear
     sh2->pending_level = sh2->pending_irl;
     return sh2->pending_int_vector;
   }
 }
 
-void p32x_update_irls(int nested_call)
+// MUST specify active_sh2 when called from sh2 memhandlers
+void p32x_update_irls(SH2 *active_sh2, int m68k_cycles)
 {
   int irqs, mlvl = 0, slvl = 0;
+  int mrun, srun;
+
+  if (active_sh2 != NULL)
+    m68k_cycles = sh2_cycles_done_m68k(active_sh2);
 
   // msh2
   irqs = (Pico32x.sh2irqs | Pico32x.sh2irqi[0]) & ((Pico32x.sh2irq_mask[0] << 3) | P32XI_VRES);
@@ -42,12 +50,21 @@ void p32x_update_irls(int nested_call)
     slvl++;
   slvl *= 2;
 
-  elprintf(EL_32X, "update_irls: m %d, s %d", mlvl, slvl);
-  sh2_irl_irq(&msh2, mlvl, nested_call);
-  sh2_irl_irq(&ssh2, slvl, nested_call);
-  mlvl = mlvl ? 1 : 0;
-  slvl = slvl ? 1 : 0;
-  p32x_poll_event(mlvl | (slvl << 1), 0);
+  mrun = sh2_irl_irq(&msh2, mlvl, active_sh2 == &msh2);
+  if (mrun) {
+    p32x_sh2_poll_event(&msh2, SH2_IDLE_STATES, m68k_cycles);
+    if (active_sh2 == &msh2)
+      sh2_end_run(active_sh2, 1);
+  }
+
+  srun = sh2_irl_irq(&ssh2, slvl, active_sh2 == &ssh2);
+  if (srun) {
+    p32x_sh2_poll_event(&ssh2, SH2_IDLE_STATES, m68k_cycles);
+    if (active_sh2 == &ssh2)
+      sh2_end_run(active_sh2, 1);
+  }
+
+  elprintf(EL_32X, "update_irls: m %d/%d, s %d/%d", mlvl, mrun, slvl, srun);
 }
 
 void Pico32xStartup(void)
@@ -56,19 +73,18 @@ void Pico32xStartup(void)
 
   // TODO: OOM handling
   PicoAHW |= PAHW_32X;
-  sh2_init(&msh2, 0);
+  sh2_init(&msh2, 0, &ssh2);
   msh2.irq_callback = sh2_irq_cb;
-  sh2_init(&ssh2, 1);
+  sh2_init(&ssh2, 1, &msh2);
   ssh2.irq_callback = sh2_irq_cb;
 
   PicoMemSetup32x();
+  p32x_pwm_ctl_changed();
+  p32x_timers_recalc();
 
   if (!Pico.m.pal)
     Pico32x.vdp_regs[0] |= P32XV_nPAL;
 
-  PREG8(Pico32xMem->sh2_peri_regs[0], 4) =
-  PREG8(Pico32xMem->sh2_peri_regs[1], 4) = 0x84; // SCI SSR
-
   rendstatus_old = -1;
 
   emu_32x_startup();
@@ -81,6 +97,8 @@ void p32x_reset_sh2s(void)
 
   sh2_reset(&msh2);
   sh2_reset(&ssh2);
+  sh2_peripheral_reset(&msh2);
+  sh2_peripheral_reset(&ssh2);
 
   // if we don't have BIOS set, perform it's work here.
   // MSH2
@@ -137,7 +155,7 @@ void PicoPower32x(void)
   memset(&Pico32x, 0, sizeof(Pico32x));
 
   Pico32x.regs[0] = P32XS_REN|P32XS_nRES; // verified
-  Pico32x.vdp_regs[0x0a/2] = P32XV_VBLK|P32XV_HBLK|P32XV_PEN;
+  Pico32x.vdp_regs[0x0a/2] = P32XV_VBLK|P32XV_PEN;
   Pico32x.sh2_regs[0] = P32XS2_ADEN;
 }
 
@@ -155,9 +173,13 @@ void PicoUnload32x(void)
 void PicoReset32x(void)
 {
   if (PicoAHW & PAHW_32X) {
+    msh2.m68krcycles_done = ssh2.m68krcycles_done = SekCyclesDoneT();
     Pico32x.sh2irqs |= P32XI_VRES;
-    p32x_update_irls(0);
-    p32x_poll_event(3, 0);
+    p32x_update_irls(NULL, SekCyclesDoneT2());
+    p32x_sh2_poll_event(&msh2, SH2_IDLE_STATES, 0);
+    p32x_sh2_poll_event(&ssh2, SH2_IDLE_STATES, 0);
+    p32x_pwm_ctl_changed();
+    p32x_timers_recalc();
   }
 }
 
@@ -201,54 +223,234 @@ static void p32x_start_blank(void)
   }
 
   Pico32x.sh2irqs |= P32XI_VINT;
-  p32x_update_irls(0);
-  p32x_poll_event(3, 1);
+  p32x_update_irls(NULL, SekCyclesDoneT2());
+  p32x_sh2_poll_event(&msh2, SH2_STATE_VPOLL, 0);
+  p32x_sh2_poll_event(&ssh2, SH2_STATE_VPOLL, 0);
+}
+
+// compare cycles, handling overflows
+// check if a > b
+#define CYCLES_GT(a, b) \
+  ((int)((a) - (b)) > 0)
+// check if a >= b
+#define CYCLES_GE(a, b) \
+  ((int)((a) - (b)) >= 0)
+
+/* events */
+static void fillend_event(unsigned int now)
+{
+  Pico32x.vdp_regs[0x0a/2] &= ~P32XV_nFEN;
+  p32x_sh2_poll_event(&msh2, SH2_STATE_VPOLL, now);
+  p32x_sh2_poll_event(&ssh2, SH2_STATE_VPOLL, now);
+}
+
+typedef void (event_cb)(unsigned int now);
+
+unsigned int event_times[P32X_EVENT_COUNT];
+static unsigned int event_time_next;
+static event_cb *event_cbs[] = {
+  [P32X_EVENT_PWM]      = p32x_pwm_irq_event,
+  [P32X_EVENT_FILLEND]  = fillend_event,
+};
+
+// schedule event at some time 'after', in m68k clocks
+void p32x_event_schedule(unsigned int now, enum p32x_event event, int after)
+{
+  unsigned int when;
+
+  when = (now + after) | 1;
+
+  elprintf(EL_32X, "new event #%u %u->%u", event, now, when);
+  event_times[event] = when;
+
+  if (event_time_next == 0 || CYCLES_GT(event_time_next, when))
+    event_time_next = when;
+}
+
+void p32x_event_schedule_sh2(SH2 *sh2, enum p32x_event event, int after)
+{
+  unsigned int now = sh2_cycles_done_m68k(sh2);
+  int left_to_next;
+
+  p32x_event_schedule(now, event, after);
+
+  left_to_next = (event_time_next - now) * 3;
+  sh2_end_run(sh2, left_to_next);
+}
+
+static void run_events(unsigned int until)
+{
+  int oldest, oldest_diff, time;
+  int i, diff;
+
+  while (1) {
+    oldest = -1, oldest_diff = 0x7fffffff;
+
+    for (i = 0; i < P32X_EVENT_COUNT; i++) {
+      if (event_times[i]) {
+        diff = event_times[i] - until;
+        if (diff < oldest_diff) {
+          oldest_diff = diff;
+          oldest = i;
+        }
+      }
+    }
+
+    if (oldest_diff <= 0) {
+      time = event_times[oldest];
+      event_times[oldest] = 0;
+      elprintf(EL_32X, "run event #%d %u", oldest, time);
+      event_cbs[oldest](time);
+    }
+    else if (oldest_diff < 0x7fffffff) {
+      event_time_next = event_times[oldest];
+      break;
+    }
+    else {
+      event_time_next = 0;
+      break;
+    }
+  }
+
+  if (oldest != -1)
+    elprintf(EL_32X, "next event #%d at %u", oldest, event_time_next);
+}
+
+static inline void run_sh2(SH2 *sh2, int m68k_cycles)
+{
+  int cycles, done;
+
+  pevt_log_sh2_o(sh2, EVT_RUN_START);
+  sh2->state |= SH2_STATE_RUN;
+  cycles = C_M68K_TO_SH2(*sh2, m68k_cycles);
+  elprintf_sh2(sh2, EL_32X, "+run %u %d @%08x",
+    sh2->m68krcycles_done, cycles, sh2->pc);
+
+  done = sh2_execute(sh2, cycles);
+
+  sh2->m68krcycles_done += C_SH2_TO_M68K(*sh2, done);
+  sh2->state &= ~SH2_STATE_RUN;
+  pevt_log_sh2_o(sh2, EVT_RUN_END);
+  elprintf_sh2(sh2, EL_32X, "-run %u %d",
+    sh2->m68krcycles_done, done);
+}
+
+// sync other sh2 to this one
+// note: recursive call
+void p32x_sync_other_sh2(SH2 *sh2, unsigned int m68k_target)
+{
+  SH2 *osh2 = sh2->other_sh2;
+  int left_to_event;
+  int m68k_cycles;
+
+  if (osh2->state & SH2_STATE_RUN)
+    return;
+
+  m68k_cycles = m68k_target - osh2->m68krcycles_done;
+  if (m68k_cycles < 200)
+    return;
+
+  if (osh2->state & SH2_IDLE_STATES) {
+    osh2->m68krcycles_done = m68k_target;
+    return;
+  }
+
+  elprintf_sh2(osh2, EL_32X, "sync to %u %d",
+    m68k_target, m68k_cycles);
+
+  run_sh2(osh2, m68k_cycles);
+
+  // there might be new event to schedule current sh2 to
+  if (event_time_next) {
+    left_to_event = event_time_next - m68k_target;
+    left_to_event *= 3;
+    if (sh2_cycles_left(sh2) > left_to_event) {
+      if (left_to_event < 1)
+        left_to_event = 1;
+      sh2_end_run(sh2, left_to_event);
+    }
+  }
 }
 
 #define sync_sh2s_normal p32x_sync_sh2s
 //#define sync_sh2s_lockstep p32x_sync_sh2s
 
+/* most timing is in 68k clock */
 void sync_sh2s_normal(unsigned int m68k_target)
 {
-  unsigned int target = m68k_target;
-  int msh2_cycles, ssh2_cycles;
-  int done;
+  unsigned int now, target, timer_cycles;
+  int cycles;
 
-  elprintf(EL_32X, "sh2 sync to %u (%u)", m68k_target, SekCycleCnt);
+  elprintf(EL_32X, "sh2 sync to %u", m68k_target);
 
-  if (!(Pico32x.regs[0] & P32XS_nRES))
+  if (!(Pico32x.regs[0] & P32XS_nRES)) {
+    msh2.m68krcycles_done = ssh2.m68krcycles_done = m68k_target;
     return; // rare
+  }
+
+  now = msh2.m68krcycles_done;
+  if (CYCLES_GT(now, ssh2.m68krcycles_done))
+    now = ssh2.m68krcycles_done;
+  timer_cycles = now;
 
+  while (CYCLES_GT(m68k_target, now))
   {
-    msh2_cycles = C_M68K_TO_SH2(msh2, target - msh2.m68krcycles_done);
-    ssh2_cycles = C_M68K_TO_SH2(ssh2, target - ssh2.m68krcycles_done);
+    if (event_time_next && CYCLES_GE(now, event_time_next))
+      run_events(now);
 
-    while (msh2_cycles > 0 || ssh2_cycles > 0) {
-      elprintf(EL_32X, "sh2 exec %u,%u->%u",
-        msh2.m68krcycles_done, ssh2.m68krcycles_done, target);
+    target = m68k_target;
+    if (event_time_next && CYCLES_GT(target, event_time_next))
+      target = event_time_next;
 
-      if (Pico32x.emu_flags & (P32XF_SSH2POLL|P32XF_SSH2VPOLL)) {
-        ssh2.m68krcycles_done = target;
-        ssh2_cycles = 0;
+    while (CYCLES_GT(target, now))
+    {
+      elprintf(EL_32X, "sh2 exec to %u %d,%d/%d, flags %x", target,
+        target - msh2.m68krcycles_done, target - ssh2.m68krcycles_done,
+        m68k_target - now, Pico32x.emu_flags);
+
+      if (!(ssh2.state & SH2_IDLE_STATES)) {
+        cycles = target - ssh2.m68krcycles_done;
+        if (cycles > 0) {
+          run_sh2(&ssh2, cycles);
+
+          if (event_time_next && CYCLES_GT(target, event_time_next))
+            target = event_time_next;
+        }
       }
-      else if (ssh2_cycles > 0) {
-        done = sh2_execute(&ssh2, ssh2_cycles);
-        ssh2.m68krcycles_done += C_SH2_TO_M68K(ssh2, done);
 
-        ssh2_cycles = C_M68K_TO_SH2(ssh2, target - ssh2.m68krcycles_done);
-      }
+      if (!(msh2.state & SH2_IDLE_STATES)) {
+        cycles = target - msh2.m68krcycles_done;
+        if (cycles > 0) {
+          run_sh2(&msh2, cycles);
 
-      if (Pico32x.emu_flags & (P32XF_MSH2POLL|P32XF_MSH2VPOLL)) {
-        msh2.m68krcycles_done = target;
-        msh2_cycles = 0;
+          if (event_time_next && CYCLES_GT(target, event_time_next))
+            target = event_time_next;
+        }
       }
-      else if (msh2_cycles > 0) {
-        done = sh2_execute(&msh2, msh2_cycles);
-        msh2.m68krcycles_done += C_SH2_TO_M68K(msh2, done);
 
-        msh2_cycles = C_M68K_TO_SH2(msh2, target - msh2.m68krcycles_done);
+      now = target;
+      if (!(msh2.state & SH2_IDLE_STATES)) {
+        if (CYCLES_GT(now, msh2.m68krcycles_done))
+          now = msh2.m68krcycles_done;
+      }
+      if (!(ssh2.state & SH2_IDLE_STATES)) {
+        if (CYCLES_GT(now, ssh2.m68krcycles_done))
+          now = ssh2.m68krcycles_done;
       }
     }
+
+    p32x_timers_do(now - timer_cycles);
+    timer_cycles = now;
+  }
+
+  // advance idle CPUs
+  if (msh2.state & SH2_IDLE_STATES) {
+    if (CYCLES_GT(m68k_target, msh2.m68krcycles_done))
+      msh2.m68krcycles_done = m68k_target;
+  }
+  if (ssh2.state & SH2_IDLE_STATES) {
+    if (CYCLES_GT(m68k_target, ssh2.m68krcycles_done))
+      ssh2.m68krcycles_done = m68k_target;
   }
 }
 
@@ -270,8 +472,8 @@ void sync_sh2s_lockstep(unsigned int m68k_target)
 
 #define CPUS_RUN(m68k_cycles,s68k_cycles) do { \
   SekRunM68k(m68k_cycles); \
-  if (SekIsStoppedM68k()) \
-    p32x_sync_sh2s(SekCycleCntT + SekCycleCnt); \
+  if (Pico32x.emu_flags & (P32XF_68KCPOLL|P32XF_68KVPOLL)) \
+    p32x_sync_sh2s(SekCyclesDoneT2()); \
 } while (0)
 
 #define PICO_32X
@@ -279,17 +481,19 @@ void sync_sh2s_lockstep(unsigned int m68k_target)
 
 void PicoFrame32x(void)
 {
-  pwm_frame_smp_cnt = 0;
-
   Pico32x.vdp_regs[0x0a/2] &= ~P32XV_VBLK; // get out of vblank
   if ((Pico32x.vdp_regs[0] & P32XV_Mx) != 0) // no forced blanking
     Pico32x.vdp_regs[0x0a/2] &= ~P32XV_PEN; // no palette access
 
-  p32x_poll_event(3, 1);
+  p32x_sh2_poll_event(&msh2, SH2_STATE_VPOLL, 0);
+  p32x_sh2_poll_event(&ssh2, SH2_STATE_VPOLL, 0);
 
   PicoFrameStart();
   PicoFrameHints();
-  elprintf(EL_32X, "poll: %02x", Pico32x.emu_flags);
+  sh2_drc_frame();
+
+  elprintf(EL_32X, "poll: %02x %02x %02x",
+    Pico32x.emu_flags & 3, msh2.state, ssh2.state);
 }
 
 // calculate multipliers against 68k clock (7670442)
@@ -308,4 +512,18 @@ void Pico32xSetClocks(int msh2_hz, int ssh2_hz)
   }
 }
 
+void Pico32xStateLoaded(int is_early)
+{
+  if (is_early) {
+    Pico32xMemStateLoaded();
+    return;
+  }
+
+  SekCycleCnt = 0;
+  sh2s[0].m68krcycles_done = sh2s[1].m68krcycles_done = SekCycleCntT;
+  p32x_update_irls(NULL, SekCycleCntT);
+  p32x_pwm_state_loaded();
+  run_events(SekCycleCntT);
+}
+
 // vim:shiftwidth=2:ts=2:expandtab