X-Git-Url: https://notaz.gp2x.de/cgi-bin/gitweb.cgi?a=blobdiff_plain;f=pico%2F32x%2Fmemory.c;h=1f08ab4a3f8472b33f306bfaeaf2eee2d5e9998a;hb=5fadfb1c3732909f8e870954aeea82b761457784;hp=b179873909e35f1e981d4cb728419df282c28321;hpb=1b3f58449285f3cfcc8ae0e1aefdada44a9e9bc5;p=picodrive.git diff --git a/pico/32x/memory.c b/pico/32x/memory.c index b179873..1f08ab4 100644 --- a/pico/32x/memory.c +++ b/pico/32x/memory.c @@ -1,6 +1,13 @@ #include "../pico_int.h" #include "../memory.h" +#if 0 +#undef ash2_end_run +#undef SekEndRun +#define ash2_end_run(x) +#define SekEndRun(x) +#endif + static const char str_mars[] = "MARS"; struct Pico32xMem *Pico32xMem; @@ -23,7 +30,7 @@ static int p32x_poll_detect(struct poll_det *pd, u32 a, u32 cycles, int is_vdp) if (is_vdp) flag <<= 3; - if (a - 2 <= pd->addr && pd->addr <= a + 2 && cycles - pd->cycles < pd->cyc_max) { + if (a - 2 <= pd->addr && pd->addr <= a + 2 && cycles - pd->cycles <= pd->cyc_max) { pd->cnt++; if (pd->cnt > POLL_THRESHOLD) { if (!(Pico32x.emu_flags & flag)) { @@ -35,9 +42,10 @@ static int p32x_poll_detect(struct poll_det *pd, u32 a, u32 cycles, int is_vdp) Pico32x.emu_flags |= flag; } } - else + else { pd->cnt = 0; - pd->addr = a; + pd->addr = a; + } pd->cycles = cycles; return ret; @@ -150,8 +158,18 @@ static u32 p32x_reg_read16(u32 a) if ((a & 0x30) == 0x20) return sh2_comm_faker(a); #else - if ((a & 0x30) == 0x20 && p32x_poll_detect(&m68k_poll, a, SekCyclesDoneT(), 0)) { - SekEndRun(16); + if ((a & 0x30) == 0x20) { + // evil X-Men proto polls in a dbra loop and expects it to expire.. + static u32 dr2 = 0; + if (SekDar(2) != dr2) + m68k_poll.cnt = 0; + dr2 = SekDar(2); + + if (p32x_poll_detect(&m68k_poll, a, SekCyclesDoneT(), 0)) { + SekSetStop(1); + SekEndTimeslice(16); + } + dr2 = SekDar(2); } #endif @@ -212,9 +230,11 @@ static void p32x_reg_write8(u32 a, u32 d) if ((a & 0x30) == 0x20) { u8 *r8 = (u8 *)r; r8[a ^ 1] = d; - if (p32x_poll_undetect(&sh2_poll[0], 0) || p32x_poll_undetect(&sh2_poll[1], 0)) - // if some SH2 is busy waiting, it needs to see the result ASAP - SekEndRun(16); + p32x_poll_undetect(&sh2_poll[0], 0); + p32x_poll_undetect(&sh2_poll[1], 0); + // if some SH2 is busy waiting, it needs to see the result ASAP + if (SekCyclesLeftNoMCD > 32) + SekEndRun(32); return; } } @@ -257,9 +277,11 @@ static void p32x_reg_write16(u32 a, u32 d) // comm port else if ((a & 0x30) == 0x20 && r[a / 2] != d) { r[a / 2] = d; - if (p32x_poll_undetect(&sh2_poll[0], 0) || p32x_poll_undetect(&sh2_poll[1], 0)) - // if some SH2 is busy waiting, it needs to see the result ASAP - SekEndRun(16); + p32x_poll_undetect(&sh2_poll[0], 0); + p32x_poll_undetect(&sh2_poll[1], 0); + // same as for w8 + if (SekCyclesLeftNoMCD > 32) + SekEndRun(32); return; } // PWM @@ -295,8 +317,6 @@ static void p32x_vdp_write8(u32 a, u32 d) if ((r[0] ^ d) & P32XV_PRI) Pico32x.dirty_pal = 1; r[0] = (r[0] & P32XV_nPAL) | (d & 0xff); - if ((d & 3) == 3) - elprintf(EL_32X|EL_ANOMALY, "TODO: mode3"); break; case 0x05: // fill len r[4 / 2] = d & 0xff; @@ -348,7 +368,9 @@ static u32 p32x_sh2reg_read16(u32 a, int cpuid) switch (a) { case 0x00: // adapter/irq ctl return (r[0] & P32XS_FM) | Pico32x.sh2_regs[0] | Pico32x.sh2irq_mask[cpuid]; - case 0x04: // H count + case 0x04: // H count (often as comm too) + if (p32x_poll_detect(&sh2_poll[cpuid], a, ash2_cycles_done(), 0)) + ash2_end_run(8); return Pico32x.sh2_regs[4 / 2]; case 0x10: // DREQ len return r[a / 2]; @@ -387,13 +409,15 @@ static void p32x_sh2reg_write8(u32 a, u32 d, int cpuid) return; case 5: // H count Pico32x.sh2_regs[4 / 2] = d & 0xff; + p32x_poll_undetect(&sh2_poll[cpuid ^ 1], 0); return; } if ((a & 0x30) == 0x20) { u8 *r8 = (u8 *)Pico32x.regs; r8[a ^ 1] = d; - p32x_poll_undetect(&m68k_poll, 0); + if (p32x_poll_undetect(&m68k_poll, 0)) + SekSetStop(0); p32x_poll_undetect(&sh2_poll[cpuid ^ 1], 0); return; } @@ -406,7 +430,8 @@ static void p32x_sh2reg_write16(u32 a, u32 d, int cpuid) // comm if ((a & 0x30) == 0x20 && Pico32x.regs[a/2] != d) { Pico32x.regs[a / 2] = d; - p32x_poll_undetect(&m68k_poll, 0); + if (p32x_poll_undetect(&m68k_poll, 0)) + SekSetStop(0); p32x_poll_undetect(&sh2_poll[cpuid ^ 1], 0); return; } @@ -427,7 +452,7 @@ static void p32x_sh2reg_write16(u32 a, u32 d, int cpuid) case 0x1a: Pico32x.sh2irqi[cpuid] &= ~P32XI_CMD; goto irls; case 0x1c: Pico32x.sh2irqs &= ~P32XI_PWM; - p32x_pwm_irq_check(0); + p32x_timers_do(0); goto irls; } @@ -440,20 +465,31 @@ irls: // ------------------------------------------------------------------ // SH2 internal peripherals +// we keep them in little endian format static u32 sh2_peripheral_read8(u32 a, int id) { u8 *r = (void *)Pico32xMem->sh2_peri_regs[id]; u32 d; a &= 0x1ff; - d = r[a]; - if (a == 4) - d = 0x84; // SCI SSR + d = PREG8(r, a); elprintf(EL_32X, "%csh2 peri r8 [%08x] %02x @%06x", id ? 's' : 'm', a | ~0x1ff, d, sh2_pc(id)); return d; } +static u32 sh2_peripheral_read16(u32 a, int id) +{ + u16 *r = (void *)Pico32xMem->sh2_peri_regs[id]; + u32 d; + + a &= 0x1ff; + d = r[(a / 2) ^ 1]; + + elprintf(EL_32X, "%csh2 peri r16 [%08x] %04x @%06x", id ? 's' : 'm', a | ~0x1ff, d, sh2_pc(id)); + return d; +} + static u32 sh2_peripheral_read32(u32 a, int id) { u32 d; @@ -470,7 +506,40 @@ static void sh2_peripheral_write8(u32 a, u32 d, int id) elprintf(EL_32X, "%csh2 peri w8 [%08x] %02x @%06x", id ? 's' : 'm', a, d, sh2_pc(id)); a &= 0x1ff; - r[a] = d; + PREG8(r, a) = d; + + // X-men SCI hack + if ((a == 2 && (d & 0x20)) || // transmiter enabled + (a == 4 && !(d & 0x80))) { // valid data in TDR + void *oregs = Pico32xMem->sh2_peri_regs[id ^ 1]; + if ((PREG8(oregs, 2) & 0x50) == 0x50) { // receiver + irq enabled + int level = PREG8(oregs, 0x60) >> 4; + int vector = PREG8(oregs, 0x63) & 0x7f; + elprintf(EL_32X, "%csh2 SCI recv irq (%d, %d)", (id ^ 1) ? 's' : 'm', level, vector); + sh2_internal_irq(&sh2s[id ^ 1], level, vector); + } + } +} + +static void sh2_peripheral_write16(u32 a, u32 d, int id) +{ + u16 *r = (void *)Pico32xMem->sh2_peri_regs[id]; + elprintf(EL_32X, "%csh2 peri w16 [%08x] %04x @%06x", id ? 's' : 'm', a, d, sh2_pc(id)); + + a &= 0x1ff; + + // evil WDT + if (a == 0x80) { + if ((d & 0xff00) == 0xa500) { // WTCSR + PREG8(r, 0x80) = d; + p32x_timers_recalc(); + } + if ((d & 0xff00) == 0x5a00) // WTCNT + PREG8(r, 0x81) = d; + return; + } + + r[(a / 2) ^ 1] = d; } static void sh2_peripheral_write32(u32 a, u32 d, int id) @@ -730,7 +799,8 @@ u32 p32x_sh2_read8(u32 a, int id) if ((a & ~0xfff) == 0xc0000000) return Pico32xMem->data_array[id][(a & 0xfff) ^ 1]; - if ((a & 0xdffe0000) == 0x04000000) { + if ((a & 0xdffc0000) == 0x04000000) { + /* XXX: overwrite readable as normal? */ u8 *dram = (u8 *)Pico32xMem->dram[(Pico32x.vdp_regs[0x0a/2] & P32XV_FS) ^ 1]; return dram[(a & 0x1ffff) ^ 1]; } @@ -811,6 +881,9 @@ u32 p32x_sh2_read16(u32 a, int id) goto out; } + if ((a & 0xfffffe00) == 0xfffffe00) + return sh2_peripheral_read16(a, id); + elprintf(EL_UIO, "%csh2 unmapped r16 [%08x] %04x @%06x", id ? 's' : 'm', a, d, sh2_pc(id)); return d; @@ -846,8 +919,8 @@ void p32x_sh2_write8(u32 a, u32 d, int id) if (!(a & 0x20000) || d) { dram = (u8 *)Pico32xMem->dram[(Pico32x.vdp_regs[0x0a/2] & P32XV_FS) ^ 1]; dram[(a & 0x1ffff) ^ 1] = d; - return; } + return; } if ((a & ~0xfff) == 0xc0000000) { @@ -924,6 +997,11 @@ void p32x_sh2_write16(u32 a, u32 d, int id) return; } + if ((a & 0xfffffe00) == 0xfffffe00) { + sh2_peripheral_write16(a, d, id); + return; + } + elprintf(EL_UIO, "%csh2 unmapped w16 [%08x] %04x @%06x", id ? 's' : 'm', a, d & 0xffff, sh2_pc(id)); } @@ -1036,7 +1114,7 @@ void PicoMemSetup32x(void) m68k_poll.flag = P32XF_68KPOLL; m68k_poll.cyc_max = 64; sh2_poll[0].flag = P32XF_MSH2POLL; - sh2_poll[0].cyc_max = 16; + sh2_poll[0].cyc_max = 21; sh2_poll[1].flag = P32XF_SSH2POLL; sh2_poll[1].cyc_max = 16; }