X-Git-Url: https://notaz.gp2x.de/cgi-bin/gitweb.cgi?a=blobdiff_plain;f=pico%2F32x%2Fmemory.c;h=5ede2ea7dc9c2eeaf686792e4606228283e56a6c;hb=34280f9b424dc3964e3c3e1cfd2cd18c8041b5d8;hp=e0d524f276381c27f546b4f64d6968849b2fc362;hpb=5609d343e3b34d9fed210a1c26c2441d3f797036;p=picodrive.git diff --git a/pico/32x/memory.c b/pico/32x/memory.c index e0d524f..5ede2ea 100644 --- a/pico/32x/memory.c +++ b/pico/32x/memory.c @@ -171,45 +171,6 @@ static u32 sh2_comm_faker(u32 a) } #endif -// DMAC handling -static struct { - unsigned int sar0, dar0, tcr0; // src addr, dst addr, transfer count - unsigned int chcr0; // chan ctl - unsigned int sar1, dar1, tcr1; // same for chan 1 - unsigned int chcr1; - int pad[4]; - unsigned int dmaor; -} * dmac0; - -static void dma_68k2sh2_do(void) -{ - unsigned short *dreqlen = &Pico32x.regs[0x10 / 2]; - int i; - - if (dmac0->tcr0 != *dreqlen) - elprintf(EL_32X|EL_ANOMALY, "tcr0 and dreq len differ: %d != %d", dmac0->tcr0, *dreqlen); - - // HACK: assume bus is busy and SH2 is halted - msh2.state |= SH2_STATE_SLEEP; - - for (i = 0; i < Pico32x.dmac_ptr && dmac0->tcr0 > 0; i++) { - elprintf(EL_32X, "dmaw [%08x] %04x, left %d", dmac0->dar0, Pico32x.dmac_fifo[i], *dreqlen); - p32x_sh2_write16(dmac0->dar0, Pico32x.dmac_fifo[i], &msh2); - dmac0->dar0 += 2; - dmac0->tcr0--; - (*dreqlen)--; - } - - Pico32x.dmac_ptr = 0; // HACK - Pico32x.regs[6 / 2] &= ~P32XS_FULL; - if (*dreqlen == 0) - Pico32x.regs[6 / 2] &= ~P32XS_68S; // transfer complete - if (dmac0->tcr0 == 0) { - dmac0->chcr0 |= 2; // DMA has ended normally - p32x_sh2_poll_event(&sh2s[0], SH2_STATE_SLEEP, SekCyclesDoneT()); - } -} - // ------------------------------------------------------------------ // 68k regs @@ -252,7 +213,7 @@ static u32 p32x_reg_read16(u32 a) } if ((a & 0x30) == 0x30) - return p32x_pwm_read16(a); + return p32x_pwm_read16(a, SekCyclesDoneT()); out: return Pico32x.regs[a / 2]; @@ -347,11 +308,11 @@ static void p32x_reg_write16(u32 a, u32 d) elprintf(EL_32X|EL_ANOMALY, "DREQ FIFO w16 without 68S?"); return; } - if (Pico32x.dmac_ptr < DMAC_FIFO_LEN) { - Pico32x.dmac_fifo[Pico32x.dmac_ptr++] = d; - if ((Pico32x.dmac_ptr & 3) == 0 && (dmac0->chcr0 & 3) == 1 && (dmac0->dmaor & 1)) - dma_68k2sh2_do(); - if (Pico32x.dmac_ptr == DMAC_FIFO_LEN) + if (Pico32x.dmac0_fifo_ptr < DMAC_FIFO_LEN) { + Pico32x.dmac_fifo[Pico32x.dmac0_fifo_ptr++] = d; + if ((Pico32x.dmac0_fifo_ptr & 3) == 0) + p32x_dreq0_trigger(); + if (Pico32x.dmac0_fifo_ptr == DMAC_FIFO_LEN) r[6 / 2] |= P32XS_FULL; } break; @@ -385,7 +346,7 @@ static void p32x_reg_write16(u32 a, u32 d) } // PWM else if ((a & 0x30) == 0x30) { - p32x_pwm_write16(a, d); + p32x_pwm_write16(a, d, SekCyclesDoneT()); return; } @@ -495,7 +456,7 @@ static u32 p32x_sh2reg_read16(u32 a, int cpuid) return r[a / 2]; } if ((a & 0x30) == 0x30) { - return p32x_pwm_read16(a); + return p32x_pwm_read16(a, sh2_cycles_done_m68k(&sh2s[cpuid])); } return 0; @@ -571,7 +532,7 @@ static void p32x_sh2reg_write16(u32 a, u32 d, int cpuid) } // PWM else if ((a & 0x30) == 0x30) { - p32x_pwm_write16(a, d); + p32x_pwm_write16(a, d, sh2_cycles_done_m68k(&sh2s[cpuid])); return; } @@ -586,8 +547,7 @@ static void p32x_sh2reg_write16(u32 a, u32 d, int cpuid) case 0x1a: Pico32x.sh2irqi[cpuid] &= ~P32XI_CMD; goto irls; case 0x1c: Pico32x.sh2irqs &= ~P32XI_PWM; - if (!(Pico32x.emu_flags & P32XF_PWM_PEND)) - p32x_pwm_schedule_sh2(&sh2s[cpuid]); + p32x_pwm_schedule_sh2(&sh2s[cpuid]); goto irls; } @@ -599,147 +559,7 @@ irls: } // ------------------------------------------------------------------ -// SH2 internal peripherals -// we keep them in little endian format -static u32 sh2_peripheral_read8(u32 a, int id) -{ - u8 *r = (void *)Pico32xMem->sh2_peri_regs[id]; - u32 d; - - a &= 0x1ff; - d = PREG8(r, a); - - elprintf(EL_32X, "%csh2 peri r8 [%08x] %02x @%06x", id ? 's' : 'm', a | ~0x1ff, d, sh2_pc(id)); - return d; -} - -static u32 sh2_peripheral_read16(u32 a, int id) -{ - u16 *r = (void *)Pico32xMem->sh2_peri_regs[id]; - u32 d; - - a &= 0x1ff; - d = r[(a / 2) ^ 1]; - - elprintf(EL_32X, "%csh2 peri r16 [%08x] %04x @%06x", id ? 's' : 'm', a | ~0x1ff, d, sh2_pc(id)); - return d; -} - -static u32 sh2_peripheral_read32(u32 a, int id) -{ - u32 d; - a &= 0x1fc; - d = Pico32xMem->sh2_peri_regs[id][a / 4]; - - elprintf(EL_32X, "%csh2 peri r32 [%08x] %08x @%06x", id ? 's' : 'm', a | ~0x1ff, d, sh2_pc(id)); - return d; -} - -static int REGPARM(3) sh2_peripheral_write8(u32 a, u32 d, int id) -{ - u8 *r = (void *)Pico32xMem->sh2_peri_regs[id]; - elprintf(EL_32X, "%csh2 peri w8 [%08x] %02x @%06x", id ? 's' : 'm', a, d, sh2_pc(id)); - - a &= 0x1ff; - PREG8(r, a) = d; - - // X-men SCI hack - if ((a == 2 && (d & 0x20)) || // transmiter enabled - (a == 4 && !(d & 0x80))) { // valid data in TDR - void *oregs = Pico32xMem->sh2_peri_regs[id ^ 1]; - if ((PREG8(oregs, 2) & 0x50) == 0x50) { // receiver + irq enabled - int level = PREG8(oregs, 0x60) >> 4; - int vector = PREG8(oregs, 0x63) & 0x7f; - elprintf(EL_32X, "%csh2 SCI recv irq (%d, %d)", (id ^ 1) ? 's' : 'm', level, vector); - sh2_internal_irq(&sh2s[id ^ 1], level, vector); - return 1; - } - } - return 0; -} - -static int REGPARM(3) sh2_peripheral_write16(u32 a, u32 d, int id) -{ - u16 *r = (void *)Pico32xMem->sh2_peri_regs[id]; - elprintf(EL_32X, "%csh2 peri w16 [%08x] %04x @%06x", id ? 's' : 'm', a, d, sh2_pc(id)); - - a &= 0x1ff; - - // evil WDT - if (a == 0x80) { - if ((d & 0xff00) == 0xa500) { // WTCSR - PREG8(r, 0x80) = d; - p32x_timers_recalc(); - } - if ((d & 0xff00) == 0x5a00) // WTCNT - PREG8(r, 0x81) = d; - return 0; - } - - r[(a / 2) ^ 1] = d; - return 0; -} - -static void sh2_peripheral_write32(u32 a, u32 d, int id) -{ - u32 *r = Pico32xMem->sh2_peri_regs[id]; - elprintf(EL_32X, "%csh2 peri w32 [%08x] %08x @%06x", id ? 's' : 'm', a, d, sh2_pc(id)); - - a &= 0x1fc; - r[a / 4] = d; - - switch (a) { - // division unit (TODO: verify): - case 0x104: // DVDNT: divident L, starts divide - elprintf(EL_32X, "%csh2 divide %08x / %08x", id ? 's' : 'm', d, r[0x100 / 4]); - if (r[0x100 / 4]) { - signed int divisor = r[0x100 / 4]; - r[0x118 / 4] = r[0x110 / 4] = (signed int)d % divisor; - r[0x104 / 4] = r[0x11c / 4] = r[0x114 / 4] = (signed int)d / divisor; - } - else - r[0x110 / 4] = r[0x114 / 4] = r[0x118 / 4] = r[0x11c / 4] = 0; // ? - break; - case 0x114: - elprintf(EL_32X, "%csh2 divide %08x%08x / %08x @%08x", - id ? 's' : 'm', r[0x110 / 4], d, r[0x100 / 4], sh2_pc(id)); - if (r[0x100 / 4]) { - signed long long divident = (signed long long)r[0x110 / 4] << 32 | d; - signed int divisor = r[0x100 / 4]; - // XXX: undocumented mirroring to 0x118,0x11c? - r[0x118 / 4] = r[0x110 / 4] = divident % divisor; - divident /= divisor; - r[0x11c / 4] = r[0x114 / 4] = divident; - divident >>= 31; - if ((unsigned long long)divident + 1 > 1) { - //elprintf(EL_32X, "%csh2 divide overflow! @%08x", id ? 's' : 'm', sh2_pc(id)); - r[0x11c / 4] = r[0x114 / 4] = divident > 0 ? 0x7fffffff : 0x80000000; // overflow - } - } - else - r[0x110 / 4] = r[0x114 / 4] = r[0x118 / 4] = r[0x11c / 4] = 0; // ? - break; - } - - if ((a == 0x1b0 || a == 0x18c) && (dmac0->chcr0 & 3) == 1 && (dmac0->dmaor & 1)) { - elprintf(EL_32X, "sh2 DMA %08x -> %08x, cnt %d, chcr %04x @%06x", - dmac0->sar0, dmac0->dar0, dmac0->tcr0, dmac0->chcr0, sh2_pc(id)); - dmac0->tcr0 &= 0xffffff; - - // HACK: assume 68k starts writing soon and end the timeslice - sh2_end_run(&sh2s[id], 16); - - // DREQ is only sent after first 4 words are written. - // we do multiple of 4 words to avoid messing up alignment - if (dmac0->sar0 == 0x20004012 && Pico32x.dmac_ptr && (Pico32x.dmac_ptr & 3) == 0) { - elprintf(EL_32X, "68k -> sh2 DMA"); - dma_68k2sh2_do(); - } - } -} - -// ------------------------------------------------------------------ -// 32x handlers +// 32x 68k handlers // after ADEN static u32 PicoRead8_32x_on(u32 a) @@ -978,6 +798,45 @@ void PicoWrite16_32x(u32 a, u32 d) elprintf(EL_UIO, "m68k unmapped w16 [%06x] %04x @%06x", a, d & 0xffff, SekPc); } +/* quirk: in both normal and overwrite areas only nonzero values go through */ +#define sh2_write8_dramN(n) \ + if ((d & 0xff) != 0) { \ + u8 *dram = (u8 *)Pico32xMem->dram[n]; \ + dram[(a & 0x1ffff) ^ 1] = d; \ + } + +static void m68k_write8_dram0_ow(u32 a, u32 d) +{ + sh2_write8_dramN(0); +} + +static void m68k_write8_dram1_ow(u32 a, u32 d) +{ + sh2_write8_dramN(1); +} + +#define sh2_write16_dramN(n, ret) \ + u16 *pd = &Pico32xMem->dram[n][(a & 0x1ffff) / 2]; \ + if (!(a & 0x20000)) { \ + *pd = d; \ + return ret; \ + } \ + /* overwrite */ \ + if (!(d & 0xff00)) d |= *pd & 0xff00; \ + if (!(d & 0x00ff)) d |= *pd & 0x00ff; \ + *pd = d; \ + return ret + +static void m68k_write16_dram0_ow(u32 a, u32 d) +{ + sh2_write16_dramN(0,); +} + +static void m68k_write16_dram1_ow(u32 a, u32 d) +{ + sh2_write16_dramN(1,); +} + // ----------------------------------------------------------------- // hint vector is writeable @@ -1167,22 +1026,16 @@ static int REGPARM(3) sh2_write8_cs0(u32 a, u32 d, int id) return sh2_write8_unmapped(a, d, id); } -/* quirk: in both normal and overwrite areas only nonzero values go through */ -#define sh2_write8_dramN(n) \ - if ((d & 0xff) != 0) { \ - u8 *dram = (u8 *)Pico32xMem->dram[n]; \ - dram[(a & 0x1ffff) ^ 1] = d; \ - } \ - return 0; - static int REGPARM(3) sh2_write8_dram0(u32 a, u32 d, int id) { sh2_write8_dramN(0); + return 0; } static int REGPARM(3) sh2_write8_dram1(u32 a, u32 d, int id) { sh2_write8_dramN(1); + return 0; } static int REGPARM(3) sh2_write8_sdram(u32 a, u32 d, int id) @@ -1245,26 +1098,14 @@ static int REGPARM(3) sh2_write16_cs0(u32 a, u32 d, int id) return sh2_write16_unmapped(a, d, id); } -#define sh2_write16_dramN(n) \ - u16 *pd = &Pico32xMem->dram[n][(a & 0x1ffff) / 2]; \ - if (!(a & 0x20000)) { \ - *pd = d; \ - return 0; \ - } \ - /* overwrite */ \ - if (!(d & 0xff00)) d |= *pd & 0xff00; \ - if (!(d & 0x00ff)) d |= *pd & 0x00ff; \ - *pd = d; \ - return 0 - static int REGPARM(3) sh2_write16_dram0(u32 a, u32 d, int id) { - sh2_write16_dramN(0); + sh2_write16_dramN(0, 0); } static int REGPARM(3) sh2_write16_dram1(u32 a, u32 d, int id) { - sh2_write16_dramN(1); + sh2_write16_dramN(1, 0); } static int REGPARM(3) sh2_write16_sdram(u32 a, u32 d, int id) @@ -1430,7 +1271,7 @@ static const u16 ssh2_code[] = { 0x2200, 0x03e4 // slave start pointer in ROM }; -#define HWSWAP(x) (((x) << 16) | ((x) >> 16)) +#define HWSWAP(x) (((u16)(x) << 16) | ((x) >> 16)) static void get_bios(void) { u16 *ps; @@ -1520,8 +1361,12 @@ void Pico32xSwapDRAM(int b) { cpu68k_map_set(m68k_read8_map, 0x840000, 0x85ffff, Pico32xMem->dram[b], 0); cpu68k_map_set(m68k_read16_map, 0x840000, 0x85ffff, Pico32xMem->dram[b], 0); - cpu68k_map_set(m68k_write8_map, 0x840000, 0x85ffff, Pico32xMem->dram[b], 0); - cpu68k_map_set(m68k_write16_map, 0x840000, 0x85ffff, Pico32xMem->dram[b], 0); + cpu68k_map_set(m68k_read8_map, 0x860000, 0x87ffff, Pico32xMem->dram[b], 0); + cpu68k_map_set(m68k_read16_map, 0x860000, 0x87ffff, Pico32xMem->dram[b], 0); + cpu68k_map_set(m68k_write8_map, 0x840000, 0x87ffff, + b ? m68k_write8_dram1_ow : m68k_write8_dram0_ow, 1); + cpu68k_map_set(m68k_write16_map, 0x840000, 0x87ffff, + b ? m68k_write16_dram1_ow : m68k_write16_dram0_ow, 1); // SH2 sh2_read8_map[2].addr = sh2_read8_map[6].addr = @@ -1542,8 +1387,6 @@ void PicoMemSetup32x(void) return; } - dmac0 = (void *)&Pico32xMem->sh2_peri_regs[0][0x180 / 4]; - get_bios(); // cartridge area becomes unmapped