X-Git-Url: https://notaz.gp2x.de/cgi-bin/gitweb.cgi?a=blobdiff_plain;f=pico%2F32x%2Fmemory.c;h=b179873909e35f1e981d4cb728419df282c28321;hb=1b3f58449285f3cfcc8ae0e1aefdada44a9e9bc5;hp=902957db4847c5b72bdd559b73d5b517785e0525;hpb=97d3f47fbe0cebff925dfab2a12c047415c85346;p=picodrive.git diff --git a/pico/32x/memory.c b/pico/32x/memory.c index 902957d..b179873 100644 --- a/pico/32x/memory.c +++ b/pico/32x/memory.c @@ -7,29 +7,29 @@ struct Pico32xMem *Pico32xMem; static void bank_switch(int b); -#define MSB8(x) ((x) >> 8) - // poll detection #define POLL_THRESHOLD 6 struct poll_det { - int addr, pc, cnt, flag; + u32 addr, cycles, cyc_max; + int cnt, flag; }; static struct poll_det m68k_poll, sh2_poll[2]; -static int p32x_poll_detect(struct poll_det *pd, u32 a, u32 pc, int is_vdp) +static int p32x_poll_detect(struct poll_det *pd, u32 a, u32 cycles, int is_vdp) { int ret = 0, flag = pd->flag; if (is_vdp) flag <<= 3; - if (a - 2 <= pd->addr && pd->addr <= a + 2 && pd->pc == pc) { + if (a - 2 <= pd->addr && pd->addr <= a + 2 && cycles - pd->cycles < pd->cyc_max) { pd->cnt++; if (pd->cnt > POLL_THRESHOLD) { if (!(Pico32x.emu_flags & flag)) { - elprintf(EL_32X, "%s poll addr %08x @ %06x", - flag == P32XF_68KPOLL ? "m68k" : (flag == P32XF_MSH2POLL ? "msh2" : "ssh2"), a, pc); + elprintf(EL_32X, "%s poll addr %08x, cyc %u", + flag & (P32XF_68KPOLL|P32XF_68KVPOLL) ? "m68k" : + (flag & (P32XF_MSH2POLL|P32XF_MSH2VPOLL) ? "msh2" : "ssh2"), a, cycles - pd->cycles); ret = 1; } Pico32x.emu_flags |= flag; @@ -38,7 +38,7 @@ static int p32x_poll_detect(struct poll_det *pd, u32 a, u32 pc, int is_vdp) else pd->cnt = 0; pd->addr = a; - pd->pc = pc; + pd->cycles = cycles; return ret; } @@ -47,18 +47,24 @@ static int p32x_poll_undetect(struct poll_det *pd, int is_vdp) { int ret = 0, flag = pd->flag; if (is_vdp) - flag <<= 3; - if (pd->cnt > POLL_THRESHOLD) + flag <<= 3; // VDP only + else + flag |= flag << 3; // both + if (Pico32x.emu_flags & flag) { + elprintf(EL_32X, "poll %02x -> %02x", Pico32x.emu_flags, Pico32x.emu_flags & ~flag); ret = 1; - pd->addr = pd->cnt = 0; + } Pico32x.emu_flags &= ~flag; + pd->addr = pd->cnt = 0; return ret; } -void p32x_poll_event(int is_vdp) +void p32x_poll_event(int cpu_mask, int is_vdp) { - p32x_poll_undetect(&sh2_poll[0], is_vdp); - p32x_poll_undetect(&sh2_poll[1], is_vdp); + if (cpu_mask & 1) + p32x_poll_undetect(&sh2_poll[0], is_vdp); + if (cpu_mask & 2) + p32x_poll_undetect(&sh2_poll[1], is_vdp); } // SH2 faking @@ -108,9 +114,13 @@ static void dma_68k2sh2_do(void) if (dmac0->tcr0 != *dreqlen) elprintf(EL_32X|EL_ANOMALY, "tcr0 and dreq len differ: %d != %d", dmac0->tcr0, *dreqlen); + // HACK: assume bus is busy and SH2 is halted + // XXX: use different mechanism for this, not poll det + Pico32x.emu_flags |= P32XF_MSH2POLL; // id ? P32XF_SSH2POLL : P32XF_MSH2POLL; + for (i = 0; i < Pico32x.dmac_ptr && dmac0->tcr0 > 0; i++) { extern void p32x_sh2_write16(u32 a, u32 d, int id); - elprintf(EL_32X|EL_ANOMALY, "dmaw [%08x] %04x, left %d", dmac0->dar0, Pico32x.dmac_fifo[i], *dreqlen); + elprintf(EL_32X, "dmaw [%08x] %04x, left %d", dmac0->dar0, Pico32x.dmac_fifo[i], *dreqlen); p32x_sh2_write16(dmac0->dar0, Pico32x.dmac_fifo[i], 0); dmac0->dar0 += 2; dmac0->tcr0--; @@ -121,8 +131,10 @@ static void dma_68k2sh2_do(void) Pico32x.regs[6 / 2] &= ~P32XS_FULL; if (*dreqlen == 0) Pico32x.regs[6 / 2] &= ~P32XS_68S; // transfer complete - if (dmac0->tcr0 == 0) + if (dmac0->tcr0 == 0) { dmac0->chcr0 |= 2; // DMA has ended normally + p32x_poll_undetect(&sh2_poll[0], 0); + } } // ------------------------------------------------------------------ @@ -132,19 +144,17 @@ static u32 p32x_reg_read16(u32 a) { a &= 0x3e; + if (a == 2) // INTM, INTS + return ((Pico32x.sh2irqi[0] & P32XI_CMD) >> 4) | ((Pico32x.sh2irqi[1] & P32XI_CMD) >> 3); #if 0 if ((a & 0x30) == 0x20) return sh2_comm_faker(a); #else - if ((a & 0x30) == 0x20 && p32x_poll_detect(&m68k_poll, a, SekPc, 0)) { + if ((a & 0x30) == 0x20 && p32x_poll_detect(&m68k_poll, a, SekCyclesDoneT(), 0)) { SekEndRun(16); } #endif -#ifdef FAKE_SH2 - // fake only slave for now - if (a == 0x24 || a == 0x26) - return sh2_comm_faker(a); -#endif + if ((a & 0x30) == 0x30) return p32x_pwm_read16(a); @@ -171,27 +181,41 @@ static void p32x_reg_write8(u32 a, u32 d) switch (a) { case 0: // adapter ctl r[0] = (r[0] & 0x83) | ((d << 8) & P32XS_FM); - break; + return; case 3: // irq ctl if ((d & 1) && !(Pico32x.sh2irqi[0] & P32XI_CMD)) { Pico32x.sh2irqi[0] |= P32XI_CMD; p32x_update_irls(); + SekEndRun(16); } if ((d & 2) && !(Pico32x.sh2irqi[1] & P32XI_CMD)) { Pico32x.sh2irqi[1] |= P32XI_CMD; p32x_update_irls(); + SekEndRun(16); } - break; + return; case 5: // bank d &= 7; if (r[4 / 2] != d) { r[4 / 2] = d; bank_switch(d); } - break; + return; case 7: // DREQ ctl r[6 / 2] = (r[6 / 2] & P32XS_FULL) | (d & (P32XS_68S|P32XS_DMA|P32XS_RV)); - break; + return; + case 0x1b: // TV + r[0x1a / 2] = d; + return; + } + + if ((a & 0x30) == 0x20) { + u8 *r8 = (u8 *)r; + r8[a ^ 1] = d; + if (p32x_poll_undetect(&sh2_poll[0], 0) || p32x_poll_undetect(&sh2_poll[1], 0)) + // if some SH2 is busy waiting, it needs to see the result ASAP + SekEndRun(16); + return; } } @@ -271,6 +295,11 @@ static void p32x_vdp_write8(u32 a, u32 d) if ((r[0] ^ d) & P32XV_PRI) Pico32x.dirty_pal = 1; r[0] = (r[0] & P32XV_nPAL) | (d & 0xff); + if ((d & 3) == 3) + elprintf(EL_32X|EL_ANOMALY, "TODO: mode3"); + break; + case 0x05: // fill len + r[4 / 2] = d & 0xff; break; case 0x0b: d &= 1; @@ -287,6 +316,24 @@ static void p32x_vdp_write8(u32 a, u32 d) static void p32x_vdp_write16(u32 a, u32 d) { + a &= 0x0e; + if (a == 6) { // fill start + Pico32x.vdp_regs[6 / 2] = d; + return; + } + if (a == 8) { // fill data + u16 *dram = Pico32xMem->dram[(Pico32x.vdp_regs[0x0a/2] & P32XV_FS) ^ 1]; + int len = Pico32x.vdp_regs[4 / 2] + 1; + a = Pico32x.vdp_regs[6 / 2]; + while (len--) { + dram[a] = d; + a = (a & 0xff00) | ((a + 1) & 0xff); + } + Pico32x.vdp_regs[6 / 2] = a; + Pico32x.vdp_regs[8 / 2] = d; + return; + } + p32x_vdp_write8(a | 1, d); } @@ -300,7 +347,9 @@ static u32 p32x_sh2reg_read16(u32 a, int cpuid) switch (a) { case 0x00: // adapter/irq ctl - return (r[0] & P32XS_FM) | P32XS2_ADEN | Pico32x.sh2irq_mask[cpuid]; + return (r[0] & P32XS_FM) | Pico32x.sh2_regs[0] | Pico32x.sh2irq_mask[cpuid]; + case 0x04: // H count + return Pico32x.sh2_regs[4 / 2]; case 0x10: // DREQ len return r[a / 2]; } @@ -310,7 +359,7 @@ static u32 p32x_sh2reg_read16(u32 a, int cpuid) return r[a / 2]; // comm port if ((a & 0x30) == 0x20) { - if (p32x_poll_detect(&sh2_poll[cpuid], a, sh2_pc(cpuid), 0)) + if (p32x_poll_detect(&sh2_poll[cpuid], a, ash2_cycles_done(), 0)) ash2_end_run(8); return r[a / 2]; } @@ -325,9 +374,28 @@ static u32 p32x_sh2reg_read16(u32 a, int cpuid) static void p32x_sh2reg_write8(u32 a, u32 d, int cpuid) { a &= 0xff; - if (a == 1) { - Pico32x.sh2irq_mask[cpuid] = d & 0x0f; - p32x_update_irls(); + switch (a) { + case 0: // FM + Pico32x.regs[0] &= ~P32XS_FM; + Pico32x.regs[0] |= (d << 8) & P32XS_FM; + return; + case 1: // + Pico32x.sh2irq_mask[cpuid] = d & 0x8f; + Pico32x.sh2_regs[0] &= ~0x80; + Pico32x.sh2_regs[0] |= d & 0x80; + p32x_update_irls(); + return; + case 5: // H count + Pico32x.sh2_regs[4 / 2] = d & 0xff; + return; + } + + if ((a & 0x30) == 0x20) { + u8 *r8 = (u8 *)Pico32x.regs; + r8[a ^ 1] = d; + p32x_poll_undetect(&m68k_poll, 0); + p32x_poll_undetect(&sh2_poll[cpuid ^ 1], 0); + return; } } @@ -349,11 +417,18 @@ static void p32x_sh2reg_write16(u32 a, u32 d, int cpuid) } switch (a) { + case 0: // FM + Pico32x.regs[0] &= ~P32XS_FM; + Pico32x.regs[0] |= d & P32XS_FM; + break; case 0x14: Pico32x.sh2irqs &= ~P32XI_VRES; goto irls; case 0x16: Pico32x.sh2irqs &= ~P32XI_VINT; goto irls; case 0x18: Pico32x.sh2irqs &= ~P32XI_HINT; goto irls; case 0x1a: Pico32x.sh2irqi[cpuid] &= ~P32XI_CMD; goto irls; - case 0x1c: Pico32x.sh2irqs &= ~P32XI_PWM; goto irls; + case 0x1c: + Pico32x.sh2irqs &= ~P32XI_PWM; + p32x_pwm_irq_check(0); + goto irls; } p32x_sh2reg_write8(a | 1, d, cpuid); @@ -363,7 +438,23 @@ irls: p32x_update_irls(); } -static u32 sh2_peripheral_read(u32 a, int id) +// ------------------------------------------------------------------ +// SH2 internal peripherals +static u32 sh2_peripheral_read8(u32 a, int id) +{ + u8 *r = (void *)Pico32xMem->sh2_peri_regs[id]; + u32 d; + + a &= 0x1ff; + d = r[a]; + if (a == 4) + d = 0x84; // SCI SSR + + elprintf(EL_32X, "%csh2 peri r8 [%08x] %02x @%06x", id ? 's' : 'm', a | ~0x1ff, d, sh2_pc(id)); + return d; +} + +static u32 sh2_peripheral_read32(u32 a, int id) { u32 d; a &= 0x1fc; @@ -373,31 +464,42 @@ static u32 sh2_peripheral_read(u32 a, int id) return d; } -static void sh2_peripheral_write(u32 a, u32 d, int id) +static void sh2_peripheral_write8(u32 a, u32 d, int id) { - unsigned int *r = Pico32xMem->sh2_peri_regs[id]; + u8 *r = (void *)Pico32xMem->sh2_peri_regs[id]; + elprintf(EL_32X, "%csh2 peri w8 [%08x] %02x @%06x", id ? 's' : 'm', a, d, sh2_pc(id)); + + a &= 0x1ff; + r[a] = d; +} + +static void sh2_peripheral_write32(u32 a, u32 d, int id) +{ + u32 *r = Pico32xMem->sh2_peri_regs[id]; elprintf(EL_32X, "%csh2 peri w32 [%08x] %08x @%06x", id ? 's' : 'm', a, d, sh2_pc(id)); a &= 0x1fc; r[a / 4] = d; switch (a) { - // division unit: + // division unit (TODO: verify): case 0x104: // DVDNT: divident L, starts divide elprintf(EL_32X, "%csh2 divide %08x / %08x", id ? 's' : 'm', d, r[0x100 / 4]); if (r[0x100 / 4]) { - r[0x118 / 4] = r[0x110 / 4] = d % r[0x100 / 4]; - r[0x11c / 4] = r[0x114 / 4] = d / r[0x100 / 4]; + signed int divisor = r[0x100 / 4]; + r[0x118 / 4] = r[0x110 / 4] = (signed int)d % divisor; + r[0x104 / 4] = r[0x11c / 4] = r[0x114 / 4] = (signed int)d / divisor; } break; case 0x114: elprintf(EL_32X, "%csh2 divide %08x%08x / %08x @%08x", id ? 's' : 'm', r[0x110 / 4], d, r[0x100 / 4], sh2_pc(id)); if (r[0x100 / 4]) { - long long divident = (long long)r[0x110 / 4] << 32 | d; + signed long long divident = (signed long long)r[0x110 / 4] << 32 | d; + signed int divisor = r[0x100 / 4]; // XXX: undocumented mirroring to 0x118,0x11c? - r[0x118 / 4] = r[0x110 / 4] = divident % r[0x100 / 4]; - r[0x11c / 4] = r[0x114 / 4] = divident / r[0x100 / 4]; + r[0x118 / 4] = r[0x110 / 4] = divident % divisor; + r[0x11c / 4] = r[0x114 / 4] = divident / divisor; } break; } @@ -406,6 +508,10 @@ static void sh2_peripheral_write(u32 a, u32 d, int id) elprintf(EL_32X, "sh2 DMA %08x -> %08x, cnt %d, chcr %04x @%06x", dmac0->sar0, dmac0->dar0, dmac0->tcr0, dmac0->chcr0, sh2_pc(id)); dmac0->tcr0 &= 0xffffff; + + // HACK: assume 68k starts writing soon and end the timeslice + ash2_end_run(16); + // DREQ is only sent after first 4 words are written. // we do multiple of 4 words to avoid messing up alignment if (dmac0->sar0 == 0x20004012 && Pico32x.dmac_ptr && (Pico32x.dmac_ptr & 3) == 0) { @@ -614,38 +720,41 @@ u32 p32x_sh2_read8(u32 a, int id) if (id == 1 && a < sizeof(Pico32xMem->sh2_rom_s)) return Pico32xMem->sh2_rom_s[a ^ 1]; - if ((a & 0x0ffc0000) == 0x06000000) + if ((a & 0xdffc0000) == 0x06000000) return Pico32xMem->sdram[(a & 0x3ffff) ^ 1]; - if ((a & 0x0fc00000) == 0x02000000) + if ((a & 0xdfc00000) == 0x02000000) if ((a & 0x003fffff) < Pico.romsize) return Pico.rom[(a & 0x3fffff) ^ 1]; if ((a & ~0xfff) == 0xc0000000) return Pico32xMem->data_array[id][(a & 0xfff) ^ 1]; - if ((a & 0x0ffe0000) == 0x04000000) { + if ((a & 0xdffe0000) == 0x04000000) { u8 *dram = (u8 *)Pico32xMem->dram[(Pico32x.vdp_regs[0x0a/2] & P32XV_FS) ^ 1]; return dram[(a & 0x1ffff) ^ 1]; } - if ((a & 0x0fffff00) == 0x4000) { + if ((a & 0xdfffff00) == 0x4000) { d = p32x_sh2reg_read16(a, id); goto out_16to8; } - if ((a & 0x0fffff00) == 0x4100) { + if ((a & 0xdfffff00) == 0x4100) { d = p32x_vdp_read16(a); - if (p32x_poll_detect(&sh2_poll[id], a, sh2_pc(id), 1)) + if (p32x_poll_detect(&sh2_poll[id], a, ash2_cycles_done(), 1)) ash2_end_run(8); goto out_16to8; } - if ((a & 0x0fffff00) == 0x4200) { + if ((a & 0xdfffff00) == 0x4200) { d = Pico32xMem->pal[(a & 0x1ff) / 2]; goto out_16to8; } + if ((a & 0xfffffe00) == 0xfffffe00) + return sh2_peripheral_read8(a, id); + elprintf(EL_UIO, "%csh2 unmapped r8 [%08x] %02x @%06x", id ? 's' : 'm', a, d, sh2_pc(id)); return d; @@ -670,32 +779,34 @@ u32 p32x_sh2_read16(u32 a, int id) if (id == 1 && a < sizeof(Pico32xMem->sh2_rom_s)) return *(u16 *)(Pico32xMem->sh2_rom_s + a); - if ((a & 0x0ffc0000) == 0x06000000) + if ((a & 0xdffc0000) == 0x06000000) return ((u16 *)Pico32xMem->sdram)[(a & 0x3ffff) / 2]; - if ((a & 0x0fc00000) == 0x02000000) + if ((a & 0xdfc00000) == 0x02000000) if ((a & 0x003fffff) < Pico.romsize) return ((u16 *)Pico.rom)[(a & 0x3fffff) / 2]; if ((a & ~0xfff) == 0xc0000000) return ((u16 *)Pico32xMem->data_array[id])[(a & 0xfff) / 2]; - if ((a & 0x0ffe0000) == 0x04000000) + if ((a & 0xdffe0000) == 0x04000000) return Pico32xMem->dram[(Pico32x.vdp_regs[0x0a/2] & P32XV_FS) ^ 1][(a & 0x1ffff) / 2]; - if ((a & 0x0fffff00) == 0x4000) { + if ((a & 0xdfffff00) == 0x4000) { d = p32x_sh2reg_read16(a, id); + if (!(EL_LOGMASK & EL_PWM) && (a & 0x30) == 0x30) // hide PWM + return d; goto out; } - if ((a & 0x0fffff00) == 0x4100) { + if ((a & 0xdfffff00) == 0x4100) { d = p32x_vdp_read16(a); - if (p32x_poll_detect(&sh2_poll[id], a, sh2_pc(id), 1)) + if (p32x_poll_detect(&sh2_poll[id], a, ash2_cycles_done(), 1)) ash2_end_run(8); goto out; } - if ((a & 0x0fffff00) == 0x4200) { + if ((a & 0xdfffff00) == 0x4200) { d = Pico32xMem->pal[(a & 0x1ff) / 2]; goto out; } @@ -713,7 +824,7 @@ out: u32 p32x_sh2_read32(u32 a, int id) { if ((a & 0xfffffe00) == 0xfffffe00) - return sh2_peripheral_read(a, id); + return sh2_peripheral_read32(a, id); // elprintf(EL_UIO, "sh2 r32 [%08x] %08x @%06x", a, d, ash2_pc()); return (p32x_sh2_read16(a, id) << 16) | p32x_sh2_read16(a + 2, id); @@ -721,19 +832,22 @@ u32 p32x_sh2_read32(u32 a, int id) void p32x_sh2_write8(u32 a, u32 d, int id) { - if ((a & 0x0ffffc00) == 0x4000) + if ((a & 0xdffffc00) == 0x4000) elprintf(EL_32X, "%csh2 w8 [%08x] %02x @%06x", id ? 's' : 'm', a, d & 0xff, sh2_pc(id)); - if ((a & 0x0ffc0000) == 0x06000000) { + if ((a & 0xdffc0000) == 0x06000000) { Pico32xMem->sdram[(a & 0x3ffff) ^ 1] = d; return; } - if ((a & 0x0ffe0000) == 0x04000000) { - u8 *dram = (u8 *)Pico32xMem->dram[(Pico32x.vdp_regs[0x0a/2] & P32XV_FS) ^ 1]; - dram[(a & 0x1ffff) ^ 1] = d; - return; + if ((a & 0xdffc0000) == 0x04000000) { + u8 *dram; + if (!(a & 0x20000) || d) { + dram = (u8 *)Pico32xMem->dram[(Pico32x.vdp_regs[0x0a/2] & P32XV_FS) ^ 1]; + dram[(a & 0x1ffff) ^ 1] = d; + return; + } } if ((a & ~0xfff) == 0xc0000000) { @@ -741,27 +855,36 @@ void p32x_sh2_write8(u32 a, u32 d, int id) return; } - if ((a & 0x0fffff00) == 0x4100) { + if ((a & 0xdfffff00) == 0x4100) { p32x_vdp_write8(a, d); return; } - if ((a & 0x0fffff00) == 0x4000) { + if ((a & 0xdfffff00) == 0x4000) { p32x_sh2reg_write8(a, d, id); return; } + if ((a & 0xfffffe00) == 0xfffffe00) { + sh2_peripheral_write8(a, d, id); + return; + } + elprintf(EL_UIO, "%csh2 unmapped w8 [%08x] %02x @%06x", id ? 's' : 'm', a, d & 0xff, sh2_pc(id)); } void p32x_sh2_write16(u32 a, u32 d, int id) { - if ((a & 0x0ffffc00) == 0x4000) + if ((a & 0xdffffc00) == 0x4000 && ((EL_LOGMASK & EL_PWM) || (a & 0x30) != 0x30)) // hide PWM elprintf(EL_32X, "%csh2 w16 [%08x] %04x @%06x", id ? 's' : 'm', a, d & 0xffff, sh2_pc(id)); - if ((a & 0x0ffc0000) == 0x06000000) { + // ignore "Associative purge space" + if ((a & 0xf8000000) == 0x40000000) + return; + + if ((a & 0xdffc0000) == 0x06000000) { ((u16 *)Pico32xMem->sdram)[(a & 0x3ffff) / 2] = d; return; } @@ -771,23 +894,32 @@ void p32x_sh2_write16(u32 a, u32 d, int id) return; } - if ((a & 0x0ffe0000) == 0x04000000) { - Pico32xMem->dram[(Pico32x.vdp_regs[0x0a/2] & P32XV_FS) ^ 1][(a & 0x1ffff) / 2] = d; + if ((a & 0xdffc0000) == 0x04000000) { + u16 *pd = &Pico32xMem->dram[(Pico32x.vdp_regs[0x0a/2] & P32XV_FS) ^ 1][(a & 0x1ffff) / 2]; + if (!(a & 0x20000)) { + *pd = d; + return; + } + // overwrite + if (!(d & 0xff00)) d |= *pd & 0xff00; + if (!(d & 0x00ff)) d |= *pd & 0x00ff; + *pd = d; return; } - if ((a & 0x0fffff00) == 0x4100) { + if ((a & 0xdfffff00) == 0x4100) { + sh2_poll[id].cnt = 0; // for poll before VDP accesses p32x_vdp_write16(a, d); return; } - if ((a & 0x0ffffe00) == 0x4200) { + if ((a & 0xdffffe00) == 0x4200) { Pico32xMem->pal[(a & 0x1ff) / 2] = d; Pico32x.dirty_pal = 1; return; } - if ((a & 0x0fffff00) == 0x4000) { + if ((a & 0xdfffff00) == 0x4000) { p32x_sh2reg_write16(a, d, id); return; } @@ -799,7 +931,7 @@ void p32x_sh2_write16(u32 a, u32 d, int id) void p32x_sh2_write32(u32 a, u32 d, int id) { if ((a & 0xfffffe00) == 0xfffffe00) { - sh2_peripheral_write(a, d, id); + sh2_peripheral_write32(a, d, id); return; } @@ -902,7 +1034,10 @@ void PicoMemSetup32x(void) // setup poll detector m68k_poll.flag = P32XF_68KPOLL; + m68k_poll.cyc_max = 64; sh2_poll[0].flag = P32XF_MSH2POLL; + sh2_poll[0].cyc_max = 16; sh2_poll[1].flag = P32XF_SSH2POLL; + sh2_poll[1].cyc_max = 16; }