X-Git-Url: https://notaz.gp2x.de/cgi-bin/gitweb.cgi?a=blobdiff_plain;f=pico%2F32x%2Fsh2soc.c;h=62423d136135055d6c8df597a9162effb2e21fc7;hb=87650acd75bc29d6b5a6dca6647545b043403d23;hp=3802aa92a9c834fdfe7df3afb72fa7058aa09228;hpb=61801d5bc85c82afc5548fc25fc890bb56f4e763;p=picodrive.git diff --git a/pico/32x/sh2soc.c b/pico/32x/sh2soc.c index 3802aa9..62423d1 100644 --- a/pico/32x/sh2soc.c +++ b/pico/32x/sh2soc.c @@ -73,7 +73,7 @@ static void dmac_transfer_complete(SH2 *sh2, struct dma_chan *chan) { chan->chcr |= DMA_TE; // DMA has ended normally - p32x_sh2_poll_event(sh2, SH2_STATE_SLEEP, SekCyclesDoneT()); + p32x_sh2_poll_event(sh2, SH2_STATE_SLEEP, SekCyclesDone()); if (chan->chcr & DMA_IE) dmac_te_irq(sh2, chan); } @@ -128,7 +128,7 @@ static void dmac_transfer_one(SH2 *sh2, struct dma_chan *chan) // DMA trigger by SH2 register write static void dmac_trigger(SH2 *sh2, struct dma_chan *chan) { - elprintf(EL_32XP, "sh2 DMA %08x->%08x, cnt %d, chcr %04x @%06x", + elprintf_sh2(sh2, EL_32XP, "DMA %08x->%08x, cnt %d, chcr %04x @%06x", chan->sar, chan->dar, chan->tcr, chan->chcr, sh2->pc); chan->tcr &= 0xffffff; @@ -150,6 +150,10 @@ static void dmac_trigger(SH2 *sh2, struct dma_chan *chan) return; } + // DREQ1 + if ((chan->dar & 0xc7fffff0) == 0x00004030) + return; + elprintf(EL_32XP|EL_ANOMALY, "unhandled DMA: " "%08x->%08x, cnt %d, chcr %04x @%06x", chan->sar, chan->dar, chan->tcr, chan->chcr, sh2->pc); @@ -279,7 +283,7 @@ static void sci_trigger(SH2 *sh2, u8 *r) if (PREG8(r, 2) & 0x80) { // TIE - tx irq enabled int level = PREG8(oregs, 0x60) >> 4; int vector = PREG8(oregs, 0x64) & 0x7f; - elprintf(EL_32XP, "SCI tx irq (%d, %d)", + elprintf_sh2(sh2, EL_32XP, "SCI tx irq (%d, %d)", level, vector); sh2_internal_irq(sh2, level, vector); } @@ -287,7 +291,7 @@ static void sci_trigger(SH2 *sh2, u8 *r) if (PREG8(oregs, 2) & 0x40) { // RIE - rx irq enabled int level = PREG8(oregs, 0x60) >> 4; int vector = PREG8(oregs, 0x63) & 0x7f; - elprintf(EL_32XP, "SCI rx irq (%d, %d)", + elprintf_sh2(sh2->other_sh2, EL_32XP, "SCI rx irq (%d, %d)", level, vector); sh2_internal_irq(sh2->other_sh2, level, vector); } @@ -298,8 +302,8 @@ void REGPARM(3) sh2_peripheral_write8(u32 a, u32 d, SH2 *sh2) u8 *r = (void *)sh2->peri_regs; u8 old; - elprintf(EL_32XP, "%csh2 peri w8 [%08x] %02x @%06x", - sh2->is_slave ? 's' : 'm', a, d, sh2_pc(sh2)); + elprintf_sh2(sh2, EL_32XP, "peri w8 [%08x] %02x @%06x", + a, d, sh2_pc(sh2)); a &= 0x1ff; old = PREG8(r, a); @@ -354,7 +358,7 @@ void REGPARM(3) sh2_peripheral_write16(u32 a, u32 d, SH2 *sh2) r[(a / 2) ^ 1] = d; } -void sh2_peripheral_write32(u32 a, u32 d, SH2 *sh2) +void REGPARM(3) sh2_peripheral_write32(u32 a, u32 d, SH2 *sh2) { u32 *r = sh2->peri_regs; u32 old; @@ -435,7 +439,7 @@ static void dreq0_do(SH2 *sh2, struct dma_chan *chan) sh2->state |= SH2_STATE_SLEEP; for (i = 0; i < Pico32x.dmac0_fifo_ptr && chan->tcr > 0; i++) { - elprintf(EL_32XP, "dreq0 [%08x] %04x, dreq_len %d", + elprintf_sh2(sh2, EL_32XP, "dreq0 [%08x] %04x, dreq_len %d", chan->dar, Pico32x.dmac_fifo[i], dreqlen); p32x_sh2_write16(chan->dar, Pico32x.dmac_fifo[i], sh2); chan->dar += 2; @@ -497,8 +501,19 @@ void p32x_dreq1_trigger(void) hit = 1; } - if (!hit) - elprintf(EL_32XP|EL_ANOMALY, "dreq1: nobody cared"); + // debug +#if (EL_LOGMASK & (EL_32XP|EL_ANOMALY)) + { + static int miss_count; + if (!hit) { + if (++miss_count == 4) + elprintf(EL_32XP|EL_ANOMALY, "dreq1: nobody cared"); + } + else + miss_count = 0; + } +#endif + (void)hit; } // vim:shiftwidth=2:ts=2:expandtab