X-Git-Url: https://notaz.gp2x.de/cgi-bin/gitweb.cgi?a=blobdiff_plain;f=pico%2Fcd%2Fmemory.c;h=1c5dcf94ccea024c7b28af64eaa0da22d58d022b;hb=48c9e01be8ad93a7902e22f9ad07aba4527e6572;hp=1e6a9c9e90e619f4d4d5e7e76a6c0b6d324eed44;hpb=45f2f245f51ef0c0d37df3c998595c132bfcaffa;p=picodrive.git diff --git a/pico/cd/memory.c b/pico/cd/memory.c index 1e6a9c9..1c5dcf9 100644 --- a/pico/cd/memory.c +++ b/pico/cd/memory.c @@ -1,16 +1,18 @@ -// Memory I/O handlers for Sega/Mega CD. -// (c) Copyright 2007-2009, Grazvydas "notaz" Ignotas +/* + * Memory I/O handlers for Sega/Mega CD. + * (C) notaz, 2007-2009 + * + * This work is licensed under the terms of MAME license. + * See COPYING file in the top-level directory. + */ #include "../pico_int.h" #include "../memory.h" -#include "gfx_cd.h" -#include "pcm.h" - -unsigned long s68k_read8_map [0x1000000 >> M68K_MEM_SHIFT]; -unsigned long s68k_read16_map [0x1000000 >> M68K_MEM_SHIFT]; -unsigned long s68k_write8_map [0x1000000 >> M68K_MEM_SHIFT]; -unsigned long s68k_write16_map[0x1000000 >> M68K_MEM_SHIFT]; +uptr s68k_read8_map [0x1000000 >> M68K_MEM_SHIFT]; +uptr s68k_read16_map [0x1000000 >> M68K_MEM_SHIFT]; +uptr s68k_write8_map [0x1000000 >> M68K_MEM_SHIFT]; +uptr s68k_write16_map[0x1000000 >> M68K_MEM_SHIFT]; MAKE_68K_READ8(s68k_read8, s68k_read8_map) MAKE_68K_READ16(s68k_read16, s68k_read16_map) @@ -21,22 +23,79 @@ MAKE_68K_WRITE32(s68k_write32, s68k_write16_map) // ----------------------------------------------------------------- +// provided by ASM code: +#ifdef _ASM_CD_MEMORY_C +u32 PicoReadS68k8_pr(u32 a); +u32 PicoReadS68k16_pr(u32 a); +void PicoWriteS68k8_pr(u32 a, u32 d); +void PicoWriteS68k16_pr(u32 a, u32 d); + +u32 PicoReadM68k8_cell0(u32 a); +u32 PicoReadM68k8_cell1(u32 a); +u32 PicoReadM68k16_cell0(u32 a); +u32 PicoReadM68k16_cell1(u32 a); +void PicoWriteM68k8_cell0(u32 a, u32 d); +void PicoWriteM68k8_cell1(u32 a, u32 d); +void PicoWriteM68k16_cell0(u32 a, u32 d); +void PicoWriteM68k16_cell1(u32 a, u32 d); + +u32 PicoReadS68k8_dec0(u32 a); +u32 PicoReadS68k8_dec1(u32 a); +u32 PicoReadS68k16_dec0(u32 a); +u32 PicoReadS68k16_dec1(u32 a); +void PicoWriteS68k8_dec_m0b0(u32 a, u32 d); +void PicoWriteS68k8_dec_m1b0(u32 a, u32 d); +void PicoWriteS68k8_dec_m2b0(u32 a, u32 d); +void PicoWriteS68k8_dec_m0b1(u32 a, u32 d); +void PicoWriteS68k8_dec_m1b1(u32 a, u32 d); +void PicoWriteS68k8_dec_m2b1(u32 a, u32 d); +void PicoWriteS68k16_dec_m0b0(u32 a, u32 d); +void PicoWriteS68k16_dec_m1b0(u32 a, u32 d); +void PicoWriteS68k16_dec_m2b0(u32 a, u32 d); +void PicoWriteS68k16_dec_m0b1(u32 a, u32 d); +void PicoWriteS68k16_dec_m1b1(u32 a, u32 d); +void PicoWriteS68k16_dec_m2b1(u32 a, u32 d); +#endif + +static void remap_prg_window(u32 r1, u32 r3); +static void remap_word_ram(u32 r3); + // poller detection #define POLL_LIMIT 16 -#define POLL_CYCLES 124 -unsigned int s68k_poll_adclk, s68k_poll_cnt; +#define POLL_CYCLES 64 + +void m68k_comm_check(u32 a) +{ + pcd_sync_s68k(SekCyclesDone(), 0); + if (a >= 0x0e && !Pico_mcd->m.need_sync) { + // there are cases when slave updates comm and only switches RAM + // over after that (mcd1b), so there must be a resync.. + SekEndRun(64); + Pico_mcd->m.need_sync = 1; + } + if (SekNotPolling || a != Pico_mcd->m.m68k_poll_a) { + Pico_mcd->m.m68k_poll_a = a; + Pico_mcd->m.m68k_poll_cnt = 0; + SekNotPolling = 0; + return; + } + Pico_mcd->m.m68k_poll_cnt++; +} #ifndef _ASM_CD_MEMORY_C static u32 m68k_reg_read16(u32 a) { - u32 d=0; + u32 d = 0; a &= 0x3e; switch (a) { case 0: - d = ((Pico_mcd->s68k_regs[0x33]<<13)&0x8000) | Pico_mcd->m.busreq; // here IFL2 is always 0, just like in Gens + // here IFL2 is always 0, just like in Gens + d = ((Pico_mcd->s68k_regs[0x33] << 13) & 0x8000) + | Pico_mcd->m.busreq; goto end; case 2: + m68k_comm_check(a); d = (Pico_mcd->s68k_regs[a]<<8) | (Pico_mcd->s68k_regs[a+1]&0xc7); elprintf(EL_CDREG3, "m68k_regs r3: %02x @%06x", (u8)d, SekPc); goto end; @@ -47,19 +106,23 @@ static u32 m68k_reg_read16(u32 a) d = *(u16 *)(Pico_mcd->bios + 0x72); goto end; case 8: - d = Read_CDC_Host(0); + d = cdc_host_r(); goto end; case 0xA: elprintf(EL_UIO, "m68k FIXME: reserved read"); goto end; - case 0xC: - d = Pico_mcd->m.timer_stopwatch >> 16; + case 0xC: // 384 cycle stopwatch timer + // ugh.. + d = pcd_cycles_m68k_to_s68k(SekCyclesDone()); + d = (d - Pico_mcd->m.stopwatch_base_c) / 384; + d &= 0x0fff; elprintf(EL_CDREGS, "m68k stopwatch timer read (%04x)", d); goto end; } if (a < 0x30) { // comm flag/cmd/status (0xE-0x2F) + m68k_comm_check(a); d = (Pico_mcd->s68k_regs[a]<<8) | Pico_mcd->s68k_regs[a+1]; goto end; } @@ -67,7 +130,6 @@ static u32 m68k_reg_read16(u32 a) elprintf(EL_UIO, "m68k_regs FIXME invalid read @ %02x", a); end: - return d; } #endif @@ -83,22 +145,35 @@ void m68k_reg_write8(u32 a, u32 d) switch (a) { case 0: d &= 1; - if ((d&1) && (Pico_mcd->s68k_regs[0x33]&(1<<2))) { elprintf(EL_INTS, "m68k: s68k irq 2"); SekInterruptS68k(2); } + if (d && (Pico_mcd->s68k_regs[0x33] & PCDS_IEN2)) { + elprintf(EL_INTS, "m68k: s68k irq 2"); + pcd_sync_s68k(SekCyclesDone(), 0); + SekInterruptS68k(2); + } return; case 1: d &= 3; - if (!(d&1)) Pico_mcd->m.state_flags |= 1; // reset pending, needed to be sure we fetch the right vectors on reset - if ( (Pico_mcd->m.busreq&1) != (d&1)) elprintf(EL_INTSW, "m68k: s68k reset %i", !(d&1)); - if ( (Pico_mcd->m.busreq&2) != (d&2)) elprintf(EL_INTSW, "m68k: s68k brq %i", (d&2)>>1); - if ((Pico_mcd->m.state_flags&1) && (d&3)==1) { - SekResetS68k(); // S68k comes out of RESET or BRQ state - Pico_mcd->m.state_flags&=~1; - elprintf(EL_CDREGS, "m68k: resetting s68k, cycles=%i", SekCyclesLeft); - } + dold = Pico_mcd->m.busreq; if (!(d & 1)) - d |= 2; // verified: reset also gives bus - if ((d ^ Pico_mcd->m.busreq) & 2) - PicoMemRemapCD(Pico_mcd->s68k_regs[3]); + d |= 2; // verified: can't release bus on reset + if (dold == d) + return; + + pcd_sync_s68k(SekCyclesDone(), 0); + + if ((dold ^ d) & 1) + elprintf(EL_INTSW, "m68k: s68k reset %i", !(d&1)); + if (!(d & 1)) + Pico_mcd->m.state_flags |= PCD_ST_S68K_RST; + else if (d == 1 && (Pico_mcd->m.state_flags & PCD_ST_S68K_RST)) { + Pico_mcd->m.state_flags &= ~PCD_ST_S68K_RST; + elprintf(EL_CDREGS, "m68k: resetting s68k"); + SekResetS68k(); + } + if ((dold ^ d) & 2) { + elprintf(EL_INTSW, "m68k: s68k brq %i", d >> 1); + remap_prg_window(d, Pico_mcd->s68k_regs[3]); + } Pico_mcd->m.busreq = d; return; case 2: @@ -108,30 +183,25 @@ void m68k_reg_write8(u32 a, u32 d) case 3: dold = Pico_mcd->s68k_regs[3]; elprintf(EL_CDREG3, "m68k_regs w3: %02x @%06x", (u8)d, SekPc); - //if ((Pico_mcd->s68k_regs[3]&4) != (d&4)) dprintf("m68k: ram mode %i mbit", (d&4) ? 1 : 2); - //if ((Pico_mcd->s68k_regs[3]&2) != (d&2)) dprintf("m68k: %s", (d&4) ? ((d&2) ? "word swap req" : "noop?") : - // ((d&2) ? "word ram to s68k" : "word ram to m68k")); - if (dold & 4) { // 1M mode - d ^= 2; // writing 0 to DMNA actually sets it, 1 does nothing - } else { - if ((d ^ dold) & d & 2) { // DMNA is being set - dold &= ~1; // return word RAM to s68k - /* Silpheed hack: bset(w3), r3, btst, bne, r3 */ - SekEndRun(20+16+10+12+16); - } - } - Pico_mcd->s68k_regs[3] = (d & 0xc2) | (dold & 0x1f); if ((d ^ dold) & 0xc0) { - elprintf(EL_CDREGS, "m68k: prg bank: %i -> %i", (Pico_mcd->s68k_regs[a]>>6), ((d>>6)&3)); - PicoMemRemapCD(Pico_mcd->s68k_regs[3]); + elprintf(EL_CDREGS, "m68k: prg bank: %i -> %i", + (Pico_mcd->s68k_regs[a]>>6), ((d>>6)&3)); + remap_prg_window(Pico_mcd->m.busreq, d); } -#ifdef USE_POLL_DETECT - if ((s68k_poll_adclk&0xfe) == 2 && s68k_poll_cnt > POLL_LIMIT) { - SekSetStopS68k(0); s68k_poll_adclk = 0; - elprintf(EL_CDPOLL, "s68k poll release, a=%02x", a); + + // 2M mode state is tracked regardless of current mode + if (d & 2) { + Pico_mcd->m.dmna_ret_2m |= 2; + Pico_mcd->m.dmna_ret_2m &= ~1; } -#endif - return; + if (dold & 4) { // 1M mode + d ^= 2; // 0 sets DMNA, 1 does nothing + d = (d & 0xc2) | (dold & 0x1f); + } + else + d = (d & 0xc0) | (dold & 0x1c) | Pico_mcd->m.dmna_ret_2m; + + goto write_comm; case 6: Pico_mcd->bios[0x72 + 1] = d; // simple hint vector changer return; @@ -140,58 +210,58 @@ void m68k_reg_write8(u32 a, u32 d) elprintf(EL_CDREGS, "hint vector set to %04x%04x", ((u16 *)Pico_mcd->bios)[0x70/2], ((u16 *)Pico_mcd->bios)[0x72/2]); return; - case 0xf: - d = (d << 1) | ((d >> 7) & 1); // rol8 1 (special case) - case 0xe: - //dprintf("m68k: comm flag: %02x", d); - Pico_mcd->s68k_regs[0xe] = d; -#ifdef USE_POLL_DETECT - if ((s68k_poll_adclk&0xfe) == 0xe && s68k_poll_cnt > POLL_LIMIT) { - SekSetStopS68k(0); s68k_poll_adclk = 0; - elprintf(EL_CDPOLL, "s68k poll release, a=%02x", a); - } -#endif - return; + case 0x0f: + a = 0x0e; + case 0x0e: + goto write_comm; } - if ((a&0xf0) == 0x10) { - Pico_mcd->s68k_regs[a] = d; -#ifdef USE_POLL_DETECT - if ((a&0xfe) == (s68k_poll_adclk&0xfe) && s68k_poll_cnt > POLL_LIMIT) { - SekSetStopS68k(0); s68k_poll_adclk = 0; - elprintf(EL_CDPOLL, "s68k poll release, a=%02x", a); - } -#endif - return; - } + if ((a&0xf0) == 0x10) + goto write_comm; elprintf(EL_UIO, "m68k FIXME: invalid write? [%02x] %02x", a, d); + return; + +write_comm: + if (d == Pico_mcd->s68k_regs[a]) + return; + + pcd_sync_s68k(SekCyclesDone(), 0); + Pico_mcd->s68k_regs[a] = d; + if (Pico_mcd->m.s68k_poll_a == (a & ~1)) + { + if (Pico_mcd->m.s68k_poll_cnt > POLL_LIMIT) { + elprintf(EL_CDPOLL, "s68k poll release, a=%02x", a); + SekSetStopS68k(0); + } + Pico_mcd->m.s68k_poll_a = 0; + } } -#ifndef _ASM_CD_MEMORY_C -static -#endif u32 s68k_poll_detect(u32 a, u32 d) { #ifdef USE_POLL_DETECT - // needed mostly for Cyclone, which doesn't always check it's cycle counter - if (SekIsStoppedS68k()) return d; - // polling detection - if (a == (s68k_poll_adclk&0xff)) { - unsigned int clkdiff = SekCyclesDoneS68k() - (s68k_poll_adclk>>8); + u32 cycles, cnt = 0; + if (SekIsStoppedS68k()) + return d; + + cycles = SekCyclesDoneS68k(); + if (!SekNotPolling && a == Pico_mcd->m.s68k_poll_a) { + u32 clkdiff = cycles - Pico_mcd->m.s68k_poll_clk; if (clkdiff <= POLL_CYCLES) { - s68k_poll_cnt++; - //printf("-- diff: %u, cnt = %i\n", clkdiff, s68k_poll_cnt); - if (s68k_poll_cnt > POLL_LIMIT) { + cnt = Pico_mcd->m.s68k_poll_cnt + 1; + //printf("-- diff: %u, cnt = %i\n", clkdiff, cnt); + if (Pico_mcd->m.s68k_poll_cnt > POLL_LIMIT) { SekSetStopS68k(1); - elprintf(EL_CDPOLL, "s68k poll detected @ %06x, a=%02x", SekPcS68k, a); + elprintf(EL_CDPOLL, "s68k poll detected @%06x, a=%02x", + SekPcS68k, a); } - s68k_poll_adclk = (SekCyclesDoneS68k() << 8) | a; - return d; } } - s68k_poll_adclk = (SekCyclesDoneS68k() << 8) | a; - s68k_poll_cnt = 0; + Pico_mcd->m.s68k_poll_a = a; + Pico_mcd->m.s68k_poll_clk = cycles; + Pico_mcd->m.s68k_poll_cnt = cnt; + SekNotPollingS68k = 0; #endif return d; } @@ -222,11 +292,13 @@ u32 s68k_reg_read16(u32 a) elprintf(EL_CDREG3, "s68k_regs r3: %02x @%06x", (u8)d, SekPcS68k); return s68k_poll_detect(a, d); case 6: - return CDC_Read_Reg(); + return cdc_reg_r(); case 8: - return Read_CDC_Host(1); // Gens returns 0 here on byte reads + return cdc_host_r(); case 0xC: - d = Pico_mcd->m.timer_stopwatch >> 16; + d = SekCyclesDoneS68k() - Pico_mcd->m.stopwatch_base_c; + d /= 384; + d &= 0x0fff; elprintf(EL_CDREGS, "s68k stopwatch timer read (%04x)", d); return d; case 0x30: @@ -263,6 +335,10 @@ void s68k_reg_write8(u32 a, u32 d) { // Warning: d might have upper bits set switch (a) { + case 1: + if (!(d & 1)) + pcd_soft_reset(); + return; case 2: return; // only m68k can change WP case 3: { @@ -270,41 +346,36 @@ void s68k_reg_write8(u32 a, u32 d) elprintf(EL_CDREG3, "s68k_regs w3: %02x @%06x", (u8)d, SekPcS68k); d &= 0x1d; d |= dold & 0xc2; + + // 2M mode state + if (d & 1) { + Pico_mcd->m.dmna_ret_2m |= 1; + Pico_mcd->m.dmna_ret_2m &= ~2; // DMNA clears + } + if (d & 4) { - if ((d ^ dold) & 5) { - d &= ~2; // in case of mode or bank change we clear DMNA (m68k req) bit - PicoMemRemapCD(d); - } -#ifdef _ASM_CD_MEMORY_C - if ((d ^ dold) & 0x1d) - PicoMemResetCDdecode(d); -#endif if (!(dold & 4)) { elprintf(EL_CDREG3, "wram mode 2M->1M"); wram_2M_to_1M(Pico_mcd->word_ram2M); } + + if ((d ^ dold) & 0x1d) + remap_word_ram(d); + + if ((d ^ dold) & 0x05) + d &= ~2; // clear DMNA - swap complete } else { if (dold & 4) { elprintf(EL_CDREG3, "wram mode 1M->2M"); - if (!(d&1)) { // it didn't set the ret bit, which means it doesn't want to give WRAM to m68k - d &= ~3; - d |= (dold&1) ? 2 : 1; // then give it to the one which had bank0 in 1M mode - } wram_1M_to_2M(Pico_mcd->word_ram2M); - PicoMemRemapCD(d); + remap_word_ram(d); } - // s68k can only set RET, writing 0 has no effect - else if ((dold ^ d) & d & 1) { // RET being set - SekEndRunS68k(20+16+10+12+16); // see DMNA case - } else - d |= dold & 1; - if (d & 1) - d &= ~2; // DMNA clears + d = (d & ~3) | Pico_mcd->m.dmna_ret_2m; } - break; + goto write_comm; } case 4: elprintf(EL_CDREGS, "s68k CDC dest: %x", d&7); @@ -314,27 +385,39 @@ void s68k_reg_write8(u32 a, u32 d) //dprintf("s68k CDC reg addr: %x", d&0xf); break; case 7: - CDC_Write_Reg(d); + cdc_reg_w(d & 0xff); return; case 0xa: elprintf(EL_CDREGS, "s68k set CDC dma addr"); break; case 0xc: - case 0xd: - elprintf(EL_CDREGS, "s68k set stopwatch timer"); - Pico_mcd->m.timer_stopwatch = 0; - return; - case 0xe: - Pico_mcd->s68k_regs[0xf] = (d>>1) | (d<<7); // ror8 1, Gens note: Dragons lair + case 0xd: // 384 cycle stopwatch timer + elprintf(EL_CDREGS|EL_CD, "s68k clear stopwatch (%x)", d); + // does this also reset internal 384 cycle counter? + Pico_mcd->m.stopwatch_base_c = SekCyclesDoneS68k(); return; - case 0x31: - elprintf(EL_CDREGS, "s68k set int3 timer: %02x", d); - Pico_mcd->m.timer_int3 = (d & 0xff) << 16; + case 0x0e: + a = 0x0f; + case 0x0f: + goto write_comm; + case 0x31: // 384 cycle int3 timer + d &= 0xff; + elprintf(EL_CDREGS|EL_CD, "s68k set int3 timer: %02x", d); + Pico_mcd->s68k_regs[a] = (u8) d; + if (d) // d or d+1?? + pcd_event_schedule_s68k(PCD_EVENT_TIMER3, d * 384); + else + pcd_event_schedule(0, PCD_EVENT_TIMER3, 0); break; case 0x33: // IRQ mask - elprintf(EL_CDREGS, "s68k irq mask: %02x", d); - if ((d&(1<<4)) && (Pico_mcd->s68k_regs[0x37]&4) && !(Pico_mcd->s68k_regs[0x33]&(1<<4))) { - CDD_Export_Status(); + elprintf(EL_CDREGS|EL_CD, "s68k irq mask: %02x", d); + d &= 0x7e; + if ((d ^ Pico_mcd->s68k_regs[0x33]) & d & PCDS_IEN4) { + // XXX: emulate pending irq instead? + if (Pico_mcd->s68k_regs[0x37] & 4) { + elprintf(EL_INTS, "cdd export irq 4 (unmask)"); + SekInterruptS68k(4); + } } break; case 0x34: // fader @@ -344,18 +427,44 @@ void s68k_reg_write8(u32 a, u32 d) return; // d/m bit is unsetable case 0x37: { u32 d_old = Pico_mcd->s68k_regs[0x37]; - Pico_mcd->s68k_regs[0x37] = d&7; + Pico_mcd->s68k_regs[0x37] = d & 7; if ((d&4) && !(d_old&4)) { - CDD_Export_Status(); + // ?? + pcd_event_schedule_s68k(PCD_EVENT_CDC, 12500000/75); + + if (Pico_mcd->s68k_regs[0x33] & PCDS_IEN4) { + elprintf(EL_INTS, "cdd export irq 4"); + SekInterruptS68k(4); + } } return; } case 0x4b: - Pico_mcd->s68k_regs[a] = (u8) d; - CDD_Import_Command(); + Pico_mcd->s68k_regs[a] = 0; // (u8) d; ? + cdd_process(); + { + static const char *nm[] = + { "stat", "stop", "read_toc", "play", + "seek", "???", "pause", "resume", + "ff", "fr", "tjump", "???", + "close","open", "???", "???" }; + u8 *c = &Pico_mcd->s68k_regs[0x42]; + u8 *s = &Pico_mcd->s68k_regs[0x38]; + elprintf(EL_CD, + "CDD command: %02x %02x %02x %02x %02x %02x %02x %02x %12s", + c[0], c[1], c[2], c[3], c[4], c[5], c[6], c[7], nm[c[0] & 0x0f]); + elprintf(EL_CD, + "CDD status: %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x", + s[0], s[1], s[2], s[3], s[4], s[5], s[6], s[7], s[8], s[9]); + } + return; + case 0x58: return; } + if ((a&0x1f0) == 0x20) + goto write_comm; + if ((a&0x1f0) == 0x10 || (a >= 0x38 && a < 0x42)) { elprintf(EL_UIO, "s68k FIXME: invalid write @ %02x?", a); @@ -363,6 +472,72 @@ void s68k_reg_write8(u32 a, u32 d) } Pico_mcd->s68k_regs[a] = (u8) d; + return; + +write_comm: + Pico_mcd->s68k_regs[a] = (u8) d; + if (Pico_mcd->m.m68k_poll_cnt) + SekEndRunS68k(0); + Pico_mcd->m.m68k_poll_cnt = 0; +} + +void s68k_reg_write16(u32 a, u32 d) +{ + u8 *r = Pico_mcd->s68k_regs; + + if ((a & 0x1f0) == 0x20) + goto write_comm; + + switch (a) { + case 0x0e: + // special case, 2 byte writes would be handled differently + // TODO: verify + r[0xf] = d; + return; + case 0x58: // stamp data size + r[0x59] = d & 7; + return; + case 0x5a: // stamp map base address + r[0x5a] = d >> 8; + r[0x5b] = d & 0xe0; + return; + case 0x5c: // V cell size + r[0x5d] = d & 0x1f; + return; + case 0x5e: // image buffer start address + r[0x5e] = d >> 8; + r[0x5f] = d & 0xf8; + return; + case 0x60: // image buffer offset + r[0x61] = d & 0x3f; + return; + case 0x62: // h dot size + r[0x62] = (d >> 8) & 1; + r[0x63] = d; + return; + case 0x64: // v dot size + r[0x65] = d; + return; + case 0x66: // trace vector base address + d &= 0xfffe; + r[0x66] = d >> 8; + r[0x67] = d; + gfx_start(d); + return; + default: + break; + } + + s68k_reg_write8(a, d >> 8); + s68k_reg_write8(a + 1, d & 0xff); + return; + +write_comm: + r[a] = d >> 8; + r[a + 1] = d; + if (Pico_mcd->m.m68k_poll_cnt) + SekEndRunS68k(0); + Pico_mcd->m.m68k_poll_cnt = 0; } // ----------------------------------------------------------------- @@ -371,50 +546,70 @@ void s68k_reg_write8(u32 a, u32 d) #ifndef _ASM_CD_MEMORY_C #include "cell_map.c" -#endif // WORD RAM, cell aranged area (220000 - 23ffff) -static u32 PicoReadM68k8_cell(u32 a) +static u32 PicoReadM68k8_cell0(u32 a) { - int bank = Pico_mcd->s68k_regs[3] & 1; a = (a&3) | (cell_map(a >> 2) << 2); // cell arranged - return Pico_mcd->word_ram1M[bank][a ^ 1]; + return Pico_mcd->word_ram1M[0][a ^ 1]; +} + +static u32 PicoReadM68k8_cell1(u32 a) +{ + a = (a&3) | (cell_map(a >> 2) << 2); + return Pico_mcd->word_ram1M[1][a ^ 1]; } -static u32 PicoReadM68k16_cell(u32 a) +static u32 PicoReadM68k16_cell0(u32 a) { - int bank = Pico_mcd->s68k_regs[3] & 1; a = (a&2) | (cell_map(a >> 2) << 2); - return *(u16 *)(Pico_mcd->word_ram1M[bank] + a); + return *(u16 *)(Pico_mcd->word_ram1M[0] + a); } -static void PicoWriteM68k8_cell(u32 a, u32 d) +static u32 PicoReadM68k16_cell1(u32 a) +{ + a = (a&2) | (cell_map(a >> 2) << 2); + return *(u16 *)(Pico_mcd->word_ram1M[1] + a); +} + +static void PicoWriteM68k8_cell0(u32 a, u32 d) { - int bank = Pico_mcd->s68k_regs[3] & 1; a = (a&3) | (cell_map(a >> 2) << 2); - Pico_mcd->word_ram1M[bank][a ^ 1] = d; + Pico_mcd->word_ram1M[0][a ^ 1] = d; } -static void PicoWriteM68k16_cell(u32 a, u32 d) +static void PicoWriteM68k8_cell1(u32 a, u32 d) { - int bank = Pico_mcd->s68k_regs[3] & 1; a = (a&3) | (cell_map(a >> 2) << 2); - *(u16 *)(Pico_mcd->word_ram1M[bank] + a) = d; + Pico_mcd->word_ram1M[1][a ^ 1] = d; } +static void PicoWriteM68k16_cell0(u32 a, u32 d) +{ + a = (a&3) | (cell_map(a >> 2) << 2); + *(u16 *)(Pico_mcd->word_ram1M[0] + a) = d; +} + +static void PicoWriteM68k16_cell1(u32 a, u32 d) +{ + a = (a&3) | (cell_map(a >> 2) << 2); + *(u16 *)(Pico_mcd->word_ram1M[1] + a) = d; +} +#endif + // RAM cart (40000 - 7fffff, optional) static u32 PicoReadM68k8_ramc(u32 a) { u32 d = 0; if (a == 0x400001) { - if (SRam.data != NULL) + if (Pico.sv.data != NULL) d = 3; // 64k cart return d; } if ((a & 0xfe0000) == 0x600000) { - if (SRam.data != NULL) - d = SRam.data[((a >> 1) & 0xffff) + 0x2000]; + if (Pico.sv.data != NULL) + d = Pico.sv.data[((a >> 1) & 0xffff) + 0x2000]; return d; } @@ -434,9 +629,9 @@ static u32 PicoReadM68k16_ramc(u32 a) static void PicoWriteM68k8_ramc(u32 a, u32 d) { if ((a & 0xfe0000) == 0x600000) { - if (SRam.data != NULL && (Pico_mcd->m.bcram_reg & 1)) { - SRam.data[((a>>1) & 0xffff) + 0x2000] = d; - SRam.changed = 1; + if (Pico.sv.data != NULL && (Pico_mcd->m.bcram_reg & 1)) { + Pico.sv.data[((a>>1) & 0xffff) + 0x2000] = d; + Pico.sv.changed = 1; } return; } @@ -446,17 +641,20 @@ static void PicoWriteM68k8_ramc(u32 a, u32 d) return; } - elprintf(EL_UIO, "m68k unmapped w8 [%06x] %02x @%06x", a, d & 0xff, SekPc); + elprintf(EL_UIO, "m68k unmapped w8 [%06x] %02x @%06x", + a, d & 0xff, SekPc); } static void PicoWriteM68k16_ramc(u32 a, u32 d) { - elprintf(EL_ANOMALY, "ramcart w16: [%06x] %04x @%06x", a, d, SekPcS68k); + elprintf(EL_ANOMALY, "ramcart w16: [%06x] %04x @%06x", + a, d, SekPcS68k); PicoWriteM68k8_ramc(a + 1, d); } // IO/control/cd registers (a10000 - ...) -static u32 PicoReadM68k8_io(u32 a) +#ifndef _ASM_CD_MEMORY_C +u32 PicoRead8_mcd_io(u32 a) { u32 d; if ((a & 0xff00) == 0x2000) { // a12000 - a120ff @@ -464,7 +662,8 @@ static u32 PicoReadM68k8_io(u32 a) if (!(a & 1)) d >>= 8; d &= 0xff; - elprintf(EL_CDREGS, "m68k_regs r8: [%02x] %02x @%06x", a & 0x3f, d, SekPc); + elprintf(EL_CDREGS, "m68k_regs r8: [%02x] %02x @%06x", + a & 0x3f, d, SekPc); return d; } @@ -472,52 +671,46 @@ static u32 PicoReadM68k8_io(u32 a) return PicoRead8_io(a); } -static u32 PicoReadM68k16_io(u32 a) +u32 PicoRead16_mcd_io(u32 a) { u32 d; if ((a & 0xff00) == 0x2000) { d = m68k_reg_read16(a); - elprintf(EL_CDREGS, "m68k_regs r16: [%02x] %04x @%06x", a & 0x3f, d, SekPc); + elprintf(EL_CDREGS, "m68k_regs r16: [%02x] %04x @%06x", + a & 0x3f, d, SekPc); return d; } return PicoRead16_io(a); } -static void PicoWriteM68k8_io(u32 a, u32 d) +void PicoWrite8_mcd_io(u32 a, u32 d) { if ((a & 0xff00) == 0x2000) { // a12000 - a120ff - elprintf(EL_CDREGS, "m68k_regs w8: [%02x] %02x @%06x", a&0x3f, d, SekPc); + elprintf(EL_CDREGS, "m68k_regs w8: [%02x] %02x @%06x", + a & 0x3f, d, SekPc); m68k_reg_write8(a, d); return; } - PicoWrite16_io(a, d); + PicoWrite8_io(a, d); } -static void PicoWriteM68k16_io(u32 a, u32 d) +void PicoWrite16_mcd_io(u32 a, u32 d) { if ((a & 0xff00) == 0x2000) { // a12000 - a120ff - elprintf(EL_CDREGS, "m68k_regs w16: [%02x] %04x @%06x", a&0x3f, d, SekPc); -/* TODO FIXME? - if (a == 0xe) { // special case, 2 byte writes would be handled differently - Pico_mcd->s68k_regs[0xe] = d >> 8; -#ifdef USE_POLL_DETECT - if ((s68k_poll_adclk&0xfe) == 0xe && s68k_poll_cnt > POLL_LIMIT) { - SekSetStopS68k(0); s68k_poll_adclk = 0; - elprintf(EL_CDPOLL, "s68k poll release, a=%02x", a); - } -#endif - return; - } -*/ - m68k_reg_write8(a, d >> 8); - m68k_reg_write8(a + 1, d & 0xff); + elprintf(EL_CDREGS, "m68k_regs w16: [%02x] %04x @%06x", + a & 0x3f, d, SekPc); + + m68k_reg_write8(a, d >> 8); + if ((a & 0x3e) != 0x0e) // special case + m68k_reg_write8(a + 1, d & 0xff); return; } PicoWrite16_io(a, d); } +#endif // ----------------------------------------------------------------- // Sub 68k @@ -537,20 +730,36 @@ static u32 s68k_unmapped_read16(u32 a) static void s68k_unmapped_write8(u32 a, u32 d) { - elprintf(EL_UIO, "s68k unmapped w8 [%06x] %02x @%06x", a, d & 0xff, SekPc); + elprintf(EL_UIO, "s68k unmapped w8 [%06x] %02x @%06x", + a, d & 0xff, SekPc); } static void s68k_unmapped_write16(u32 a, u32 d) { - elprintf(EL_UIO, "s68k unmapped w16 [%06x] %04x @%06x", a, d & 0xffff, SekPc); + elprintf(EL_UIO, "s68k unmapped w16 [%06x] %04x @%06x", + a, d & 0xffff, SekPc); } +// PRG RAM protected range (000000 - 01fdff)? +// XXX verify: ff00 or 1fe00 max? +static void PicoWriteS68k8_prgwp(u32 a, u32 d) +{ + if (a >= (Pico_mcd->s68k_regs[2] << 9)) + Pico_mcd->prg_ram[a ^ 1] = d; +} + +static void PicoWriteS68k16_prgwp(u32 a, u32 d) +{ + if (a >= (Pico_mcd->s68k_regs[2] << 9)) + *(u16 *)(Pico_mcd->prg_ram + a) = d; +} + +#ifndef _ASM_CD_MEMORY_C + // decode (080000 - 0bffff, in 1M mode) -static u32 PicoReadS68k8_dec(u32 a) +static u32 PicoReadS68k8_dec0(u32 a) { - u32 d, bank; - bank = (Pico_mcd->s68k_regs[3] & 1) ^ 1; - d = Pico_mcd->word_ram1M[bank][((a >> 1) ^ 1) & 0x1ffff]; + u32 d = Pico_mcd->word_ram1M[0][((a >> 1) ^ 1) & 0x1ffff]; if (a & 1) d &= 0x0f; else @@ -558,69 +767,97 @@ static u32 PicoReadS68k8_dec(u32 a) return d; } -static u32 PicoReadS68k16_dec(u32 a) +static u32 PicoReadS68k8_dec1(u32 a) { - u32 d, bank; - bank = (Pico_mcd->s68k_regs[3] & 1) ^ 1; - d = Pico_mcd->word_ram1M[bank][((a >> 1) ^ 1) & 0x1ffff]; + u32 d = Pico_mcd->word_ram1M[1][((a >> 1) ^ 1) & 0x1ffff]; + if (a & 1) + d &= 0x0f; + else + d >>= 4; + return d; +} + +static u32 PicoReadS68k16_dec0(u32 a) +{ + u32 d = Pico_mcd->word_ram1M[0][((a >> 1) ^ 1) & 0x1ffff]; d |= d << 4; d &= ~0xf0; return d; } -/* check: jaguar xj 220 (draws entire world using decode) */ -static void PicoWriteS68k8_dec(u32 a, u32 d) +static u32 PicoReadS68k16_dec1(u32 a) { - u8 r3 = Pico_mcd->s68k_regs[3]; - u8 *pd = &Pico_mcd->word_ram1M[(r3 & 1) ^ 1][((a >> 1) ^ 1) & 0x1ffff]; - u8 oldmask = (a & 1) ? 0xf0 : 0x0f; - - r3 &= 0x18; - d &= 0x0f; - if (!(a & 1)) - d <<= 4; - - if (r3 == 8) { - if ((!(*pd & (~oldmask))) && d) - goto do_it; - } else if (r3 > 8) { - if (d) - goto do_it; - } else - goto do_it; - - return; + u32 d = Pico_mcd->word_ram1M[1][((a >> 1) ^ 1) & 0x1ffff]; + d |= d << 4; + d &= ~0xf0; + return d; +} -do_it: - *pd = d | (*pd & oldmask); +/* check: jaguar xj 220 (draws entire world using decode) */ +#define mk_decode_w8(bank) \ +static void PicoWriteS68k8_dec_m0b##bank(u32 a, u32 d) \ +{ \ + u8 *pd = &Pico_mcd->word_ram1M[bank][((a >> 1) ^ 1) & 0x1ffff]; \ + \ + if (!(a & 1)) \ + *pd = (*pd & 0x0f) | (d << 4); \ + else \ + *pd = (*pd & 0xf0) | (d & 0x0f); \ +} \ + \ +static void PicoWriteS68k8_dec_m1b##bank(u32 a, u32 d) \ +{ \ + u8 *pd = &Pico_mcd->word_ram1M[bank][((a >> 1) ^ 1) & 0x1ffff]; \ + u8 mask = (a & 1) ? 0x0f : 0xf0; \ + \ + if (!(*pd & mask) && (d & 0x0f)) /* underwrite */ \ + PicoWriteS68k8_dec_m0b##bank(a, d); \ +} \ + \ +static void PicoWriteS68k8_dec_m2b##bank(u32 a, u32 d) /* ...and m3? */ \ +{ \ + if (d & 0x0f) /* overwrite */ \ + PicoWriteS68k8_dec_m0b##bank(a, d); \ } -static void PicoWriteS68k16_dec(u32 a, u32 d) -{ - u8 r3 = Pico_mcd->s68k_regs[3]; - u8 *pd = &Pico_mcd->word_ram1M[(r3 & 1) ^ 1][((a >> 1) ^ 1) & 0x1ffff]; - - //if ((a & 0x3ffff) < 0x28000) return; - - r3 &= 0x18; - d &= 0x0f0f; - d |= d >> 4; - - if (r3 == 8) { - u8 dold = *pd; - if (!(dold & 0xf0)) dold |= d & 0xf0; - if (!(dold & 0x0f)) dold |= d & 0x0f; - *pd = dold; - } else if (r3 > 8) { - u8 dold = *pd; - if (!(d & 0xf0)) d |= dold & 0xf0; - if (!(d & 0x0f)) d |= dold & 0x0f; - *pd = d; - } else { - *pd = d; - } +mk_decode_w8(0) +mk_decode_w8(1) + +#define mk_decode_w16(bank) \ +static void PicoWriteS68k16_dec_m0b##bank(u32 a, u32 d) \ +{ \ + u8 *pd = &Pico_mcd->word_ram1M[bank][((a >> 1) ^ 1) & 0x1ffff]; \ + \ + d &= 0x0f0f; \ + *pd = d | (d >> 4); \ +} \ + \ +static void PicoWriteS68k16_dec_m1b##bank(u32 a, u32 d) \ +{ \ + u8 *pd = &Pico_mcd->word_ram1M[bank][((a >> 1) ^ 1) & 0x1ffff]; \ + \ + d &= 0x0f0f; /* underwrite */ \ + if (!(*pd & 0xf0)) *pd |= d >> 4; \ + if (!(*pd & 0x0f)) *pd |= d; \ +} \ + \ +static void PicoWriteS68k16_dec_m2b##bank(u32 a, u32 d) \ +{ \ + u8 *pd = &Pico_mcd->word_ram1M[bank][((a >> 1) ^ 1) & 0x1ffff]; \ + \ + d &= 0x0f0f; /* overwrite */ \ + d |= d >> 4; \ + \ + if (!(d & 0xf0)) d |= *pd & 0xf0; \ + if (!(d & 0x0f)) d |= *pd & 0x0f; \ + *pd = d; \ } +mk_decode_w16(0) +mk_decode_w16(1) + +#endif + // backup RAM (fe0000 - feffff) static u32 PicoReadS68k8_bram(u32 a) { @@ -640,7 +877,7 @@ static u32 PicoReadS68k16_bram(u32 a) static void PicoWriteS68k8_bram(u32 a, u32 d) { Pico_mcd->bram[(a >> 1) & 0x1fff] = d; - SRam.changed = 1; + Pico.sv.changed = 1; } static void PicoWriteS68k16_bram(u32 a, u32 d) @@ -649,9 +886,11 @@ static void PicoWriteS68k16_bram(u32 a, u32 d) a = (a >> 1) & 0x1fff; Pico_mcd->bram[a++] = d; Pico_mcd->bram[a++] = d >> 8; // TODO: verify.. - SRam.changed = 1; + Pico.sv.changed = 1; } +#ifndef _ASM_CD_MEMORY_C + // PCM and registers (ff0000 - ffffff) static u32 PicoReadS68k8_pr(u32 a) { @@ -660,34 +899,32 @@ static u32 PicoReadS68k8_pr(u32 a) // regs if ((a & 0xfe00) == 0x8000) { a &= 0x1ff; - elprintf(EL_CDREGS, "s68k_regs r8: [%02x] @ %06x", a, SekPcS68k); if (a >= 0x0e && a < 0x30) { d = Pico_mcd->s68k_regs[a]; - s68k_poll_detect(a, d); - elprintf(EL_CDREGS, "ret = %02x", (u8)d); - return d; + s68k_poll_detect(a & ~1, d); + goto regs_done; } - else if (a >= 0x58 && a < 0x68) - d = gfx_cd_read(a & ~1); - else d = s68k_reg_read16(a & ~1); + d = s68k_reg_read16(a & ~1); if (!(a & 1)) d >>= 8; - elprintf(EL_CDREGS, "ret = %02x", (u8)d); - return d & 0xff; + +regs_done: + d &= 0xff; + elprintf(EL_CDREGS, "s68k_regs r8: [%02x] %02x @%06x", + a, d, SekPcS68k); + return d; } // PCM + // XXX: verify: probably odd addrs only? if ((a & 0x8000) == 0x0000) { a &= 0x7fff; if (a >= 0x2000) d = Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][(a >> 1) & 0xfff]; - else if (a >= 0x20) { - a &= 0x1e; - d = Pico_mcd->pcm.ch[a>>2].addr >> PCM_STEP_SHIFT; - if (a & 2) - d >>= 8; - } - return d & 0xff; + else if (a >= 0x20) + d = pcd_pcm_read(a >> 1); + + return d; } return s68k_unmapped_read8(a); @@ -700,26 +937,21 @@ static u32 PicoReadS68k16_pr(u32 a) // regs if ((a & 0xfe00) == 0x8000) { a &= 0x1fe; - elprintf(EL_CDREGS, "s68k_regs r16: [%02x] @ %06x", a, SekPcS68k); - if (0x58 <= a && a < 0x68) - d = gfx_cd_read(a); - else d = s68k_reg_read16(a); - elprintf(EL_CDREGS, "ret = %04x", d); + d = s68k_reg_read16(a); + + elprintf(EL_CDREGS, "s68k_regs r16: [%02x] %04x @%06x", + a, d, SekPcS68k); return d; } // PCM if ((a & 0x8000) == 0x0000) { - //elprintf(EL_ANOMALY, "FIXME: s68k_pcm r16: [%06x] @%06x", a, SekPcS68k); a &= 0x7fff; if (a >= 0x2000) - d = Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][(a>>1)&0xfff]; - else if (a >= 0x20) { - a &= 0x1e; - d = Pico_mcd->pcm.ch[a>>2].addr >> PCM_STEP_SHIFT; - if (a & 2) d >>= 8; - } - elprintf(EL_CDREGS, "ret = %04x", d); + d = Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][(a >> 1) & 0xfff]; + else if (a >= 0x20) + d = pcd_pcm_read(a >> 1); + return d; } @@ -731,10 +963,11 @@ static void PicoWriteS68k8_pr(u32 a, u32 d) // regs if ((a & 0xfe00) == 0x8000) { a &= 0x1ff; - elprintf(EL_CDREGS, "s68k_regs w8: [%02x] %02x @ %06x", a, d, SekPcS68k); - if (0x58 <= a && a < 0x68) - gfx_cd_write16(a&~1, (d<<8)|d); - else s68k_reg_write8(a,d); + elprintf(EL_CDREGS, "s68k_regs w8: [%02x] %02x @%06x", a, d, SekPcS68k); + if (0x59 <= a && a < 0x68) // word regs + s68k_reg_write16(a & ~1, (d << 8) | d); + else + s68k_reg_write8(a, d); return; } @@ -744,7 +977,7 @@ static void PicoWriteS68k8_pr(u32 a, u32 d) if (a >= 0x2000) Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][(a>>1)&0xfff] = d; else if (a < 0x12) - pcm_write(a>>1, d); + pcd_pcm_write(a>>1, d); return; } @@ -756,19 +989,8 @@ static void PicoWriteS68k16_pr(u32 a, u32 d) // regs if ((a & 0xfe00) == 0x8000) { a &= 0x1fe; - elprintf(EL_CDREGS, "s68k_regs w16: [%02x] %04x @ %06x", a, d, SekPcS68k); - if (a >= 0x58 && a < 0x68) - gfx_cd_write16(a, d); - else { - if (a == 0xe) { - // special case, 2 byte writes would be handled differently - // TODO: verify - Pico_mcd->s68k_regs[0xf] = d; - return; - } - s68k_reg_write8(a, d >> 8); - s68k_reg_write8(a + 1, d & 0xff); - } + elprintf(EL_CDREGS, "s68k_regs w16: [%02x] %04x @%06x", a, d, SekPcS68k); + s68k_reg_write16(a, d); return; } @@ -778,96 +1000,50 @@ static void PicoWriteS68k16_pr(u32 a, u32 d) if (a >= 0x2000) Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][(a>>1)&0xfff] = d; else if (a < 0x12) - pcm_write(a>>1, d & 0xff); + pcd_pcm_write(a>>1, d & 0xff); return; } s68k_unmapped_write16(a, d); } -// ----------------------------------------------------------------- - -#ifdef EMU_C68K -static __inline int PicoMemBaseM68k(u32 pc) -{ - if ((pc&0xe00000)==0xe00000) - return (int)Pico.ram-(pc&0xff0000); // Program Counter in Ram - - if (pc < 0x20000) - return (int)Pico_mcd->bios; // Program Counter in BIOS - - if ((pc&0xfc0000)==0x200000) - { - if (!(Pico_mcd->s68k_regs[3]&4)) - return (int)Pico_mcd->word_ram2M - 0x200000; // Program Counter in Word Ram - if (pc < 0x220000) { - int bank = Pico_mcd->s68k_regs[3]&1; - return (int)Pico_mcd->word_ram1M[bank] - 0x200000; - } - } - - // Error - Program Counter is invalid - elprintf(EL_ANOMALY, "m68k FIXME: unhandled jump to %06x", pc); - - return (int)Pico_mcd->bios; -} - - -static u32 PicoCheckPcM68k(u32 pc) -{ - pc-=PicoCpuCM68k.membase; // Get real pc - pc&=0xfffffe; - - PicoCpuCM68k.membase=PicoMemBaseM68k(pc); - - return PicoCpuCM68k.membase+pc; -} - - -static __inline int PicoMemBaseS68k(u32 pc) -{ - if (pc < 0x80000) // PRG RAM - return (int)Pico_mcd->prg_ram; - - if ((pc&0xfc0000)==0x080000) // WORD RAM 2M area (assume we are in the right mode..) - return (int)Pico_mcd->word_ram2M - 0x080000; - - if ((pc&0xfe0000)==0x0c0000) { // word RAM 1M area - int bank = (Pico_mcd->s68k_regs[3]&1)^1; - return (int)Pico_mcd->word_ram1M[bank] - 0x0c0000; - } - - // Error - Program Counter is invalid - elprintf(EL_ANOMALY, "s68k FIXME: unhandled jump to %06x", pc); +#endif - return (int)Pico_mcd->prg_ram; -} +static const void *m68k_cell_read8[] = { PicoReadM68k8_cell0, PicoReadM68k8_cell1 }; +static const void *m68k_cell_read16[] = { PicoReadM68k16_cell0, PicoReadM68k16_cell1 }; +static const void *m68k_cell_write8[] = { PicoWriteM68k8_cell0, PicoWriteM68k8_cell1 }; +static const void *m68k_cell_write16[] = { PicoWriteM68k16_cell0, PicoWriteM68k16_cell1 }; +static const void *s68k_dec_read8[] = { PicoReadS68k8_dec0, PicoReadS68k8_dec1 }; +static const void *s68k_dec_read16[] = { PicoReadS68k16_dec0, PicoReadS68k16_dec1 }; -static u32 PicoCheckPcS68k(u32 pc) -{ - pc-=PicoCpuCS68k.membase; // Get real pc - pc&=0xfffffe; +static const void *s68k_dec_write8[2][4] = { + { PicoWriteS68k8_dec_m0b0, PicoWriteS68k8_dec_m1b0, PicoWriteS68k8_dec_m2b0, PicoWriteS68k8_dec_m2b0 }, + { PicoWriteS68k8_dec_m0b1, PicoWriteS68k8_dec_m1b1, PicoWriteS68k8_dec_m2b1, PicoWriteS68k8_dec_m2b1 }, +}; - PicoCpuCS68k.membase=PicoMemBaseS68k(pc); +static const void *s68k_dec_write16[2][4] = { + { PicoWriteS68k16_dec_m0b0, PicoWriteS68k16_dec_m1b0, PicoWriteS68k16_dec_m2b0, PicoWriteS68k16_dec_m2b0 }, + { PicoWriteS68k16_dec_m0b1, PicoWriteS68k16_dec_m1b1, PicoWriteS68k16_dec_m2b1, PicoWriteS68k16_dec_m2b1 }, +}; - return PicoCpuCS68k.membase+pc; -} -#endif +// ----------------------------------------------------------------- -// TODO: probably split -void PicoMemRemapCD(int r3) +static void remap_prg_window(u32 r1, u32 r3) { - void *bank; - // PRG RAM - if (Pico_mcd->m.busreq & 2) { - bank = Pico_mcd->prg_ram_b[Pico_mcd->s68k_regs[3] >> 6]; + if (r1 & 2) { + void *bank = Pico_mcd->prg_ram_b[(r3 >> 6) & 3]; cpu68k_map_all_ram(0x020000, 0x03ffff, bank, 0); } else { m68k_map_unmap(0x020000, 0x03ffff); } +} + +static void remap_word_ram(u32 r3) +{ + void *bank; // WORD RAM if (!(r3 & 4)) { @@ -878,38 +1054,38 @@ void PicoMemRemapCD(int r3) // TODO: handle 0x0c0000 } else { - bank = Pico_mcd->word_ram1M[r3 & 1]; + int b0 = r3 & 1; + int m = (r3 & 0x18) >> 3; + bank = Pico_mcd->word_ram1M[b0]; cpu68k_map_all_ram(0x200000, 0x21ffff, bank, 0); - bank = Pico_mcd->word_ram1M[(r3 & 1) ^ 1]; + bank = Pico_mcd->word_ram1M[b0 ^ 1]; cpu68k_map_all_ram(0x0c0000, 0x0effff, bank, 1); // "cell arrange" on m68k - cpu68k_map_set(m68k_read8_map, 0x220000, 0x23ffff, PicoReadM68k8_cell, 1); - cpu68k_map_set(m68k_read16_map, 0x220000, 0x23ffff, PicoReadM68k16_cell, 1); - cpu68k_map_set(m68k_write8_map, 0x220000, 0x23ffff, PicoWriteM68k8_cell, 1); - cpu68k_map_set(m68k_write16_map, 0x220000, 0x23ffff, PicoWriteM68k16_cell, 1); + cpu68k_map_set(m68k_read8_map, 0x220000, 0x23ffff, m68k_cell_read8[b0], 1); + cpu68k_map_set(m68k_read16_map, 0x220000, 0x23ffff, m68k_cell_read16[b0], 1); + cpu68k_map_set(m68k_write8_map, 0x220000, 0x23ffff, m68k_cell_write8[b0], 1); + cpu68k_map_set(m68k_write16_map, 0x220000, 0x23ffff, m68k_cell_write16[b0], 1); // "decode format" on s68k - cpu68k_map_set(s68k_read8_map, 0x080000, 0x0bffff, PicoReadS68k8_dec, 1); - cpu68k_map_set(s68k_read16_map, 0x080000, 0x0bffff, PicoReadS68k16_dec, 1); - cpu68k_map_set(s68k_write8_map, 0x080000, 0x0bffff, PicoWriteS68k8_dec, 1); - cpu68k_map_set(s68k_write16_map, 0x080000, 0x0bffff, PicoWriteS68k16_dec, 1); + cpu68k_map_set(s68k_read8_map, 0x080000, 0x0bffff, s68k_dec_read8[b0 ^ 1], 1); + cpu68k_map_set(s68k_read16_map, 0x080000, 0x0bffff, s68k_dec_read16[b0 ^ 1], 1); + cpu68k_map_set(s68k_write8_map, 0x080000, 0x0bffff, s68k_dec_write8[b0 ^ 1][m], 1); + cpu68k_map_set(s68k_write16_map, 0x080000, 0x0bffff, s68k_dec_write16[b0 ^ 1][m], 1); } +} -#ifdef EMU_F68K - // update fetchmap.. - int i; - if (!(r3 & 4)) - { - for (i = M68K_FETCHBANK1*2/16; (i<<(24-FAMEC_FETCHBITS)) < 0x240000; i++) - PicoCpuFM68k.Fetch[i] = (unsigned int)Pico_mcd->word_ram2M - 0x200000; - } - else - { - for (i = M68K_FETCHBANK1*2/16; (i<<(24-FAMEC_FETCHBITS)) < 0x220000; i++) - PicoCpuFM68k.Fetch[i] = (unsigned int)Pico_mcd->word_ram1M[r3 & 1] - 0x200000; - for (i = M68K_FETCHBANK1*0x0c/0x100; (i<<(24-FAMEC_FETCHBITS)) < 0x0e0000; i++) - PicoCpuFS68k.Fetch[i] = (unsigned int)Pico_mcd->word_ram1M[(r3&1)^1] - 0x0c0000; - } -#endif +void pcd_state_loaded_mem(void) +{ + u32 r3 = Pico_mcd->s68k_regs[3]; + + /* after load events */ + if (r3 & 4) // 1M mode? + wram_2M_to_1M(Pico_mcd->word_ram2M); + remap_word_ram(r3); + remap_prg_window(Pico_mcd->m.busreq, r3); + Pico_mcd->m.dmna_ret_2m &= 3; + + // restore hint vector + *(unsigned short *)(Pico_mcd->bios + 0x72) = Pico_mcd->m.hint_vector; } #ifdef EMU_M68K @@ -921,11 +1097,9 @@ PICO_INTERNAL void PicoMemSetupCD(void) // setup default main68k map PicoMemSetup(); - // PicoMemRemapCD() will set up RAMs, so not done here - // main68k map (BIOS mapped by PicoMemSetup()): // RAM cart - if (PicoOpt & POPT_EN_MCD_RAMCART) { + if (PicoIn.opt & POPT_EN_MCD_RAMCART) { cpu68k_map_set(m68k_read8_map, 0x400000, 0x7fffff, PicoReadM68k8_ramc, 1); cpu68k_map_set(m68k_read16_map, 0x400000, 0x7fffff, PicoReadM68k16_ramc, 1); cpu68k_map_set(m68k_write8_map, 0x400000, 0x7fffff, PicoWriteM68k8_ramc, 1); @@ -933,10 +1107,10 @@ PICO_INTERNAL void PicoMemSetupCD(void) } // registers/IO: - cpu68k_map_set(m68k_read8_map, 0xa10000, 0xa1ffff, PicoReadM68k8_io, 1); - cpu68k_map_set(m68k_read16_map, 0xa10000, 0xa1ffff, PicoReadM68k16_io, 1); - cpu68k_map_set(m68k_write8_map, 0xa10000, 0xa1ffff, PicoWriteM68k8_io, 1); - cpu68k_map_set(m68k_write16_map, 0xa10000, 0xa1ffff, PicoWriteM68k16_io, 1); + cpu68k_map_set(m68k_read8_map, 0xa10000, 0xa1ffff, PicoRead8_mcd_io, 1); + cpu68k_map_set(m68k_read16_map, 0xa10000, 0xa1ffff, PicoRead16_mcd_io, 1); + cpu68k_map_set(m68k_write8_map, 0xa10000, 0xa1ffff, PicoWrite8_mcd_io, 1); + cpu68k_map_set(m68k_write16_map, 0xa10000, 0xa1ffff, PicoWrite16_mcd_io, 1); // sub68k map cpu68k_map_set(s68k_read8_map, 0x000000, 0xffffff, s68k_unmapped_read8, 1); @@ -949,6 +1123,8 @@ PICO_INTERNAL void PicoMemSetupCD(void) cpu68k_map_set(s68k_read16_map, 0x000000, 0x07ffff, Pico_mcd->prg_ram, 0); cpu68k_map_set(s68k_write8_map, 0x000000, 0x07ffff, Pico_mcd->prg_ram, 0); cpu68k_map_set(s68k_write16_map, 0x000000, 0x07ffff, Pico_mcd->prg_ram, 0); + cpu68k_map_set(s68k_write8_map, 0x000000, 0x01ffff, PicoWriteS68k8_prgwp, 1); + cpu68k_map_set(s68k_write16_map, 0x000000, 0x01ffff, PicoWriteS68k16_prgwp, 1); // BRAM cpu68k_map_set(s68k_read8_map, 0xfe0000, 0xfeffff, PicoReadS68k8_bram, 1); @@ -962,16 +1138,21 @@ PICO_INTERNAL void PicoMemSetupCD(void) cpu68k_map_set(s68k_write8_map, 0xff0000, 0xffffff, PicoWriteS68k8_pr, 1); cpu68k_map_set(s68k_write16_map, 0xff0000, 0xffffff, PicoWriteS68k16_pr, 1); + // RAMs + remap_word_ram(1); + #ifdef EMU_C68K - PicoCpuCM68k.checkpc = PicoCheckPcM68k; // s68k - PicoCpuCS68k.checkpc = PicoCheckPcS68k; - PicoCpuCS68k.fetch8 = PicoCpuCS68k.read8 = s68k_read8; - PicoCpuCS68k.fetch16 = PicoCpuCS68k.read16 = s68k_read16; - PicoCpuCS68k.fetch32 = PicoCpuCS68k.read32 = s68k_read32; - PicoCpuCS68k.write8 = s68k_write8; - PicoCpuCS68k.write16 = s68k_write16; - PicoCpuCS68k.write32 = s68k_write32; + PicoCpuCS68k.read8 = (void *)s68k_read8_map; + PicoCpuCS68k.read16 = (void *)s68k_read16_map; + PicoCpuCS68k.read32 = (void *)s68k_read16_map; + PicoCpuCS68k.write8 = (void *)s68k_write8_map; + PicoCpuCS68k.write16 = (void *)s68k_write16_map; + PicoCpuCS68k.write32 = (void *)s68k_write16_map; + PicoCpuCS68k.checkpc = NULL; /* unused */ + PicoCpuCS68k.fetch8 = NULL; + PicoCpuCS68k.fetch16 = NULL; + PicoCpuCS68k.fetch32 = NULL; #endif #ifdef EMU_F68K // s68k @@ -984,36 +1165,38 @@ PICO_INTERNAL void PicoMemSetupCD(void) // setup FAME fetchmap { +#ifdef __clang__ + volatile // prevent strange relocs from clang +#endif + unsigned long ptr_ram = (uptr)PicoMem.ram; int i; + // M68k // by default, point everything to fitst 64k of ROM (BIOS) for (i = 0; i < M68K_FETCHBANK1; i++) - PicoCpuFM68k.Fetch[i] = (unsigned int)Pico.rom - (i<<(24-FAMEC_FETCHBITS)); + PicoCpuFM68k.Fetch[i] = (uptr)Pico.rom - (i<<(24-FAMEC_FETCHBITS)); // now real ROM (BIOS) for (i = 0; i < M68K_FETCHBANK1 && (i<<(24-FAMEC_FETCHBITS)) < Pico.romsize; i++) - PicoCpuFM68k.Fetch[i] = (unsigned int)Pico.rom; + PicoCpuFM68k.Fetch[i] = (uptr)Pico.rom; // .. and RAM for (i = M68K_FETCHBANK1*14/16; i < M68K_FETCHBANK1; i++) - PicoCpuFM68k.Fetch[i] = (unsigned int)Pico.ram - (i<<(24-FAMEC_FETCHBITS)); + PicoCpuFM68k.Fetch[i] = ptr_ram - (i<<(24-FAMEC_FETCHBITS)); // S68k // PRG RAM is default for (i = 0; i < M68K_FETCHBANK1; i++) - PicoCpuFS68k.Fetch[i] = (unsigned int)Pico_mcd->prg_ram - (i<<(24-FAMEC_FETCHBITS)); + PicoCpuFS68k.Fetch[i] = (uptr)Pico_mcd->prg_ram - (i<<(24-FAMEC_FETCHBITS)); // real PRG RAM for (i = 0; i < M68K_FETCHBANK1 && (i<<(24-FAMEC_FETCHBITS)) < 0x80000; i++) - PicoCpuFS68k.Fetch[i] = (unsigned int)Pico_mcd->prg_ram; + PicoCpuFS68k.Fetch[i] = (uptr)Pico_mcd->prg_ram; // WORD RAM 2M area for (i = M68K_FETCHBANK1*0x08/0x100; i < M68K_FETCHBANK1 && (i<<(24-FAMEC_FETCHBITS)) < 0xc0000; i++) - PicoCpuFS68k.Fetch[i] = (unsigned int)Pico_mcd->word_ram2M - 0x80000; - // PicoMemRemapCD() will setup word ram for both + PicoCpuFS68k.Fetch[i] = (uptr)Pico_mcd->word_ram2M - 0x80000; + // remap_word_ram() will setup word ram for both } #endif #ifdef EMU_M68K m68k_mem_setup_cd(); #endif - - // m68k_poll_addr = m68k_poll_cnt = 0; - s68k_poll_adclk = s68k_poll_cnt = 0; } @@ -1062,3 +1245,4 @@ static void m68k_mem_setup_cd(void) } #endif // EMU_M68K +// vim:shiftwidth=2:ts=2:expandtab