X-Git-Url: https://notaz.gp2x.de/cgi-bin/gitweb.cgi?a=blobdiff_plain;f=pico%2Fcd%2Fmemory.c;h=6890b57611cd790d9e4a13d6bee36d5d407ac886;hb=ba11a48115de2d25531ddd5fec841ebee42166bd;hp=055107886f79ed68f9b6d94eb35f3c046db45816;hpb=7b3ddc11dc21025f2a64116d664c745c07c54984;p=picodrive.git

diff --git a/pico/cd/memory.c b/pico/cd/memory.c
index 0551078..6890b57 100644
--- a/pico/cd/memory.c
+++ b/pico/cd/memory.c
@@ -67,6 +67,12 @@ static void remap_word_ram(u32 r3);
 void m68k_comm_check(u32 a)
 {
   pcd_sync_s68k(SekCyclesDone(), 0);
+  if (a >= 0x0e && !Pico_mcd->m.need_sync) {
+    // there are cases when slave updates comm and only switches RAM
+    // over after that (mcd1b), so there must be a resync..
+    SekEndRun(64);
+    Pico_mcd->m.need_sync = 1;
+  }
   if (SekNotPolling || a != Pico_mcd->m.m68k_poll_a) {
     Pico_mcd->m.m68k_poll_a = a;
     Pico_mcd->m.m68k_poll_cnt = 0;
@@ -379,7 +385,7 @@ void s68k_reg_write8(u32 a, u32 d)
       //dprintf("s68k CDC reg addr: %x", d&0xf);
       break;
     case 7:
-      cdc_reg_w(d);
+      cdc_reg_w(d & 0xff);
       return;
     case 0xa:
       elprintf(EL_CDREGS, "s68k set CDC dma addr");
@@ -596,14 +602,14 @@ static u32 PicoReadM68k8_ramc(u32 a)
 {
   u32 d = 0;
   if (a == 0x400001) {
-    if (SRam.data != NULL)
+    if (Pico.sv.data != NULL)
       d = 3; // 64k cart
     return d;
   }
 
   if ((a & 0xfe0000) == 0x600000) {
-    if (SRam.data != NULL)
-      d = SRam.data[((a >> 1) & 0xffff) + 0x2000];
+    if (Pico.sv.data != NULL)
+      d = Pico.sv.data[((a >> 1) & 0xffff) + 0x2000];
     return d;
   }
 
@@ -623,9 +629,9 @@ static u32 PicoReadM68k16_ramc(u32 a)
 static void PicoWriteM68k8_ramc(u32 a, u32 d)
 {
   if ((a & 0xfe0000) == 0x600000) {
-    if (SRam.data != NULL && (Pico_mcd->m.bcram_reg & 1)) {
-      SRam.data[((a>>1) & 0xffff) + 0x2000] = d;
-      SRam.changed = 1;
+    if (Pico.sv.data != NULL && (Pico_mcd->m.bcram_reg & 1)) {
+      Pico.sv.data[((a>>1) & 0xffff) + 0x2000] = d;
+      Pico.sv.changed = 1;
     }
     return;
   }
@@ -871,7 +877,7 @@ static u32 PicoReadS68k16_bram(u32 a)
 static void PicoWriteS68k8_bram(u32 a, u32 d)
 {
   Pico_mcd->bram[(a >> 1) & 0x1fff] = d;
-  SRam.changed = 1;
+  Pico.sv.changed = 1;
 }
 
 static void PicoWriteS68k16_bram(u32 a, u32 d)
@@ -880,7 +886,7 @@ static void PicoWriteS68k16_bram(u32 a, u32 d)
   a = (a >> 1) & 0x1fff;
   Pico_mcd->bram[a++] = d;
   Pico_mcd->bram[a++] = d >> 8; // TODO: verify..
-  SRam.changed = 1;
+  Pico.sv.changed = 1;
 }
 
 #ifndef _ASM_CD_MEMORY_C
@@ -1065,23 +1071,6 @@ static void remap_word_ram(u32 r3)
     cpu68k_map_set(s68k_write8_map,  0x080000, 0x0bffff, s68k_dec_write8[b0 ^ 1][m], 1);
     cpu68k_map_set(s68k_write16_map, 0x080000, 0x0bffff, s68k_dec_write16[b0 ^ 1][m], 1);
   }
-
-#ifdef EMU_F68K
-  // update fetchmap..
-  int i;
-  if (!(r3 & 4))
-  {
-    for (i = M68K_FETCHBANK1*2/16; (i<<(24-FAMEC_FETCHBITS)) < 0x240000; i++)
-      PicoCpuFM68k.Fetch[i] = (unsigned long)Pico_mcd->word_ram2M - 0x200000;
-  }
-  else
-  {
-    for (i = M68K_FETCHBANK1*2/16; (i<<(24-FAMEC_FETCHBITS)) < 0x220000; i++)
-      PicoCpuFM68k.Fetch[i] = (unsigned long)Pico_mcd->word_ram1M[r3 & 1] - 0x200000;
-    for (i = M68K_FETCHBANK1*0x0c/0x100; (i<<(24-FAMEC_FETCHBITS)) < 0x0e0000; i++)
-      PicoCpuFS68k.Fetch[i] = (unsigned long)Pico_mcd->word_ram1M[(r3&1)^1] - 0x0c0000;
-  }
-#endif
 }
 
 void pcd_state_loaded_mem(void)
@@ -1176,7 +1165,12 @@ PICO_INTERNAL void PicoMemSetupCD(void)
 
   // setup FAME fetchmap
   {
+#ifdef __clang__
+    volatile // prevent strange relocs from clang
+#endif
+    unsigned long ptr_ram = (unsigned long)PicoMem.ram;
     int i;
+
     // M68k
     // by default, point everything to fitst 64k of ROM (BIOS)
     for (i = 0; i < M68K_FETCHBANK1; i++)
@@ -1186,7 +1180,7 @@ PICO_INTERNAL void PicoMemSetupCD(void)
       PicoCpuFM68k.Fetch[i] = (unsigned long)Pico.rom;
     // .. and RAM
     for (i = M68K_FETCHBANK1*14/16; i < M68K_FETCHBANK1; i++)
-      PicoCpuFM68k.Fetch[i] = (unsigned long)Pico.ram - (i<<(24-FAMEC_FETCHBITS));
+      PicoCpuFM68k.Fetch[i] = ptr_ram - (i<<(24-FAMEC_FETCHBITS));
     // S68k
     // PRG RAM is default
     for (i = 0; i < M68K_FETCHBANK1; i++)