X-Git-Url: https://notaz.gp2x.de/cgi-bin/gitweb.cgi?a=blobdiff_plain;f=pico%2Fcd%2Fmemory.c;h=f8ffaeb0de76fbd70a3e1a4570fe713aab4edd38;hb=ba6e8bfd4b707aab042e47bc3e2a14f70be01075;hp=95c78f9265d7284310f965dc88946e61b633fa9a;hpb=be26eb239bd06fd83ab740dca5582841eac652dd;p=picodrive.git

diff --git a/pico/cd/memory.c b/pico/cd/memory.c
index 95c78f9..f8ffaeb 100644
--- a/pico/cd/memory.c
+++ b/pico/cd/memory.c
@@ -65,13 +65,24 @@ void PicoWriteS68k16_dec_m1b1(u32 a, u32 d);
 void PicoWriteS68k16_dec_m2b1(u32 a, u32 d);
 #endif
 
-static void remap_prg_window(void);
+static void remap_prg_window(int r3);
 static void remap_word_ram(int r3);
 
 // poller detection
 #define POLL_LIMIT 16
 #define POLL_CYCLES 124
-unsigned int s68k_poll_adclk, s68k_poll_cnt;
+
+u32 m68k_comm_check(u32 a, u32 d)
+{
+  pcd_sync_s68k(SekCyclesDone(), 0);
+  if (a != Pico_mcd->m.m68k_poll_a) {
+    Pico_mcd->m.m68k_poll_a = a;
+    Pico_mcd->m.m68k_poll_cnt = 0;
+    return d;
+  }
+  Pico_mcd->m.m68k_poll_cnt++;
+  return d;
+}
 
 #ifndef _ASM_CD_MEMORY_C
 static u32 m68k_reg_read16(u32 a)
@@ -86,7 +97,7 @@ static u32 m68k_reg_read16(u32 a)
     case 2:
       d = (Pico_mcd->s68k_regs[a]<<8) | (Pico_mcd->s68k_regs[a+1]&0xc7);
       elprintf(EL_CDREG3, "m68k_regs r3: %02x @%06x", (u8)d, SekPc);
-      goto end;
+      goto end_comm;
     case 4:
       d = Pico_mcd->s68k_regs[4]<<8;
       goto end;
@@ -99,8 +110,11 @@ static u32 m68k_reg_read16(u32 a)
     case 0xA:
       elprintf(EL_UIO, "m68k FIXME: reserved read");
       goto end;
-    case 0xC:
-      d = Pico_mcd->m.timer_stopwatch >> 16;
+    case 0xC: // 384 cycle stopwatch timer
+      // ugh..
+      d = pcd_cycles_m68k_to_s68k(SekCyclesDone());
+      d = (d - Pico_mcd->m.stopwatch_base_c) / 384;
+      d &= 0x0fff;
       elprintf(EL_CDREGS, "m68k stopwatch timer read (%04x)", d);
       goto end;
   }
@@ -108,14 +122,16 @@ static u32 m68k_reg_read16(u32 a)
   if (a < 0x30) {
     // comm flag/cmd/status (0xE-0x2F)
     d = (Pico_mcd->s68k_regs[a]<<8) | Pico_mcd->s68k_regs[a+1];
-    goto end;
+    goto end_comm;
   }
 
   elprintf(EL_UIO, "m68k_regs FIXME invalid read @ %02x", a);
 
 end:
-
   return d;
+
+end_comm:
+  return m68k_comm_check(a, d);
 }
 #endif
 
@@ -127,25 +143,38 @@ void m68k_reg_write8(u32 a, u32 d)
   u32 dold;
   a &= 0x3f;
 
+  Pico_mcd->m.m68k_poll_a =
+  Pico_mcd->m.m68k_poll_cnt = 0;
+
   switch (a) {
     case 0:
       d &= 1;
-      if ((d&1) && (Pico_mcd->s68k_regs[0x33]&(1<<2))) { elprintf(EL_INTS, "m68k: s68k irq 2"); SekInterruptS68k(2); }
+      if (d && (Pico_mcd->s68k_regs[0x33] & PCDS_IEN2)) {
+        elprintf(EL_INTS, "m68k: s68k irq 2");
+        pcd_sync_s68k(SekCyclesDone(), 0);
+        SekInterruptS68k(2);
+      }
       return;
     case 1:
       d &= 3;
-      if (!(d&1)) Pico_mcd->m.state_flags |= 1; // reset pending, needed to be sure we fetch the right vectors on reset
-      if ( (Pico_mcd->m.busreq&1) != (d&1)) elprintf(EL_INTSW, "m68k: s68k reset %i", !(d&1));
-      if ( (Pico_mcd->m.busreq&2) != (d&2)) elprintf(EL_INTSW, "m68k: s68k brq %i", (d&2)>>1);
-      if ((Pico_mcd->m.state_flags&1) && (d&3)==1) {
-        SekResetS68k(); // S68k comes out of RESET or BRQ state
-        Pico_mcd->m.state_flags&=~1;
-        elprintf(EL_CDREGS, "m68k: resetting s68k, cycles=%i", SekCyclesLeft);
+          elprintf(EL_CDREGS, "d m.busreq %u %u", d, Pico_mcd->m.busreq);
+      if (d == Pico_mcd->m.busreq)
+        return;
+      pcd_sync_s68k(SekCyclesDone(), 0);
+
+      if ((Pico_mcd->m.busreq ^ d) & 1) {
+        elprintf(EL_INTSW, "m68k: s68k reset %i", !(d&1));
+        if (!(d & 1))
+          d |= 2; // verified: reset also gives bus
+        else {
+          elprintf(EL_CDREGS, "m68k: resetting s68k");
+          SekResetS68k();
+        }
+      }
+      if ((Pico_mcd->m.busreq ^ d) & 2) {
+        elprintf(EL_INTSW, "m68k: s68k brq %i", d >> 1);
+        remap_prg_window(Pico_mcd->s68k_regs[3]);
       }
-      if (!(d & 1))
-        d |= 2; // verified: reset also gives bus
-      if ((d ^ Pico_mcd->m.busreq) & 2)
-        remap_prg_window();
       Pico_mcd->m.busreq = d;
       return;
     case 2:
@@ -155,30 +184,25 @@ void m68k_reg_write8(u32 a, u32 d)
     case 3:
       dold = Pico_mcd->s68k_regs[3];
       elprintf(EL_CDREG3, "m68k_regs w3: %02x @%06x", (u8)d, SekPc);
-      //if ((Pico_mcd->s68k_regs[3]&4) != (d&4)) dprintf("m68k: ram mode %i mbit", (d&4) ? 1 : 2);
-      //if ((Pico_mcd->s68k_regs[3]&2) != (d&2)) dprintf("m68k: %s", (d&4) ? ((d&2) ? "word swap req" : "noop?") :
-      //                                             ((d&2) ? "word ram to s68k" : "word ram to m68k"));
-      if (dold & 4) {   // 1M mode
-        d ^= 2;         // writing 0 to DMNA actually sets it, 1 does nothing
-      } else {
-	if ((d ^ dold) & d & 2) { // DMNA is being set
-          dold &= ~1;   // return word RAM to s68k
-          /* Silpheed hack: bset(w3), r3, btst, bne, r3 */
-          SekEndRun(20+16+10+12+16);
-        }
-      }
-      Pico_mcd->s68k_regs[3] = (d & 0xc2) | (dold & 0x1f);
       if ((d ^ dold) & 0xc0) {
-        elprintf(EL_CDREGS, "m68k: prg bank: %i -> %i", (Pico_mcd->s68k_regs[a]>>6), ((d>>6)&3));
-        remap_prg_window();
+        elprintf(EL_CDREGS, "m68k: prg bank: %i -> %i",
+          (Pico_mcd->s68k_regs[a]>>6), ((d>>6)&3));
+        remap_prg_window(d);
       }
-#ifdef USE_POLL_DETECT
-      if ((s68k_poll_adclk&0xfe) == 2 && s68k_poll_cnt > POLL_LIMIT) {
-        SekSetStopS68k(0); s68k_poll_adclk = 0;
-        elprintf(EL_CDPOLL, "s68k poll release, a=%02x", a);
+
+      // 2M mode state is tracked regardless of current mode
+      if (d & 2) {
+        Pico_mcd->m.dmna_ret_2m |= 2;
+        Pico_mcd->m.dmna_ret_2m &= ~1;
       }
-#endif
-      return;
+      if (dold & 4) { // 1M mode
+        d ^= 2;       // 0 sets DMNA, 1 does nothing
+        d = (d & 0xc2) | (dold & 0x1f);
+      }
+      else
+        d = (d & 0xc0) | (dold & 0x1c) | Pico_mcd->m.dmna_ret_2m;
+
+      goto write_comm;
     case 6:
       Pico_mcd->bios[0x72 + 1] = d; // simple hint vector changer
       return;
@@ -187,32 +211,30 @@ void m68k_reg_write8(u32 a, u32 d)
       elprintf(EL_CDREGS, "hint vector set to %04x%04x",
         ((u16 *)Pico_mcd->bios)[0x70/2], ((u16 *)Pico_mcd->bios)[0x72/2]);
       return;
-    case 0xf:
+    case 0x0f:
       d = (d << 1) | ((d >> 7) & 1); // rol8 1 (special case)
-    case 0xe:
-      //dprintf("m68k: comm flag: %02x", d);
-      Pico_mcd->s68k_regs[0xe] = d;
-#ifdef USE_POLL_DETECT
-      if ((s68k_poll_adclk&0xfe) == 0xe && s68k_poll_cnt > POLL_LIMIT) {
-        SekSetStopS68k(0); s68k_poll_adclk = 0;
-        elprintf(EL_CDPOLL, "s68k poll release, a=%02x", a);
-      }
-#endif
-      return;
+      a = 0x0e;
+    case 0x0e:
+      goto write_comm;
   }
 
-  if ((a&0xf0) == 0x10) {
-      Pico_mcd->s68k_regs[a] = d;
-#ifdef USE_POLL_DETECT
-      if ((a&0xfe) == (s68k_poll_adclk&0xfe) && s68k_poll_cnt > POLL_LIMIT) {
-        SekSetStopS68k(0); s68k_poll_adclk = 0;
-        elprintf(EL_CDPOLL, "s68k poll release, a=%02x", a);
-      }
-#endif
-      return;
-  }
+  if ((a&0xf0) == 0x10)
+    goto write_comm;
 
   elprintf(EL_UIO, "m68k FIXME: invalid write? [%02x] %02x", a, d);
+  return;
+
+write_comm:
+  if (d == Pico_mcd->s68k_regs[a])
+    return;
+
+  Pico_mcd->s68k_regs[a] = d;
+  pcd_sync_s68k(SekCyclesDone(), 0);
+  if (Pico_mcd->m.s68k_poll_a == a && Pico_mcd->m.s68k_poll_cnt > POLL_LIMIT) {
+    SekSetStopS68k(0);
+    Pico_mcd->m.s68k_poll_a = 0;
+    elprintf(EL_CDPOLL, "s68k poll release, a=%02x", a);
+  }
 }
 
 #ifndef _ASM_CD_MEMORY_C
@@ -221,24 +243,26 @@ static
 u32 s68k_poll_detect(u32 a, u32 d)
 {
 #ifdef USE_POLL_DETECT
-  // needed mostly for Cyclone, which doesn't always check it's cycle counter
-  if (SekIsStoppedS68k()) return d;
-  // polling detection
-  if (a == (s68k_poll_adclk&0xff)) {
-    unsigned int clkdiff = SekCyclesDoneS68k() - (s68k_poll_adclk>>8);
+  u32 cycles, cnt = 0;
+  if (SekIsStoppedS68k())
+    return d;
+
+  cycles = SekCyclesDoneS68k();
+  if (a == Pico_mcd->m.s68k_poll_a) {
+    u32 clkdiff = cycles - Pico_mcd->m.s68k_poll_clk;
     if (clkdiff <= POLL_CYCLES) {
-      s68k_poll_cnt++;
-      //printf("-- diff: %u, cnt = %i\n", clkdiff, s68k_poll_cnt);
-      if (s68k_poll_cnt > POLL_LIMIT) {
+      cnt = Pico_mcd->m.s68k_poll_cnt + 1;
+      //printf("-- diff: %u, cnt = %i\n", clkdiff, cnt);
+      if (Pico_mcd->m.s68k_poll_cnt > POLL_LIMIT) {
         SekSetStopS68k(1);
-        elprintf(EL_CDPOLL, "s68k poll detected @ %06x, a=%02x", SekPcS68k, a);
+        elprintf(EL_CDPOLL, "s68k poll detected @ %06x, a=%02x",
+          SekPcS68k, a);
       }
-      s68k_poll_adclk = (SekCyclesDoneS68k() << 8) | a;
-      return d;
     }
   }
-  s68k_poll_adclk = (SekCyclesDoneS68k() << 8) | a;
-  s68k_poll_cnt = 0;
+  Pico_mcd->m.s68k_poll_a = a;
+  Pico_mcd->m.s68k_poll_clk = cycles;
+  Pico_mcd->m.s68k_poll_cnt = cnt;
 #endif
   return d;
 }
@@ -273,7 +297,9 @@ u32 s68k_reg_read16(u32 a)
     case 8:
       return Read_CDC_Host(1); // Gens returns 0 here on byte reads
     case 0xC:
-      d = Pico_mcd->m.timer_stopwatch >> 16;
+      d = SekCyclesDoneS68k() - Pico_mcd->m.stopwatch_base_c;
+      d /= 384;
+      d &= 0x0fff;
       elprintf(EL_CDREGS, "s68k stopwatch timer read (%04x)", d);
       return d;
     case 0x30:
@@ -317,37 +343,36 @@ void s68k_reg_write8(u32 a, u32 d)
       elprintf(EL_CDREG3, "s68k_regs w3: %02x @%06x", (u8)d, SekPcS68k);
       d &= 0x1d;
       d |= dold & 0xc2;
+
+      // 2M mode state
+      if (d & 1) {
+        Pico_mcd->m.dmna_ret_2m |= 1;
+        Pico_mcd->m.dmna_ret_2m &= ~2; // DMNA clears
+      }
+
       if (d & 4)
       {
-        if ((d ^ dold) & 0x1d) {
-          d &= ~2; // in case of mode or bank change we clear DMNA (m68k req) bit
-          remap_word_ram(d);
-        }
         if (!(dold & 4)) {
           elprintf(EL_CDREG3, "wram mode 2M->1M");
           wram_2M_to_1M(Pico_mcd->word_ram2M);
         }
+
+        if ((d ^ dold) & 0x1d)
+          remap_word_ram(d);
+
+        if ((d ^ dold) & 0x05)
+          d &= ~2; // clear DMNA - swap complete
       }
       else
       {
         if (dold & 4) {
           elprintf(EL_CDREG3, "wram mode 1M->2M");
-          if (!(d&1)) { // it didn't set the ret bit, which means it doesn't want to give WRAM to m68k
-            d &= ~3;
-            d |= (dold&1) ? 2 : 1; // then give it to the one which had bank0 in 1M mode
-          }
           wram_1M_to_2M(Pico_mcd->word_ram2M);
           remap_word_ram(d);
         }
-        // s68k can only set RET, writing 0 has no effect
-        else if ((dold ^ d) & d & 1) {   // RET being set
-          SekEndRunS68k(20+16+10+12+16); // see DMNA case
-        } else
-          d |= dold & 1;
-        if (d & 1)
-          d &= ~2;                       // DMNA clears
+        d = (d & ~3) | Pico_mcd->m.dmna_ret_2m;
       }
-      break;
+      goto write_comm;
     }
     case 4:
       elprintf(EL_CDREGS, "s68k CDC dest: %x", d&7);
@@ -363,21 +388,32 @@ void s68k_reg_write8(u32 a, u32 d)
       elprintf(EL_CDREGS, "s68k set CDC dma addr");
       break;
     case 0xc:
-    case 0xd:
-      elprintf(EL_CDREGS, "s68k set stopwatch timer");
-      Pico_mcd->m.timer_stopwatch = 0;
+    case 0xd: // 384 cycle stopwatch timer
+      elprintf(EL_CDREGS|EL_CD, "s68k clear stopwatch (%x)", d);
+      // does this also reset internal 384 cycle counter?
+      Pico_mcd->m.stopwatch_base_c = SekCyclesDoneS68k();
       return;
-    case 0xe:
-      Pico_mcd->s68k_regs[0xf] = (d>>1) | (d<<7); // ror8 1, Gens note: Dragons lair
-      return;
-    case 0x31:
-      elprintf(EL_CDREGS, "s68k set int3 timer: %02x", d);
-      Pico_mcd->m.timer_int3 = (d & 0xff) << 16;
+    case 0x0e:
+      d &= 0xff;
+      d = (d>>1) | (d<<7); // ror8 1, Gens note: Dragons lair
+      a = 0x0f;
+    case 0x0f:
+      goto write_comm;
+    case 0x31: // 384 cycle int3 timer
+      d &= 0xff;
+      elprintf(EL_CDREGS|EL_CD, "s68k set int3 timer: %02x", d);
+      Pico_mcd->s68k_regs[a] = (u8) d;
+      if (d) // d or d+1??
+        pcd_event_schedule_s68k(PCD_EVENT_TIMER3, d * 384);
+      else
+        pcd_event_schedule(0, PCD_EVENT_TIMER3, 0);
       break;
     case 0x33: // IRQ mask
-      elprintf(EL_CDREGS, "s68k irq mask: %02x", d);
-      if ((d&(1<<4)) && (Pico_mcd->s68k_regs[0x37]&4) && !(Pico_mcd->s68k_regs[0x33]&(1<<4))) {
-        CDD_Export_Status();
+      elprintf(EL_CDREGS|EL_CD, "s68k irq mask: %02x", d);
+      d &= 0x7e;
+      if ((d ^ Pico_mcd->s68k_regs[0x33]) & d & PCDS_IEN4) {
+        if (Pico_mcd->s68k_regs[0x37] & 4)
+          CDD_Export_Status();
       }
       break;
     case 0x34: // fader
@@ -399,6 +435,9 @@ void s68k_reg_write8(u32 a, u32 d)
       return;
   }
 
+  if ((a&0x1f0) == 0x20)
+    goto write_comm;
+
   if ((a&0x1f0) == 0x10 || (a >= 0x38 && a < 0x42))
   {
     elprintf(EL_UIO, "s68k FIXME: invalid write @ %02x?", a);
@@ -406,6 +445,13 @@ void s68k_reg_write8(u32 a, u32 d)
   }
 
   Pico_mcd->s68k_regs[a] = (u8) d;
+  return;
+
+write_comm:
+  Pico_mcd->s68k_regs[a] = (u8) d;
+  if (Pico_mcd->m.m68k_poll_cnt)
+    SekEndRunS68k(0);
+  Pico_mcd->m.m68k_poll_cnt = 0;
 }
 
 // -----------------------------------------------------------------
@@ -563,20 +609,10 @@ static void PicoWriteM68k16_io(u32 a, u32 d)
 {
   if ((a & 0xff00) == 0x2000) { // a12000 - a120ff
     elprintf(EL_CDREGS, "m68k_regs w16: [%02x] %04x @%06x", a&0x3f, d, SekPc);
-/* TODO FIXME?
-    if (a == 0xe) { // special case, 2 byte writes would be handled differently
-      Pico_mcd->s68k_regs[0xe] = d >> 8;
-#ifdef USE_POLL_DETECT
-      if ((s68k_poll_adclk&0xfe) == 0xe && s68k_poll_cnt > POLL_LIMIT) {
-        SekSetStopS68k(0); s68k_poll_adclk = 0;
-        elprintf(EL_CDPOLL, "s68k poll release, a=%02x", a);
-      }
-#endif
-      return;
-    }
-*/
+
     m68k_reg_write8(a,     d >> 8);
-    m68k_reg_write8(a + 1, d & 0xff);
+    if ((a & 0x3e) != 0x0e) // special case
+      m68k_reg_write8(a + 1, d & 0xff);
     return;
   }
 
@@ -769,20 +805,22 @@ static u32 PicoReadS68k8_pr(u32 a)
   // regs
   if ((a & 0xfe00) == 0x8000) {
     a &= 0x1ff;
-    elprintf(EL_CDREGS, "s68k_regs r8: [%02x] @ %06x", a, SekPcS68k);
     if (a >= 0x0e && a < 0x30) {
       d = Pico_mcd->s68k_regs[a];
       s68k_poll_detect(a, d);
-      elprintf(EL_CDREGS, "ret = %02x", (u8)d);
-      return d;
+      goto regs_done;
     }
     else if (a >= 0x58 && a < 0x68)
          d = gfx_cd_read(a & ~1);
     else d = s68k_reg_read16(a & ~1);
     if (!(a & 1))
       d >>= 8;
-    elprintf(EL_CDREGS, "ret = %02x", (u8)d);
-    return d & 0xff;
+
+regs_done:
+    d &= 0xff;
+    elprintf(EL_CDREGS, "s68k_regs r8: [%02x] %02x @ %06x",
+      a, d, SekPcS68k);
+    return d;
   }
 
   // PCM
@@ -810,11 +848,12 @@ static u32 PicoReadS68k16_pr(u32 a)
   // regs
   if ((a & 0xfe00) == 0x8000) {
     a &= 0x1fe;
-    elprintf(EL_CDREGS, "s68k_regs r16: [%02x] @ %06x", a, SekPcS68k);
     if (0x58 <= a && a < 0x68)
          d = gfx_cd_read(a);
     else d = s68k_reg_read16(a);
-    elprintf(EL_CDREGS, "ret = %04x", d);
+
+    elprintf(EL_CDREGS, "s68k_regs r16: [%02x] %04x @ %06x",
+      a, d, SekPcS68k);
     return d;
   }
 
@@ -917,11 +956,11 @@ static const void *s68k_dec_write16[2][4] = {
 
 // -----------------------------------------------------------------
 
-static void remap_prg_window(void)
+static void remap_prg_window(int r3)
 {
   // PRG RAM
   if (Pico_mcd->m.busreq & 2) {
-    void *bank = Pico_mcd->prg_ram_b[Pico_mcd->s68k_regs[3] >> 6];
+    void *bank = Pico_mcd->prg_ram_b[r3 >> 6];
     cpu68k_map_all_ram(0x020000, 0x03ffff, bank, 0);
   }
   else {
@@ -978,7 +1017,7 @@ static void remap_word_ram(int r3)
 #endif
 }
 
-void PicoMemStateLoaded(void)
+void pcd_state_loaded_mem(void)
 {
   int r3 = Pico_mcd->s68k_regs[3];
 
@@ -986,7 +1025,8 @@ void PicoMemStateLoaded(void)
   if (r3 & 4) // 1M mode?
     wram_2M_to_1M(Pico_mcd->word_ram2M);
   remap_word_ram(r3);
-  remap_prg_window();
+  remap_prg_window(r3);
+  Pico_mcd->m.dmna_ret_2m &= 3;
 
   // restore hint vector
   *(unsigned short *)(Pico_mcd->bios + 0x72) = Pico_mcd->m.hint_vector;
@@ -1096,9 +1136,6 @@ PICO_INTERNAL void PicoMemSetupCD(void)
 #ifdef EMU_M68K
   m68k_mem_setup_cd();
 #endif
-
-  // m68k_poll_addr = m68k_poll_cnt = 0;
-  s68k_poll_adclk = s68k_poll_cnt = 0;
 }
 
 
@@ -1147,3 +1184,4 @@ static void m68k_mem_setup_cd(void)
 }
 #endif // EMU_M68K
 
+// vim:shiftwidth=2:ts=2:expandtab