X-Git-Url: https://notaz.gp2x.de/cgi-bin/gitweb.cgi?a=blobdiff_plain;f=pico%2Fmemory.c;h=664fd72a22f83d82f55fc6a0d323235fe4412388;hb=75a30842c4f9e7e95a199361b9348c9f9dede0e6;hp=ac4b31fd05d95afa6f1515e62698676b919bc097;hpb=bf61bea0f2e94206a79fecc83b719f24cfc951c2;p=picodrive.git diff --git a/pico/memory.c b/pico/memory.c index ac4b31f..664fd72 100644 --- a/pico/memory.c +++ b/pico/memory.c @@ -1,11 +1,11 @@ -// This is part of Pico Library - -// (c) Copyright 2004 Dave, All rights reserved. -// (c) Copyright 2006-2009 notaz, All rights reserved. -// Free for non-commercial use. - -// For commercial use, separate licencing terms must be obtained. - +/* + * memory handling + * (c) Copyright Dave, 2004 + * (C) notaz, 2006-2010 + * + * This work is licensed under the terms of MAME license. + * See COPYING file in the top-level directory. + */ #include "pico_int.h" #include "memory.h" @@ -23,6 +23,11 @@ uptr m68k_write16_map[0x1000000 >> M68K_MEM_SHIFT]; static void xmap_set(uptr *map, int shift, int start_addr, int end_addr, const void *func_or_mh, int is_func) { +#ifdef __clang__ + // workaround bug (segfault) in + // Apple LLVM version 4.2 (clang-425.0.27) (based on LLVM 3.2svn) + volatile +#endif uptr addr = (uptr)func_or_mh; int mask = (1 << shift) - 1; int i; @@ -110,6 +115,11 @@ static void m68k_unmapped_write16(u32 a, u32 d) void m68k_map_unmap(int start_addr, int end_addr) { +#ifdef __clang__ + // workaround bug (segfault) in + // Apple LLVM version 4.2 (clang-425.0.27) (based on LLVM 3.2svn) + volatile +#endif uptr addr; int shift = M68K_MEM_SHIFT; int i; @@ -176,62 +186,119 @@ void cyclone_crashed(u32 pc, struct Cyclone *context) // ----------------------------------------------------------------- // memmap helpers -#ifndef _ASM_MEMORY_C -static -#endif -int PadRead(int i) +static u32 read_pad_3btn(int i, u32 out_bits) { - int pad,value,data_reg; - pad=~PicoPadInt[i]; // Get inverse of pad MXYZ SACB RLDU - data_reg=Pico.ioports[i+1]; + u32 pad = ~PicoPadInt[i]; // Get inverse of pad MXYZ SACB RLDU + u32 value; - // orr the bits, which are set as output - value = data_reg&(Pico.ioports[i+4]|0x80); + if (out_bits & 0x40) // TH + value = pad & 0x3f; // ?1CB RLDU + else + value = ((pad & 0xc0) >> 2) | (pad & 3); // ?0SA 00DU - if (PicoOpt & POPT_6BTN_PAD) - { - int phase = Pico.m.padTHPhase[i]; - - if(phase == 2 && !(data_reg&0x40)) { // TH - value|=(pad&0xc0)>>2; // ?0SA 0000 - return value; - } else if(phase == 3) { - if(data_reg&0x40) - value|=(pad&0x30)|((pad>>8)&0xf); // ?1CB MXYZ - else - value|=((pad&0xc0)>>2)|0x0f; // ?0SA 1111 - return value; - } + value |= out_bits & 0x40; + return value; +} + +static u32 read_pad_6btn(int i, u32 out_bits) +{ + u32 pad = ~PicoPadInt[i]; // Get inverse of pad MXYZ SACB RLDU + int phase = Pico.m.padTHPhase[i]; + u32 value; + + if (phase == 2 && !(out_bits & 0x40)) { + value = (pad & 0xc0) >> 2; // ?0SA 0000 + goto out; + } + else if(phase == 3) { + if (out_bits & 0x40) + return (pad & 0x30) | ((pad >> 8) & 0xf); // ?1CB MXYZ + else + return ((pad & 0xc0) >> 2) | 0x0f; // ?0SA 1111 + goto out; } - if(data_reg&0x40) // TH - value|=(pad&0x3f); // ?1CB RLDU - else value|=((pad&0xc0)>>2)|(pad&3); // ?0SA 00DU + if (out_bits & 0x40) // TH + value = pad & 0x3f; // ?1CB RLDU + else + value = ((pad & 0xc0) >> 2) | (pad & 3); // ?0SA 00DU - return value; // will mirror later +out: + value |= out_bits & 0x40; + return value; } -#ifndef _ASM_MEMORY_C +static u32 read_nothing(int i, u32 out_bits) +{ + return 0xff; +} -static u32 io_ports_read(u32 a) +typedef u32 (port_read_func)(int index, u32 out_bits); + +static port_read_func *port_readers[3] = { + read_pad_3btn, + read_pad_3btn, + read_nothing +}; + +static NOINLINE u32 port_read(int i) +{ + u32 data_reg = Pico.ioports[i + 1]; + u32 ctrl_reg = Pico.ioports[i + 4] | 0x80; + u32 in, out; + + out = data_reg & ctrl_reg; + out |= 0x7f & ~ctrl_reg; // pull-ups + + in = port_readers[i](i, out); + + return (in & ~ctrl_reg) | (data_reg & ctrl_reg); +} + +void PicoSetInputDevice(int port, enum input_device device) +{ + port_read_func *func; + + if (port < 0 || port > 2) + return; + + switch (device) { + case PICO_INPUT_PAD_3BTN: + func = read_pad_3btn; + break; + + case PICO_INPUT_PAD_6BTN: + func = read_pad_6btn; + break; + + default: + func = read_nothing; + break; + } + + port_readers[port] = func; +} + +NOINLINE u32 io_ports_read(u32 a) { u32 d; a = (a>>1) & 0xf; switch (a) { case 0: d = Pico.m.hardware; break; // Hardware value (Version register) - case 1: d = PadRead(0); break; - case 2: d = PadRead(1); break; + case 1: d = port_read(0); break; + case 2: d = port_read(1); break; + case 3: d = port_read(2); break; default: d = Pico.ioports[a]; break; // IO ports can be used as RAM } return d; } -static void NOINLINE io_ports_write(u32 a, u32 d) +NOINLINE void io_ports_write(u32 a, u32 d) { a = (a>>1) & 0xf; // 6 button gamepad: if TH went from 0 to 1, gamepad changes state - if (1 <= a && a <= 2 && (PicoOpt & POPT_6BTN_PAD)) + if (1 <= a && a <= 2) { Pico.m.padDelay[a - 1] = 0; if (!(Pico.ioports[a] & 0x40) && (d & 0x40)) @@ -242,8 +309,6 @@ static void NOINLINE io_ports_write(u32 a, u32 d) Pico.ioports[a] = d; } -#endif // _ASM_MEMORY_C - void NOINLINE ctl_write_z80busreq(u32 d) { d&=1; d^=1; @@ -726,13 +791,13 @@ PICO_INTERNAL void PicoMemSetup(void) int i; // by default, point everything to first 64k of ROM for (i = 0; i < M68K_FETCHBANK1; i++) - PicoCpuFM68k.Fetch[i] = (unsigned int)Pico.rom - (i<<(24-FAMEC_FETCHBITS)); + PicoCpuFM68k.Fetch[i] = (unsigned long)Pico.rom - (i<<(24-FAMEC_FETCHBITS)); // now real ROM for (i = 0; i < M68K_FETCHBANK1 && (i<<(24-FAMEC_FETCHBITS)) < Pico.romsize; i++) - PicoCpuFM68k.Fetch[i] = (unsigned int)Pico.rom; + PicoCpuFM68k.Fetch[i] = (unsigned long)Pico.rom; // .. and RAM for (i = M68K_FETCHBANK1*14/16; i < M68K_FETCHBANK1; i++) - PicoCpuFM68k.Fetch[i] = (unsigned int)Pico.ram - (i<<(24-FAMEC_FETCHBITS)); + PicoCpuFM68k.Fetch[i] = (unsigned long)Pico.ram - (i<<(24-FAMEC_FETCHBITS)); } #endif #ifdef EMU_M68K @@ -1167,3 +1232,4 @@ static void z80_mem_setup(void) #endif } +// vim:shiftwidth=2:ts=2:expandtab