X-Git-Url: https://notaz.gp2x.de/cgi-bin/gitweb.cgi?a=blobdiff_plain;f=pico%2Fmemory_arm.s;h=f6d7f79d04d2fcb9ccfcffc861ee7c18289b6d72;hb=653f0b1399313ecef86d99a2552f40fb9e51b820;hp=e2b5990eec7fec917d2207525da9580e62eda86e;hpb=0ace9b9aac5de8f1ee5bf181132f98a1f81f4a1d;p=picodrive.git diff --git a/pico/memory_arm.s b/pico/memory_arm.s index e2b5990..f6d7f79 100644 --- a/pico/memory_arm.s +++ b/pico/memory_arm.s @@ -1,16 +1,15 @@ -@ vim:filetype=armasm - -@ (c) Copyright 2006-2009, Grazvydas "notaz" Ignotas -@ All Rights Reserved - - -@@ .include "port_config.s" +/* + * PicoDrive + * (C) notaz, 2006-2009 + * + * This work is licensed under the terms of MAME license. + * See COPYING file in the top-level directory. + */ .equ SRR_MAPPED, (1 << 0) .equ SRR_READONLY, (1 << 1) .equ SRF_EEPROM, (1 << 1) -.equ POPT_6BTN_PAD, (1 << 5) -.equ POPT_DIS_32X, (1 << 20) +.equ POPT_EN_32X, (1 << 20) .text .align 4 @@ -27,7 +26,7 @@ PicoRead8_sram: @ u32 a, u32 d ldr r3, =(Pico+0x22200) ldr r1, [r2, #8] @ SRam.end cmp r0, r1 - bge m_read8_nosram + bgt m_read8_nosram ldr r1, [r2, #4] @ SRam.start cmp r0, r1 blt m_read8_nosram @@ -58,8 +57,8 @@ m_read8_nosram: m_read8_eeprom: stmfd sp!,{r0,lr} bl EEPROM_read - ldmfd sp!,{r0,lr} - tst r0, #1 + ldmfd sp!,{r1,lr} + tst r1, #1 moveq r0, r0, lsr #8 bx lr @@ -67,24 +66,7 @@ m_read8_eeprom: PicoRead8_io: @ u32 a, u32 d bic r2, r0, #0x001f @ most commonly we get i/o port read, cmp r2, #0xa10000 @ so check for it first - bne m_read8_not_io - -m_read8_misc_io: - ands r0, r0, #0x1e - beq m_read8_misc_hwreg - cmp r0, #4 - movlt r0, #0 - moveq r0, #1 - ble PadRead - ldr r3, =(Pico+0x22000) - mov r0, r0, lsr #1 @ other IO ports (Pico.ioports[a]) - ldrb r0, [r3, r0] - bx lr - -m_read8_misc_hwreg: - ldr r3, =(Pico+0x22200) - ldrb r0, [r3, #0x0f] @ Pico.m.hardware - bx lr + beq io_ports_read m_read8_not_io: and r2, r0, #0xfc00 @@ -114,8 +96,8 @@ m_read8_not_io: m_read8_not_brq: ldr r2, =PicoOpt ldr r2, [r2] - tst r2, #POPT_DIS_32X - beq PicoRead8_32x + tst r2, #POPT_EN_32X + bne PicoRead8_32x mov r0, #0 bx lr @@ -126,7 +108,7 @@ PicoRead16_sram: @ u32 a, u32 d ldr r3, =(Pico+0x22200) ldr r1, [r2, #8] @ SRam.end cmp r0, r1 - bge m_read16_nosram + bgt m_read16_nosram ldr r1, [r2, #4] @ SRam.start cmp r0, r1 blt m_read16_nosram @@ -161,7 +143,7 @@ PicoRead16_io: @ u32 a, u32 d cmp r2, #0xa10000 @ so check for it first bne m_read16_not_io stmfd sp!,{lr} - bl m_read8_misc_io @ same as read8 + bl io_ports_read @ same as read8 orr r0, r0, r0, lsl #8 @ only has bytes mirrored ldmfd sp!,{pc} @@ -190,8 +172,8 @@ m_read16_not_io: m_read16_not_brq: ldr r2, =PicoOpt ldr r2, [r2] - tst r2, #POPT_DIS_32X - beq PicoRead16_32x + tst r2, #POPT_EN_32X + bne PicoRead16_32x mov r0, #0 bx lr @@ -201,37 +183,7 @@ PicoWrite8_io: @ u32 a, u32 d bic r2, r0, #0x1e @ most commonly we get i/o port write, eor r2, r2, #0xa10000 @ so check for it first eors r2, r2, #1 - bne m_write8_not_io - -m_write8_io: - ldr r2, =PicoOpt - and r0, r0, #0x1e - ldr r2, [r2] - ldr r3, =(Pico+0x22000) @ Pico.ioports - tst r2, #POPT_6BTN_PAD - beq m_write8_io_done - cmp r0, #2 - cmpne r0, #4 - bne m_write8_io_done @ not likely to happen - add r2, r3, #0x200 @ Pico+0x22200 - mov r12,#0 - cmp r0, #2 - streqb r12,[r2,#0x18] - strneb r12,[r2,#0x19] @ Pico.m.padDelay[i] = 0 - tst r1, #0x40 @ TH - beq m_write8_io_done - ldrb r12,[r3, r0, lsr #1] - tst r12,#0x40 - bne m_write8_io_done - cmp r0, #2 - ldreqb r12,[r2,#0x0a] - ldrneb r12,[r2,#0x0b] @ Pico.m.padTHPhase - add r12,r12,#1 - streqb r12,[r2,#0x0a] - strneb r12,[r2,#0x0b] @ Pico.m.padTHPhase -m_write8_io_done: - strb r1, [r3, r0, lsr #1] - bx lr + beq io_ports_write m_write8_not_io: tst r0, #1 @@ -261,8 +213,8 @@ m_write8_not_z80ctl: m_write8_not_sreg: ldr r2, =PicoOpt ldr r2, [r2] - tst r2, #POPT_DIS_32X - beq PicoWrite8_32x + tst r2, #POPT_EN_32X + bne PicoWrite8_32x bx lr @ @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@ @@ -270,7 +222,7 @@ m_write8_not_sreg: PicoWrite16_io: @ u32 a, u32 d bic r2, r0, #0x1f @ most commonly we get i/o port write, cmp r2, #0xa10000 @ so check for it first - beq m_write8_io + beq io_ports_write m_write16_not_io: and r2, r0, #0xff00 @@ -298,9 +250,10 @@ m_write16_not_z80ctl: m_write16_not_sreg: ldr r2, =PicoOpt ldr r2, [r2] - tst r2, #POPT_DIS_32X - beq PicoWrite16_32x + tst r2, #POPT_EN_32X + bne PicoWrite16_32x bx lr .pool +@ vim:filetype=armasm