X-Git-Url: https://notaz.gp2x.de/cgi-bin/gitweb.cgi?a=blobdiff_plain;f=pico%2Fpico_cmn.c;h=50b8ced14b5fc3cbc130e868648529949126a662;hb=93f9619ed819dee07948416c98ca2f1c70a22666;hp=01d57a727ca472d732f62c18c73482f02d71ab2e;hpb=3162a7104cbb9c1046a3d780dfc74bbc684bdc5b;p=picodrive.git diff --git a/pico/pico_cmn.c b/pico/pico_cmn.c index 01d57a7..50b8ced 100644 --- a/pico/pico_cmn.c +++ b/pico/pico_cmn.c @@ -7,7 +7,7 @@ */ #define CYCLES_M68K_LINE 488 // suitable for both PAL/NTSC -#define CYCLES_M68K_VINT_LAG 68 +#define CYCLES_M68K_VINT_LAG 112 // pad delay (for 6 button pads) #define PAD_DELAY() { \ @@ -21,24 +21,24 @@ SekRunM68k(m68k_cycles) #endif -// sync m68k to SekCycleAim +// sync m68k to Pico.t.m68c_aim static void SekSyncM68k(void) { int cyc_do; pprof_start(m68k); pevt_log_m68k_o(EVT_RUN_START); - while ((cyc_do = SekCycleAim - SekCycleCnt) > 0) { - SekCycleCnt += cyc_do; + while ((cyc_do = Pico.t.m68c_aim - Pico.t.m68c_cnt) > 0) { + Pico.t.m68c_cnt += cyc_do; #if defined(EMU_C68K) PicoCpuCM68k.cycles = cyc_do; CycloneRun(&PicoCpuCM68k); - SekCycleCnt -= PicoCpuCM68k.cycles; + Pico.t.m68c_cnt -= PicoCpuCM68k.cycles; #elif defined(EMU_M68K) - SekCycleCnt += m68k_execute(cyc_do) - cyc_do; + Pico.t.m68c_cnt += m68k_execute(cyc_do) - cyc_do; #elif defined(EMU_F68K) - SekCycleCnt += fm68k_emulate(cyc_do, 0) - cyc_do; + Pico.t.m68c_cnt += fm68k_emulate(&PicoCpuFM68k, cyc_do, 0) - cyc_do; #endif } @@ -49,13 +49,13 @@ static void SekSyncM68k(void) pprof_end(m68k); } -static inline void SekRunM68k(int cyc) +static __inline void SekRunM68k(int cyc) { - SekCycleAim += cyc; - cyc = SekCycleAim - SekCycleCnt; + Pico.t.m68c_aim += cyc; + cyc = Pico.t.m68c_aim - Pico.t.m68c_cnt; if (cyc <= 0) return; - SekCycleCnt += cyc >> 6; // refresh slowdowns + Pico.t.m68c_cnt += cyc >> 6; // refresh slowdowns SekSyncM68k(); } @@ -68,10 +68,28 @@ static void do_hint(struct PicoVideo *pv) } } +static void do_timing_hacks_as(struct PicoVideo *pv, int vdp_slots) +{ + pv->lwrite_cnt += vdp_slots - Pico.m.dma_xfers * 2; // wrong *2 + if (pv->lwrite_cnt > vdp_slots) + pv->lwrite_cnt = vdp_slots; + else if (pv->lwrite_cnt < 0) + pv->lwrite_cnt = 0; + if (Pico.m.dma_xfers) + SekCyclesBurn(CheckDMA()); +} + +static void do_timing_hacks_vb(void) +{ + if (Pico.m.dma_xfers) + SekCyclesBurn(CheckDMA()); +} + static int PicoFrameHints(void) { struct PicoVideo *pv = &Pico.video; int line_sample = Pico.m.pal ? 68 : 93; + int vdp_slots = (Pico.video.reg[12] & 1) ? 18 : 16; int lines, y, lines_vis, skip; int vcnt_wrap, vcnt_adj; unsigned int cycles; @@ -79,7 +97,7 @@ static int PicoFrameHints(void) pevt_log_m68k_o(EVT_FRAME_START); - if ((PicoOpt&POPT_ALT_RENDERER) && !PicoSkipFrame && (pv->reg[1]&0x40)) { // fast rend., display enabled + if ((PicoIn.opt&POPT_ALT_RENDERER) && !PicoIn.skipFrame && (pv->reg[1]&0x40)) { // fast rend., display enabled // draw a frame just after vblank in alternative render mode // yes, this will cause 1 frame lag, but this is inaccurate mode anyway. PicoFrameFull(); @@ -88,9 +106,9 @@ static int PicoFrameHints(void) #endif skip = 1; } - else skip=PicoSkipFrame; + else skip=PicoIn.skipFrame; - timing.m68c_frame_start = SekCyclesDone(); + Pico.t.m68c_frame_start = Pico.t.m68c_aim; pv->v_counter = Pico.m.scanline = 0; z80_resetCycles(); PsndStartFrame(); @@ -112,13 +130,6 @@ static int PicoFrameHints(void) if ((y == 224 && !(pv->reg[1] & 8)) || y == 240) break; - // VDP FIFO - pv->lwrite_cnt -= 12; - if (pv->lwrite_cnt <= 0) { - pv->lwrite_cnt = 0; - Pico.video.status |= SR_EMPT; - } - PAD_DELAY(); // H-Interrupts: @@ -129,7 +140,7 @@ static int PicoFrameHints(void) } // decide if we draw this line - if (!skip && (PicoOpt & POPT_ALT_RENDERER)) + if (!skip && (PicoIn.opt & POPT_ALT_RENDERER)) { // find the right moment for frame renderer, when display is no longer blanked if ((pv->reg[1]&0x40) || y > 100) { @@ -146,10 +157,10 @@ static int PicoFrameHints(void) { cycles = SekCyclesDone(); - if (Pico.m.z80Run && !Pico.m.z80_reset && (PicoOpt&POPT_EN_Z80)) + if (Pico.m.z80Run && !Pico.m.z80_reset && (PicoIn.opt&POPT_EN_Z80)) PicoSyncZ80(cycles); #ifdef PICO_CD - if (PicoAHW & PAHW_MCD) + if (PicoIn.AHW & PAHW_MCD) pcd_sync_s68k(cycles, 0); #endif #ifdef PICO_32X @@ -159,8 +170,8 @@ static int PicoFrameHints(void) } // Run scanline: - line_base_cycles = SekCyclesDone(); - if (Pico.m.dma_xfers) SekCyclesBurn(CheckDMA()); + Pico.t.m68c_line_start = Pico.t.m68c_aim; + do_timing_hacks_as(pv, vdp_slots); CPUS_RUN(CYCLES_M68K_LINE); if (PicoLineHook) PicoLineHook(); @@ -184,7 +195,7 @@ static int PicoFrameHints(void) pv->lwrite_cnt = 0; Pico.video.status |= SR_EMPT; - memcpy(PicoPadInt, PicoPad, sizeof(PicoPadInt)); + memcpy(PicoIn.padInt, PicoIn.pad, sizeof(PicoIn.padInt)); PAD_DELAY(); // Last H-Int (normally): @@ -194,31 +205,34 @@ static int PicoFrameHints(void) do_hint(pv); } - pv->status |= SR_VB; // go into vblank - pv->pending_ints |= 0x20; + pv->status |= SR_VB | PVS_VB2; // go into vblank // the following SekRun is there for several reasons: // there must be a delay after vblank bit is set and irq is asserted (Mazin Saga) // also delay between F bit (bit 7) is set in SR and IRQ happens (Ex-Mutants) // also delay between last H-int and V-int (Golden Axe 3) - line_base_cycles = SekCyclesDone(); - if (Pico.m.dma_xfers) SekCyclesBurn(CheckDMA()); + Pico.t.m68c_line_start = Pico.t.m68c_aim; + do_timing_hacks_vb(); CPUS_RUN(CYCLES_M68K_VINT_LAG); + pv->status |= SR_F; + pv->pending_ints |= 0x20; if (pv->reg[1] & 0x20) { + Pico.t.m68c_aim = Pico.t.m68c_cnt + 11; // HACK + SekSyncM68k(); elprintf(EL_INTS, "vint: @ %06x [%u]", SekPc, SekCyclesDone()); SekInterrupt(6); } cycles = SekCyclesDone(); - if (Pico.m.z80Run && !Pico.m.z80_reset && (PicoOpt&POPT_EN_Z80)) { + if (Pico.m.z80Run && !Pico.m.z80_reset && (PicoIn.opt&POPT_EN_Z80)) { PicoSyncZ80(cycles); elprintf(EL_INTS, "zint"); z80_int(); } #ifdef PICO_CD - if (PicoAHW & PAHW_MCD) + if (PicoIn.AHW & PAHW_MCD) pcd_sync_s68k(cycles, 0); #endif #ifdef PICO_32X @@ -265,19 +279,21 @@ static int PicoFrameHints(void) } // Run scanline: - line_base_cycles = SekCyclesDone(); - if (Pico.m.dma_xfers) SekCyclesBurn(CheckDMA()); + Pico.t.m68c_line_start = Pico.t.m68c_aim; + do_timing_hacks_vb(); CPUS_RUN(CYCLES_M68K_LINE); if (PicoLineHook) PicoLineHook(); pevt_log_m68k_o(EVT_NEXT_LINE); } - pv->status &= ~SR_VB; + pv->status &= ~(SR_VB | PVS_VB2); + pv->status |= ((pv->reg[1] >> 3) ^ SR_VB) & SR_VB; // forced blanking // last scanline Pico.m.scanline = y; pv->v_counter = 0xff; + pv->lwrite_cnt = 0; PAD_DELAY(); @@ -288,8 +304,8 @@ static int PicoFrameHints(void) } // Run scanline: - line_base_cycles = SekCyclesDone(); - if (Pico.m.dma_xfers) SekCyclesBurn(CheckDMA()); + Pico.t.m68c_line_start = Pico.t.m68c_aim; + do_timing_hacks_as(pv, vdp_slots); CPUS_RUN(CYCLES_M68K_LINE); if (PicoLineHook) PicoLineHook(); @@ -297,7 +313,7 @@ static int PicoFrameHints(void) // sync cpus cycles = SekCyclesDone(); - if (Pico.m.z80Run && !Pico.m.z80_reset && (PicoOpt&POPT_EN_Z80)) + if (Pico.m.z80Run && !Pico.m.z80_reset && (PicoIn.opt&POPT_EN_Z80)) PicoSyncZ80(cycles); if (PsndOut && ym2612.dacen && PsndDacLine < lines) PsndDoDAC(lines - 1); @@ -305,7 +321,7 @@ static int PicoFrameHints(void) PsndDoPSG(lines - 1); #ifdef PICO_CD - if (PicoAHW & PAHW_MCD) + if (PicoIn.AHW & PAHW_MCD) pcd_sync_s68k(cycles, 0); #endif #ifdef PICO_32X