X-Git-Url: https://notaz.gp2x.de/cgi-bin/gitweb.cgi?a=blobdiff_plain;f=pico%2Fpico_int.h;h=339d1bf14df3492f32f74b3e565d343356ce0195;hb=f81107f59093904c3daac2e9c257261fddc6caf0;hp=5fe8d942bda848c5588b5fe8e610734f1e7a3a38;hpb=9c9cda8c39bd2a6b99b8420a3034c454bc713954;p=picodrive.git diff --git a/pico/pico_int.h b/pico/pico_int.h index 5fe8d94..339d1bf 100644 --- a/pico/pico_int.h +++ b/pico/pico_int.h @@ -240,26 +240,28 @@ extern SH2 sh2s[2]; #ifndef DRC_SH2 # define sh2_end_run(sh2, after_) do { \ if ((sh2)->icount > (after_)) { \ - (sh2)->cycles_timeslice -= (sh2)->icount; \ + (sh2)->cycles_timeslice -= (sh2)->icount - (after_); \ (sh2)->icount = after_; \ } \ } while (0) # define sh2_cycles_left(sh2) (sh2)->icount -# define sh2_pc(c) (c) ? ssh2.ppc : msh2.ppc +# define sh2_pc(sh2) (sh2)->ppc #else # define sh2_end_run(sh2, after_) do { \ int left_ = (signed int)(sh2)->sr >> 12; \ if (left_ > (after_)) { \ - (sh2)->cycles_timeslice -= left_; \ + (sh2)->cycles_timeslice -= left_ - (after_); \ (sh2)->sr &= 0xfff; \ (sh2)->sr |= (after_) << 12; \ } \ } while (0) # define sh2_cycles_left(sh2) ((signed int)(sh2)->sr >> 12) -# define sh2_pc(c) (c) ? ssh2.pc : msh2.pc +# define sh2_pc(sh2) (sh2)->pc #endif #define sh2_cycles_done(sh2) ((int)(sh2)->cycles_timeslice - sh2_cycles_left(sh2)) +#define sh2_cycles_done_t(sh2) \ + ((sh2)->m68krcycles_done * 3 + sh2_cycles_done(sh2)) #define sh2_cycles_done_m68k(sh2) \ ((sh2)->m68krcycles_done + (sh2_cycles_done(sh2) / 3)) @@ -465,12 +467,12 @@ typedef struct #define P32XV_nFEN (1<< 1) #define P32XV_FS (1<< 0) -#define P32XP_FULL (1<<15) // PWM +#define P32XP_RTP (1<<7) // PWM control +#define P32XP_FULL (1<<15) // PWM pulse #define P32XP_EMPTY (1<<14) #define P32XF_68KCPOLL (1 << 0) #define P32XF_68KVPOLL (1 << 1) -#define P32XF_PWM_PEND (1 << 6) #define P32XI_VRES (1 << 14/2) // IRL/2 #define P32XI_VINT (1 << 12/2) @@ -488,6 +490,7 @@ typedef struct #define SH2_DRCBLK_RAM_SHIFT 1 #define SH2_DRCBLK_DA_SHIFT 1 +#define SH2_READ_SHIFT 25 #define SH2_WRITE_SHIFT 25 struct Pico32x @@ -502,12 +505,15 @@ struct Pico32x unsigned char sh2irqi[2]; // individual unsigned int sh2irqs; // common irqs unsigned short dmac_fifo[DMAC_FIFO_LEN]; - unsigned int dmac_ptr; - unsigned int pwm_irq_sample_cnt; + unsigned int dmac0_fifo_ptr; + unsigned int pad; unsigned char comm_dirty_68k; unsigned char comm_dirty_sh2; - unsigned short pad; - unsigned int reserved[8]; + unsigned char pwm_irq_cnt; + unsigned char pad1; + unsigned short pwm_p[2]; // pwm pos in fifo + unsigned int pwm_cycle_p; // pwm play cursor (32x cycles) + unsigned int reserved[6]; }; struct Pico32xMem @@ -521,7 +527,6 @@ struct Pico32xMem unsigned char m68k_rom[0x100]; unsigned char m68k_rom_bank[0x10000]; // M68K_BANK_SIZE }; - unsigned char data_array[2][0x1000]; // cache in SH2s (can be used as RAM) #ifdef DRC_SH2 unsigned short drcblk_da[2][1 << (12 - SH2_DRCBLK_DA_SHIFT)]; #endif @@ -529,8 +534,8 @@ struct Pico32xMem unsigned char sh2_rom_s[0x400]; unsigned short pal[0x100]; unsigned short pal_native[0x100]; // converted to native (for renderer) - unsigned int sh2_peri_regs[2][0x200/4]; // periphereal regs of SH2s signed short pwm[2*PWM_BUFF_LEN]; // PWM buffer for current frame + signed short pwm_fifo[2][4]; // [0] - current, others - fifo entries }; // area.c @@ -581,6 +586,7 @@ unsigned int PicoRead8_io(unsigned int a); unsigned int PicoRead16_io(unsigned int a); void PicoWrite8_io(unsigned int a, unsigned int d); void PicoWrite16_io(unsigned int a, unsigned int d); +void p32x_dreq1_trigger(void); // pico/memory.c PICO_INTERNAL void PicoMemSetupPico(void); @@ -739,7 +745,7 @@ void PicoFrame32x(void); void Pico32xStateLoaded(int is_early); void p32x_sync_sh2s(unsigned int m68k_target); void p32x_sync_other_sh2(SH2 *sh2, unsigned int m68k_target); -void p32x_update_irls(SH2 *active_sh2); +void p32x_update_irls(SH2 *active_sh2, int m68k_cycles); void p32x_reset_sh2s(void); void p32x_event_schedule(unsigned int now, enum p32x_event event, int after); void p32x_event_schedule_sh2(SH2 *sh2, enum p32x_event event, int after); @@ -771,13 +777,29 @@ enum { extern int Pico32xDrawMode; // 32x/pwm.c -unsigned int p32x_pwm_read16(unsigned int a); -void p32x_pwm_write16(unsigned int a, unsigned int d); +unsigned int p32x_pwm_read16(unsigned int a, SH2 *sh2, + unsigned int m68k_cycles); +void p32x_pwm_write16(unsigned int a, unsigned int d, + SH2 *sh2, unsigned int m68k_cycles); void p32x_pwm_update(int *buf32, int length, int stereo); -void p32x_timers_do(unsigned int cycles); -void p32x_timers_recalc(void); -void p32x_pwm_schedule(unsigned int now); +void p32x_pwm_ctl_changed(void); +void p32x_pwm_schedule(unsigned int m68k_now); void p32x_pwm_schedule_sh2(SH2 *sh2); +void p32x_pwm_irq_event(unsigned int m68k_now); +void p32x_pwm_state_loaded(void); + +// 32x/sh2soc.c +void p32x_dreq0_trigger(void); +void p32x_dreq1_trigger(void); +void p32x_timers_recalc(void); +void p32x_timers_do(unsigned int m68k_slice); +unsigned int sh2_peripheral_read8(unsigned int a, SH2 *sh2); +unsigned int sh2_peripheral_read16(unsigned int a, SH2 *sh2); +unsigned int sh2_peripheral_read32(unsigned int a, SH2 *sh2); +void sh2_peripheral_write8(unsigned int a, unsigned int d, SH2 *sh2); +void sh2_peripheral_write16(unsigned int a, unsigned int d, SH2 *sh2); +void sh2_peripheral_write32(unsigned int a, unsigned int d, SH2 *sh2); + #else #define Pico32xInit() #define PicoPower32x() @@ -805,7 +827,7 @@ static __inline int isspace_(int c) # ifdef __x86_64__ // HACK # define EL_LOGMASK (EL_STATUS|EL_IDLE|EL_ANOMALY) # else -# define EL_LOGMASK (EL_STATUS|EL_IDLE) +# define EL_LOGMASK (EL_STATUS) # endif #endif @@ -830,6 +852,7 @@ static __inline int isspace_(int c) #define EL_CDREG3 0x00040000 /* MCD: register 3 only */ #define EL_32X 0x00080000 #define EL_PWM 0x00100000 /* 32X PWM stuff (LOTS of output) */ +#define EL_32XP 0x00200000 /* 32X peripherals */ #define EL_STATUS 0x40000000 /* status messages */ #define EL_ANOMALY 0x80000000 /* some unexpected conditions (during emulation) */