X-Git-Url: https://notaz.gp2x.de/cgi-bin/gitweb.cgi?a=blobdiff_plain;f=pico%2Fpico_int.h;h=339d1bf14df3492f32f74b3e565d343356ce0195;hb=f81107f59093904c3daac2e9c257261fddc6caf0;hp=afcc838ee88ea99b6e2daed00d7dd067d6930ca6;hpb=4ea707e1e38b7ca204a5012f617018d0ea5eced2;p=picodrive.git diff --git a/pico/pico_int.h b/pico/pico_int.h index afcc838..339d1bf 100644 --- a/pico/pico_int.h +++ b/pico/pico_int.h @@ -1,10 +1,11 @@ -// Pico Library - Internal Header File - -// (c) Copyright 2004 Dave, All rights reserved. -// (c) Copyright 2006-2008 Grazvydas "notaz" Ignotas, all rights reserved. -// Free for non-commercial use. - -// For commercial use, separate licencing terms must be obtained. +/* + * PicoDrive - Internal Header File + * (c) Copyright Dave, 2004 + * (C) notaz, 2006-2010 + * + * This work is licensed under the terms of MAME license. + * See COPYING file in the top-level directory. + */ #ifndef PICO_INTERNAL_INCLUDED #define PICO_INTERNAL_INCLUDED @@ -34,7 +35,7 @@ extern "C" { // ----------------------- 68000 CPU ----------------------- #ifdef EMU_C68K -#include "../cpu/Cyclone/Cyclone.h" +#include "../cpu/cyclone/Cyclone.h" extern struct Cyclone PicoCpuCM68k, PicoCpuCS68k; #define SekCyclesLeftNoMCD PicoCpuCM68k.cycles // cycles left for this run #define SekCyclesLeft \ @@ -45,12 +46,16 @@ extern struct Cyclone PicoCpuCM68k, PicoCpuCS68k; #define SekEndTimesliceS68k(after) PicoCpuCS68k.cycles=after #define SekPc (PicoCpuCM68k.pc-PicoCpuCM68k.membase) #define SekPcS68k (PicoCpuCS68k.pc-PicoCpuCS68k.membase) +#define SekDar(x) (x < 8 ? PicoCpuCM68k.d[x] : PicoCpuCM68k.a[x - 8]) +#define SekSr CycloneGetSr(&PicoCpuCM68k) #define SekSetStop(x) { PicoCpuCM68k.state_flags&=~1; if (x) { PicoCpuCM68k.state_flags|=1; PicoCpuCM68k.cycles=0; } } #define SekSetStopS68k(x) { PicoCpuCS68k.state_flags&=~1; if (x) { PicoCpuCS68k.state_flags|=1; PicoCpuCS68k.cycles=0; } } +#define SekIsStoppedM68k() (PicoCpuCM68k.state_flags&1) #define SekIsStoppedS68k() (PicoCpuCS68k.state_flags&1) #define SekShouldInterrupt (PicoCpuCM68k.irq > (PicoCpuCM68k.srh&7)) #define SekInterrupt(i) PicoCpuCM68k.irq=i +#define SekIrqLevel PicoCpuCM68k.irq #ifdef EMU_M68K #define EMU_CORE_DEBUG @@ -69,6 +74,8 @@ extern M68K_CONTEXT PicoCpuFM68k, PicoCpuFS68k; #define SekEndTimesliceS68k(after) PicoCpuFS68k.io_cycle_counter=after #define SekPc fm68k_get_pc(&PicoCpuFM68k) #define SekPcS68k fm68k_get_pc(&PicoCpuFS68k) +#define SekDar(x) (x < 8 ? PicoCpuFM68k.dreg[x].D : PicoCpuFM68k.areg[x - 8].D) +#define SekSr PicoCpuFM68k.sr #define SekSetStop(x) { \ PicoCpuFM68k.execinfo &= ~FM68K_HALTED; \ if (x) { PicoCpuFM68k.execinfo |= FM68K_HALTED; PicoCpuFM68k.io_cycle_counter = 0; } \ @@ -77,10 +84,12 @@ extern M68K_CONTEXT PicoCpuFM68k, PicoCpuFS68k; PicoCpuFS68k.execinfo &= ~FM68K_HALTED; \ if (x) { PicoCpuFS68k.execinfo |= FM68K_HALTED; PicoCpuFS68k.io_cycle_counter = 0; } \ } +#define SekIsStoppedM68k() (PicoCpuFM68k.execinfo&FM68K_HALTED) #define SekIsStoppedS68k() (PicoCpuFS68k.execinfo&FM68K_HALTED) #define SekShouldInterrupt fm68k_would_interrupt() #define SekInterrupt(irq) PicoCpuFM68k.interrupts[0]=irq +#define SekIrqLevel PicoCpuFM68k.interrupts[0] #ifdef EMU_M68K #define EMU_CORE_DEBUG @@ -100,6 +109,8 @@ extern m68ki_cpu_core PicoCpuMM68k, PicoCpuMS68k; #define SekEndTimesliceS68k(after) PicoCpuMS68k.cyc_remaining_cycles=after #define SekPc m68k_get_reg(&PicoCpuMM68k, M68K_REG_PC) #define SekPcS68k m68k_get_reg(&PicoCpuMS68k, M68K_REG_PC) +#define SekDar(x) PicoCpuMM68k.dar[x] +#define SekSr m68k_get_reg(&PicoCpuMM68k, M68K_REG_SR) #define SekSetStop(x) { \ if(x) { SET_CYCLES(0); PicoCpuMM68k.stopped=STOP_LEVEL_STOP; } \ else PicoCpuMM68k.stopped=0; \ @@ -108,6 +119,7 @@ extern m68ki_cpu_core PicoCpuMM68k, PicoCpuMS68k; if(x) { SET_CYCLES(0); PicoCpuMS68k.stopped=STOP_LEVEL_STOP; } \ else PicoCpuMS68k.stopped=0; \ } +#define SekIsStoppedM68k() (PicoCpuMM68k.stopped==STOP_LEVEL_STOP) #define SekIsStoppedS68k() (PicoCpuMS68k.stopped==STOP_LEVEL_STOP) #define SekShouldInterrupt (CPU_INT_LEVEL > FLAG_INT_MASK) @@ -117,6 +129,7 @@ extern m68ki_cpu_core PicoCpuMM68k, PicoCpuMS68k; m68k_set_irq(irq); \ m68k_set_context(oldcontext); \ } +#define SekIrqLevel (PicoCpuMM68k.int_level >> 8) #endif #endif // EMU_M68K @@ -133,6 +146,7 @@ extern unsigned int SekCycleCntT; // total cycle counter, updated once per frame #define SekCyclesBurn(c) SekCycleCnt+=c #define SekCyclesDone() (SekCycleAim-SekCyclesLeft) // number of cycles done in this frame (can be checked anywhere) #define SekCyclesDoneT() (SekCycleCntT+SekCyclesDone()) // total nuber of cycles done for this rom +#define SekCyclesDoneT2() (SekCycleCntT + SekCycleCnt) // same as above but not from memhandlers #define SekEndRun(after) { \ SekCycleCnt -= SekCyclesLeft - (after); \ @@ -169,14 +183,7 @@ extern int dbg_irq_level; // ----------------------- Z80 CPU ----------------------- -#if defined(_USE_MZ80) -#include "../cpu/mz80/mz80.h" - -#define z80_run(cycles) { mz80GetElapsedTicks(1); mz80_run(cycles) } -#define z80_run_nr(cycles) mz80_run(cycles) -#define z80_int() mz80int(0) - -#elif defined(_USE_DRZ80) +#if defined(_USE_DRZ80) #include "../cpu/DrZ80/drz80.h" extern struct DrZ80 drZ80; @@ -206,6 +213,8 @@ extern struct DrZ80 drZ80; #endif +#define Z80_STATE_SIZE 0x60 + extern int z80stopCycle; /* in 68k cycles */ extern int z80_cycle_cnt; /* 'done' z80 cycles before z80_run() */ extern int z80_cycle_aim; @@ -220,25 +229,51 @@ extern int z80_scanline_cycles; /* cycles done until z80_scanline */ #define cycles_68k_to_z80(x) ((x)*957 >> 11) -#define Z80_MEM_SHIFT 13 -extern unsigned long z80_read_map [0x10000 >> Z80_MEM_SHIFT]; -extern unsigned long z80_write_map[0x10000 >> Z80_MEM_SHIFT]; -typedef unsigned char (z80_read_f)(unsigned short a); -typedef void (z80_write_f)(unsigned int a, unsigned char data); - // ----------------------- SH2 CPU ----------------------- -#include "cpu/sh2mame/sh2.h" +#include "cpu/sh2/sh2.h" + +extern SH2 sh2s[2]; +#define msh2 sh2s[0] +#define ssh2 sh2s[1] + +#ifndef DRC_SH2 +# define sh2_end_run(sh2, after_) do { \ + if ((sh2)->icount > (after_)) { \ + (sh2)->cycles_timeslice -= (sh2)->icount - (after_); \ + (sh2)->icount = after_; \ + } \ +} while (0) +# define sh2_cycles_left(sh2) (sh2)->icount +# define sh2_pc(sh2) (sh2)->ppc +#else +# define sh2_end_run(sh2, after_) do { \ + int left_ = (signed int)(sh2)->sr >> 12; \ + if (left_ > (after_)) { \ + (sh2)->cycles_timeslice -= left_ - (after_); \ + (sh2)->sr &= 0xfff; \ + (sh2)->sr |= (after_) << 12; \ + } \ +} while (0) +# define sh2_cycles_left(sh2) ((signed int)(sh2)->sr >> 12) +# define sh2_pc(sh2) (sh2)->pc +#endif -SH2 msh2, ssh2; -#define ash2_pc() msh2.ppc -#define ash2_end_run(after) sh2_icount = after +#define sh2_cycles_done(sh2) ((int)(sh2)->cycles_timeslice - sh2_cycles_left(sh2)) +#define sh2_cycles_done_t(sh2) \ + ((sh2)->m68krcycles_done * 3 + sh2_cycles_done(sh2)) +#define sh2_cycles_done_m68k(sh2) \ + ((sh2)->m68krcycles_done + (sh2_cycles_done(sh2) / 3)) -#define sh2_pc(c) (c) ? ssh2.ppc : msh2.ppc #define sh2_reg(c, x) (c) ? ssh2.r[x] : msh2.r[x] #define sh2_gbr(c) (c) ? ssh2.gbr : msh2.gbr #define sh2_vbr(c) (c) ? ssh2.vbr : msh2.vbr -#define sh2_sr(c) (c) ? ssh2.sr : msh2.sr +#define sh2_sr(c) (((c) ? ssh2.sr : msh2.sr) & 0xfff) + +#define sh2_set_gbr(c, v) \ + { if (c) ssh2.gbr = v; else msh2.gbr = v; } +#define sh2_set_vbr(c, v) \ + { if (c) ssh2.vbr = v; else msh2.vbr = v; } // --------------------------------------------------------- @@ -285,6 +320,13 @@ struct PicoMisc unsigned int frame_count; // 1c for movies and idle det }; +struct PicoMS +{ + unsigned char carthw[0x10]; + unsigned char io_ctl; + unsigned char pad[0x4f]; +}; + // some assembly stuff depend on these, do not touch! struct Pico { @@ -294,9 +336,8 @@ struct Pico unsigned char vramb[0x4000]; // VRAM in SMS mode }; unsigned char zram[0x2000]; // 0x20000 Z80 ram - unsigned char ioports[0x10]; - unsigned char sms_io_ctl; - unsigned char pad[0xef]; // unused + unsigned char ioports[0x10]; // XXX: fix asm and mv + unsigned char pad[0xf0]; // unused unsigned short cram[0x40]; // 0x22100 unsigned short vsram[0x40]; // 0x22180 @@ -305,6 +346,7 @@ struct Pico struct PicoMisc m; struct PicoVideo video; + struct PicoMS ms; }; // sram @@ -404,27 +446,33 @@ typedef struct // 32X #define P32XS_FM (1<<15) +#define P32XS_REN (1<< 7) +#define P32XS_nRES (1<< 1) +#define P32XS_ADEN (1<< 0) #define P32XS2_ADEN (1<< 9) -#define P32XS_FULL (1<< 7) +#define P32XS_FULL (1<< 7) // DREQ FIFO full #define P32XS_68S (1<< 2) +#define P32XS_DMA (1<< 1) #define P32XS_RV (1<< 0) -#define P32XV_nPAL (1<<15) +#define P32XV_nPAL (1<<15) // VDP #define P32XV_PRI (1<< 7) #define P32XV_Mx (3<< 0) // display mode mask +#define P32XV_SFT (1<< 0) + #define P32XV_VBLK (1<<15) #define P32XV_HBLK (1<<14) #define P32XV_PEN (1<<13) #define P32XV_nFEN (1<< 1) #define P32XV_FS (1<< 0) -#define P32XF_68KPOLL (1 << 0) -#define P32XF_MSH2POLL (1 << 1) -#define P32XF_SSH2POLL (1 << 2) -#define P32XF_68KVPOLL (1 << 3) -#define P32XF_MSH2VPOLL (1 << 4) -#define P32XF_SSH2VPOLL (1 << 5) +#define P32XP_RTP (1<<7) // PWM control +#define P32XP_FULL (1<<15) // PWM pulse +#define P32XP_EMPTY (1<<14) + +#define P32XF_68KCPOLL (1 << 0) +#define P32XF_68KVPOLL (1 << 1) #define P32XI_VRES (1 << 14/2) // IRL/2 #define P32XI_VINT (1 << 12/2) @@ -432,45 +480,67 @@ typedef struct #define P32XI_CMD (1 << 8/2) #define P32XI_PWM (1 << 6/2) +// peripheral reg access +#define PREG8(regs,offs) ((unsigned char *)regs)[offs ^ 3] + // real one is 4*2, but we use more because we don't lockstep #define DMAC_FIFO_LEN (4*4) +#define PWM_BUFF_LEN 1024 // in one channel samples + +#define SH2_DRCBLK_RAM_SHIFT 1 +#define SH2_DRCBLK_DA_SHIFT 1 + +#define SH2_READ_SHIFT 25 +#define SH2_WRITE_SHIFT 25 struct Pico32x { unsigned short regs[0x20]; - unsigned short vdp_regs[0x10]; + unsigned short vdp_regs[0x10]; // 0x40 + unsigned short sh2_regs[3]; // 0x60 unsigned char pending_fb; unsigned char dirty_pal; - unsigned char pad[2]; unsigned int emu_flags; unsigned char sh2irq_mask[2]; unsigned char sh2irqi[2]; // individual unsigned int sh2irqs; // common irqs unsigned short dmac_fifo[DMAC_FIFO_LEN]; - unsigned int dmac_ptr; + unsigned int dmac0_fifo_ptr; + unsigned int pad; + unsigned char comm_dirty_68k; + unsigned char comm_dirty_sh2; + unsigned char pwm_irq_cnt; + unsigned char pad1; + unsigned short pwm_p[2]; // pwm pos in fifo + unsigned int pwm_cycle_p; // pwm play cursor (32x cycles) + unsigned int reserved[6]; }; struct Pico32xMem { unsigned char sdram[0x40000]; - unsigned short dram[2][0x20000/2]; // AKA fb - unsigned char m68k_rom[0x10000]; // 0x100; using M68K_BANK_SIZE +#ifdef DRC_SH2 + unsigned short drcblk_ram[1 << (18 - SH2_DRCBLK_RAM_SHIFT)]; +#endif + unsigned short dram[2][0x20000/2]; // AKA fb + union { + unsigned char m68k_rom[0x100]; + unsigned char m68k_rom_bank[0x10000]; // M68K_BANK_SIZE + }; +#ifdef DRC_SH2 + unsigned short drcblk_da[2][1 << (12 - SH2_DRCBLK_DA_SHIFT)]; +#endif unsigned char sh2_rom_m[0x800]; unsigned char sh2_rom_s[0x400]; unsigned short pal[0x100]; - unsigned short pal_native[0x100]; // converted to native (for renderer) - unsigned int sh2_peri_regs[2][0x200/4]; // periphereal regs of SH2s + unsigned short pal_native[0x100]; // converted to native (for renderer) + signed short pwm[2*PWM_BUFF_LEN]; // PWM buffer for current frame + signed short pwm_fifo[2][4]; // [0] - current, others - fifo entries }; // area.c -PICO_INTERNAL void PicoAreaPackCpu(unsigned char *cpu, int is_sub); -PICO_INTERNAL void PicoAreaUnpackCpu(unsigned char *cpu, int is_sub); extern void (*PicoLoadStateHook)(void); -// cd/area.c -PICO_INTERNAL int PicoCdSaveState(void *file); -PICO_INTERNAL int PicoCdLoadState(void *file); - typedef struct { int chunk; int size; @@ -479,18 +549,9 @@ typedef struct { extern carthw_state_chunk *carthw_chunks; #define CHUNK_CARTHW 64 -// area.c -typedef size_t (arearw)(void *p, size_t _size, size_t _n, void *file); -typedef size_t (areaeof)(void *file); -typedef int (areaseek)(void *file, long offset, int whence); -typedef int (areaclose)(void *file); -extern arearw *areaRead; // external read and write function pointers for -extern arearw *areaWrite; // gzip save state ability -extern areaeof *areaEof; -extern areaseek *areaSeek; -extern areaclose *areaClose; - // cart.c +extern int PicoCartResize(int newsize); +extern void Byteswap(void *dst, const void *src, int len); extern void (*PicoCartMemSetup)(void); extern void (*PicoCartUnloadHook)(void); @@ -501,10 +562,14 @@ int CM_compareRun(int cyc, int is_sub); PICO_INTERNAL void PicoFrameStart(void); void PicoDrawSync(int to, int blank_last_line); void BackFill(int reg7, int sh); -void FinalizeLineRGB555(int sh, int line); +void FinalizeLine555(int sh, int line); +extern int (*PicoScanBegin)(unsigned int num); +extern int (*PicoScanEnd)(unsigned int num); extern int DrawScanline; #define MAX_LINE_SPRITES 29 extern unsigned char HighLnSpr[240][3 + MAX_LINE_SPRITES]; +extern void *DrawLineDestBase; +extern int DrawLineDestIncrement; // draw2.c PICO_INTERNAL void PicoFrameFull(); @@ -513,7 +578,7 @@ PICO_INTERNAL void PicoFrameFull(); void PicoFrameStartMode4(void); void PicoLineMode4(int line); void PicoDoHighPal555M4(void); -void PicoDrawSetColorFormatMode4(int which); +void PicoDrawSetOutputMode4(pdso_t which); // memory.c PICO_INTERNAL void PicoMemSetup(void); @@ -521,6 +586,7 @@ unsigned int PicoRead8_io(unsigned int a); unsigned int PicoRead16_io(unsigned int a); void PicoWrite8_io(unsigned int a, unsigned int d); void PicoWrite16_io(unsigned int a, unsigned int d); +void p32x_dreq1_trigger(void); // pico/memory.c PICO_INTERNAL void PicoMemSetupPico(void); @@ -534,6 +600,7 @@ extern struct Pico Pico; extern struct PicoSRAM SRam; extern int PicoPadInt[2]; extern int emustatus; +extern int scanlines_total; extern void (*PicoResetHook)(void); extern void (*PicoLineHook)(void); PICO_INTERNAL int CheckDMA(void); @@ -561,6 +628,8 @@ PICO_INTERNAL void SekInit(void); PICO_INTERNAL int SekReset(void); PICO_INTERNAL void SekState(int *data); PICO_INTERNAL void SekSetRealTAS(int use_real); +PICO_INTERNAL void SekPackCpu(unsigned char *cpu, int is_sub); +PICO_INTERNAL void SekUnpackCpu(const unsigned char *cpu, int is_sub); void SekStepM68k(void); void SekInitIdleDet(void); void SekFinishIdleDet(void); @@ -620,8 +689,8 @@ unsigned int EEPROM_read(void); // z80 functionality wrappers PICO_INTERNAL void z80_init(void); -PICO_INTERNAL void z80_pack(unsigned char *data); -PICO_INTERNAL void z80_unpack(unsigned char *data); +PICO_INTERNAL void z80_pack(void *data); +PICO_INTERNAL int z80_unpack(const void *data); PICO_INTERNAL void z80_reset(void); PICO_INTERNAL void z80_exit(void); @@ -641,21 +710,45 @@ PICO_INTERNAL void PsndGetSamplesMS(void); extern int PsndDacLine; // sms.c +#ifndef NO_SMS void PicoPowerMS(void); void PicoResetMS(void); void PicoMemSetupMS(void); +void PicoStateLoadedMS(void); void PicoFrameMS(void); void PicoFrameDrawOnlyMS(void); +#else +#define PicoPowerMS() +#define PicoResetMS() +#define PicoMemSetupMS() +#define PicoStateLoadedMS() +#define PicoFrameMS() +#define PicoFrameDrawOnlyMS() +#endif // 32x/32x.c +#ifndef NO_32X extern struct Pico32x Pico32x; +enum p32x_event { + P32X_EVENT_PWM, + P32X_EVENT_FILLEND, + P32X_EVENT_COUNT, +}; +extern unsigned int event_times[P32X_EVENT_COUNT]; + void Pico32xInit(void); void PicoPower32x(void); void PicoReset32x(void); void Pico32xStartup(void); void PicoUnload32x(void); void PicoFrame32x(void); -void p32x_update_irls(void); +void Pico32xStateLoaded(int is_early); +void p32x_sync_sh2s(unsigned int m68k_target); +void p32x_sync_other_sh2(SH2 *sh2, unsigned int m68k_target); +void p32x_update_irls(SH2 *active_sh2, int m68k_cycles); +void p32x_reset_sh2s(void); +void p32x_event_schedule(unsigned int now, enum p32x_event event, int after); +void p32x_event_schedule_sh2(SH2 *sh2, enum p32x_event event, int after); // 32x/memory.c struct Pico32xMem *Pico32xMem; @@ -665,10 +758,59 @@ void PicoWrite8_32x(unsigned int a, unsigned int d); void PicoWrite16_32x(unsigned int a, unsigned int d); void PicoMemSetup32x(void); void Pico32xSwapDRAM(int b); -void p32x_poll_event(int is_vdp); +void Pico32xMemStateLoaded(void); +void p32x_m68k_poll_event(unsigned int flags); +void p32x_sh2_poll_event(SH2 *sh2, unsigned int flags, unsigned int m68k_cycles); // 32x/draw.c +void PicoDrawSetOutFormat32x(pdso_t which, int use_32x_line_mode); void FinalizeLine32xRGB555(int sh, int line); +void PicoDraw32xLayer(int offs, int lines, int mdbg); +void PicoDraw32xLayerMdOnly(int offs, int lines); +extern int (*PicoScan32xBegin)(unsigned int num); +extern int (*PicoScan32xEnd)(unsigned int num); +enum { + PDM32X_OFF, + PDM32X_32X_ONLY, + PDM32X_BOTH, +}; +extern int Pico32xDrawMode; + +// 32x/pwm.c +unsigned int p32x_pwm_read16(unsigned int a, SH2 *sh2, + unsigned int m68k_cycles); +void p32x_pwm_write16(unsigned int a, unsigned int d, + SH2 *sh2, unsigned int m68k_cycles); +void p32x_pwm_update(int *buf32, int length, int stereo); +void p32x_pwm_ctl_changed(void); +void p32x_pwm_schedule(unsigned int m68k_now); +void p32x_pwm_schedule_sh2(SH2 *sh2); +void p32x_pwm_irq_event(unsigned int m68k_now); +void p32x_pwm_state_loaded(void); + +// 32x/sh2soc.c +void p32x_dreq0_trigger(void); +void p32x_dreq1_trigger(void); +void p32x_timers_recalc(void); +void p32x_timers_do(unsigned int m68k_slice); +unsigned int sh2_peripheral_read8(unsigned int a, SH2 *sh2); +unsigned int sh2_peripheral_read16(unsigned int a, SH2 *sh2); +unsigned int sh2_peripheral_read32(unsigned int a, SH2 *sh2); +void sh2_peripheral_write8(unsigned int a, unsigned int d, SH2 *sh2); +void sh2_peripheral_write16(unsigned int a, unsigned int d, SH2 *sh2); +void sh2_peripheral_write32(unsigned int a, unsigned int d, SH2 *sh2); + +#else +#define Pico32xInit() +#define PicoPower32x() +#define PicoReset32x() +#define PicoFrame32x() +#define PicoUnload32x() +#define Pico32xStateLoaded() +#define FinalizeLine32xRGB555 NULL +#define p32x_pwm_update(...) +#define p32x_timers_recalc() +#endif /* avoid dependency on newer glibc */ static __inline int isspace_(int c) @@ -676,9 +818,17 @@ static __inline int isspace_(int c) return (0x09 <= c && c <= 0x0d) || c == ' '; } +#ifndef ARRAY_SIZE +#define ARRAY_SIZE(x) (sizeof(x) / sizeof(x[0])) +#endif + // emulation event logging #ifndef EL_LOGMASK -#define EL_LOGMASK 0 +# ifdef __x86_64__ // HACK +# define EL_LOGMASK (EL_STATUS|EL_IDLE|EL_ANOMALY) +# else +# define EL_LOGMASK (EL_STATUS) +# endif #endif #define EL_HVCNT 0x00000001 /* hv counter reads */ @@ -701,33 +851,85 @@ static __inline int isspace_(int c) #define EL_CDREGS 0x00020000 /* MCD: register access */ #define EL_CDREG3 0x00040000 /* MCD: register 3 only */ #define EL_32X 0x00080000 +#define EL_PWM 0x00100000 /* 32X PWM stuff (LOTS of output) */ +#define EL_32XP 0x00200000 /* 32X peripherals */ #define EL_STATUS 0x40000000 /* status messages */ #define EL_ANOMALY 0x80000000 /* some unexpected conditions (during emulation) */ #if EL_LOGMASK -extern void lprintf(const char *fmt, ...); #define elprintf(w,f,...) \ -{ \ +do { \ if ((w) & EL_LOGMASK) \ lprintf("%05i:%03i: " f "\n",Pico.m.frame_count,Pico.m.scanline,##__VA_ARGS__); \ -} +} while (0) #elif defined(_MSC_VER) #define elprintf #else #define elprintf(w,f,...) #endif +// profiling +#ifdef PPROF +#include +#else +#define pprof_init() +#define pprof_finish() +#define pprof_start(x) +#define pprof_end(...) +#define pprof_end_sub(...) +#endif + +#ifdef EVT_LOG +enum evt { + EVT_FRAME_START, + EVT_NEXT_LINE, + EVT_RUN_START, + EVT_RUN_END, + EVT_POLL_START, + EVT_POLL_END, + EVT_CNT +}; + +enum evt_cpu { + EVT_M68K, + EVT_S68K, + EVT_MSH2, + EVT_SSH2, + EVT_CPU_CNT +}; + +void pevt_log(unsigned int cycles, enum evt_cpu c, enum evt e); +void pevt_dump(void); + +#define pevt_log_m68k(e) \ + pevt_log(SekCyclesDoneT(), EVT_M68K, e) +#define pevt_log_m68k_o(e) \ + pevt_log(SekCyclesDoneT2(), EVT_M68K, e) +#define pevt_log_sh2(sh2, e) \ + pevt_log(sh2_cycles_done_m68k(sh2), EVT_MSH2 + (sh2)->is_slave, e) +#define pevt_log_sh2_o(sh2, e) \ + pevt_log((sh2)->m68krcycles_done, EVT_MSH2 + (sh2)->is_slave, e) +#else +#define pevt_log(c, e) +#define pevt_log_m68k(e) +#define pevt_log_m68k_o(e) +#define pevt_log_sh2(sh2, e) +#define pevt_log_sh2_o(sh2, e) +#define pevt_dump() +#endif + +// misc #ifdef _MSC_VER #define cdprintf #else #define cdprintf(x...) #endif -#if defined(__GNUC__) && __GNUC__ >= 4 && __GNUC_MINOR__ >= 3 -#define MEMH_FUNC __attribute__((aligned(4))) +#ifdef __i386__ +#define REGPARM(x) __attribute__((regparm(x))) #else -#define MEMH_FUNC +#define REGPARM(x) #endif #ifdef __GNUC__