X-Git-Url: https://notaz.gp2x.de/cgi-bin/gitweb.cgi?a=blobdiff_plain;f=pico%2Fpico_int.h;h=339d1bf14df3492f32f74b3e565d343356ce0195;hb=f81107f59093904c3daac2e9c257261fddc6caf0;hp=dcd321acd8351039d80e796965d8408b4ce03734;hpb=f3a57b2d6c6a32dc09a6efd4fbef31eb876263b2;p=picodrive.git

diff --git a/pico/pico_int.h b/pico/pico_int.h
index dcd321a..339d1bf 100644
--- a/pico/pico_int.h
+++ b/pico/pico_int.h
@@ -1,10 +1,11 @@
-// Pico Library - Internal Header File
-
-// (c) Copyright 2004 Dave, All rights reserved.
-// (c) Copyright 2006-2009 Grazvydas "notaz" Ignotas, all rights reserved.
-// Free for non-commercial use.
-
-// For commercial use, separate licencing terms must be obtained.
+/*
+ * PicoDrive - Internal Header File
+ * (c) Copyright Dave, 2004
+ * (C) notaz, 2006-2010
+ *
+ * This work is licensed under the terms of MAME license.
+ * See COPYING file in the top-level directory.
+ */
 
 #ifndef PICO_INTERNAL_INCLUDED
 #define PICO_INTERNAL_INCLUDED
@@ -34,7 +35,7 @@ extern "C" {
 
 // ----------------------- 68000 CPU -----------------------
 #ifdef EMU_C68K
-#include "../cpu/Cyclone/Cyclone.h"
+#include "../cpu/cyclone/Cyclone.h"
 extern struct Cyclone PicoCpuCM68k, PicoCpuCS68k;
 #define SekCyclesLeftNoMCD PicoCpuCM68k.cycles // cycles left for this run
 #define SekCyclesLeft \
@@ -45,10 +46,11 @@ extern struct Cyclone PicoCpuCM68k, PicoCpuCS68k;
 #define SekEndTimesliceS68k(after) PicoCpuCS68k.cycles=after
 #define SekPc (PicoCpuCM68k.pc-PicoCpuCM68k.membase)
 #define SekPcS68k (PicoCpuCS68k.pc-PicoCpuCS68k.membase)
-#define SekDar(x) PicoCpuCM68k.d[x]
+#define SekDar(x) (x < 8 ? PicoCpuCM68k.d[x] : PicoCpuCM68k.a[x - 8])
 #define SekSr     CycloneGetSr(&PicoCpuCM68k)
 #define SekSetStop(x) { PicoCpuCM68k.state_flags&=~1; if (x) { PicoCpuCM68k.state_flags|=1; PicoCpuCM68k.cycles=0; } }
 #define SekSetStopS68k(x) { PicoCpuCS68k.state_flags&=~1; if (x) { PicoCpuCS68k.state_flags|=1; PicoCpuCS68k.cycles=0; } }
+#define SekIsStoppedM68k() (PicoCpuCM68k.state_flags&1)
 #define SekIsStoppedS68k() (PicoCpuCS68k.state_flags&1)
 #define SekShouldInterrupt (PicoCpuCM68k.irq > (PicoCpuCM68k.srh&7))
 
@@ -72,7 +74,7 @@ extern M68K_CONTEXT PicoCpuFM68k, PicoCpuFS68k;
 #define SekEndTimesliceS68k(after) PicoCpuFS68k.io_cycle_counter=after
 #define SekPc     fm68k_get_pc(&PicoCpuFM68k)
 #define SekPcS68k fm68k_get_pc(&PicoCpuFS68k)
-#define SekDar(x) PicoCpuFM68k.dreg[x].D
+#define SekDar(x) (x < 8 ? PicoCpuFM68k.dreg[x].D : PicoCpuFM68k.areg[x - 8].D)
 #define SekSr     PicoCpuFM68k.sr
 #define SekSetStop(x) { \
 	PicoCpuFM68k.execinfo &= ~FM68K_HALTED; \
@@ -82,6 +84,7 @@ extern M68K_CONTEXT PicoCpuFM68k, PicoCpuFS68k;
 	PicoCpuFS68k.execinfo &= ~FM68K_HALTED; \
 	if (x) { PicoCpuFS68k.execinfo |= FM68K_HALTED; PicoCpuFS68k.io_cycle_counter = 0; } \
 }
+#define SekIsStoppedM68k() (PicoCpuFM68k.execinfo&FM68K_HALTED)
 #define SekIsStoppedS68k() (PicoCpuFS68k.execinfo&FM68K_HALTED)
 #define SekShouldInterrupt fm68k_would_interrupt()
 
@@ -116,6 +119,7 @@ extern m68ki_cpu_core PicoCpuMM68k, PicoCpuMS68k;
 	if(x) { SET_CYCLES(0); PicoCpuMS68k.stopped=STOP_LEVEL_STOP; } \
 	else PicoCpuMS68k.stopped=0; \
 }
+#define SekIsStoppedM68k() (PicoCpuMM68k.stopped==STOP_LEVEL_STOP)
 #define SekIsStoppedS68k() (PicoCpuMS68k.stopped==STOP_LEVEL_STOP)
 #define SekShouldInterrupt (CPU_INT_LEVEL > FLAG_INT_MASK)
 
@@ -142,6 +146,7 @@ extern unsigned int SekCycleCntT; // total cycle counter, updated once per frame
 #define SekCyclesBurn(c)  SekCycleCnt+=c
 #define SekCyclesDone()  (SekCycleAim-SekCyclesLeft)    // number of cycles done in this frame (can be checked anywhere)
 #define SekCyclesDoneT() (SekCycleCntT+SekCyclesDone()) // total nuber of cycles done for this rom
+#define SekCyclesDoneT2() (SekCycleCntT + SekCycleCnt)  // same as above but not from memhandlers
 
 #define SekEndRun(after) { \
 	SekCycleCnt -= SekCyclesLeft - (after); \
@@ -233,18 +238,33 @@ extern SH2 sh2s[2];
 #define ssh2 sh2s[1]
 
 #ifndef DRC_SH2
-# define ash2_end_run(after) if (sh2->icount > (after)) sh2->icount = after
-# define ash2_cycles_done() (sh2->cycles_aim - sh2->icount)
+# define sh2_end_run(sh2, after_) do { \
+  if ((sh2)->icount > (after_)) { \
+    (sh2)->cycles_timeslice -= (sh2)->icount - (after_); \
+    (sh2)->icount = after_; \
+  } \
+} while (0)
+# define sh2_cycles_left(sh2) (sh2)->icount
+# define sh2_pc(sh2) (sh2)->ppc
 #else
-# define ash2_end_run(after) { \
-   if ((sh2->sr >> 12) > (after)) \
-     { sh2->sr &= 0xfff; sh2->sr |= (after) << 12; } \
-}
-# define ash2_cycles_done() (sh2->cycles_aim - (sh2->sr >> 12))
+# define sh2_end_run(sh2, after_) do { \
+  int left_ = (signed int)(sh2)->sr >> 12; \
+  if (left_ > (after_)) { \
+    (sh2)->cycles_timeslice -= left_ - (after_); \
+    (sh2)->sr &= 0xfff; \
+    (sh2)->sr |= (after_) << 12; \
+  } \
+} while (0)
+# define sh2_cycles_left(sh2) ((signed int)(sh2)->sr >> 12)
+# define sh2_pc(sh2) (sh2)->pc
 #endif
 
-//#define sh2_pc(c)     (c) ? ssh2.ppc : msh2.ppc
-#define sh2_pc(c)     (c) ? ssh2.pc : msh2.pc
+#define sh2_cycles_done(sh2) ((int)(sh2)->cycles_timeslice - sh2_cycles_left(sh2))
+#define sh2_cycles_done_t(sh2) \
+  ((sh2)->m68krcycles_done * 3 + sh2_cycles_done(sh2))
+#define sh2_cycles_done_m68k(sh2) \
+  ((sh2)->m68krcycles_done + (sh2_cycles_done(sh2) / 3))
+
 #define sh2_reg(c, x) (c) ? ssh2.r[x] : msh2.r[x]
 #define sh2_gbr(c)    (c) ? ssh2.gbr : msh2.gbr
 #define sh2_vbr(c)    (c) ? ssh2.vbr : msh2.vbr
@@ -447,15 +467,12 @@ typedef struct
 #define P32XV_nFEN  (1<< 1)
 #define P32XV_FS    (1<< 0)
 
-#define P32XP_FULL  (1<<15) // PWM
+#define P32XP_RTP   (1<<7)  // PWM control
+#define P32XP_FULL  (1<<15) // PWM pulse
 #define P32XP_EMPTY (1<<14)
 
-#define P32XF_68KPOLL   (1 << 0)
-#define P32XF_MSH2POLL  (1 << 1)
-#define P32XF_SSH2POLL  (1 << 2)
-#define P32XF_68KVPOLL  (1 << 3)
-#define P32XF_MSH2VPOLL (1 << 4)
-#define P32XF_SSH2VPOLL (1 << 5)
+#define P32XF_68KCPOLL  (1 << 0)
+#define P32XF_68KVPOLL  (1 << 1)
 
 #define P32XI_VRES (1 << 14/2) // IRL/2
 #define P32XI_VINT (1 << 12/2)
@@ -473,6 +490,7 @@ typedef struct
 #define SH2_DRCBLK_RAM_SHIFT 1
 #define SH2_DRCBLK_DA_SHIFT  1
 
+#define SH2_READ_SHIFT 25
 #define SH2_WRITE_SHIFT 25
 
 struct Pico32x
@@ -487,9 +505,15 @@ struct Pico32x
   unsigned char sh2irqi[2];      // individual
   unsigned int sh2irqs;          // common irqs
   unsigned short dmac_fifo[DMAC_FIFO_LEN];
-  unsigned int dmac_ptr;
-  unsigned int pwm_irq_sample_cnt;
-  unsigned int reserved[9];
+  unsigned int dmac0_fifo_ptr;
+  unsigned int pad;
+  unsigned char comm_dirty_68k;
+  unsigned char comm_dirty_sh2;
+  unsigned char pwm_irq_cnt;
+  unsigned char pad1;
+  unsigned short pwm_p[2];       // pwm pos in fifo
+  unsigned int pwm_cycle_p;      // pwm play cursor (32x cycles)
+  unsigned int reserved[6];
 };
 
 struct Pico32xMem
@@ -503,7 +527,6 @@ struct Pico32xMem
     unsigned char  m68k_rom[0x100];
     unsigned char  m68k_rom_bank[0x10000]; // M68K_BANK_SIZE
   };
-  unsigned char  data_array[2][0x1000]; // cache in SH2s (can be used as RAM)
 #ifdef DRC_SH2
   unsigned short drcblk_da[2][1 << (12 - SH2_DRCBLK_DA_SHIFT)];
 #endif
@@ -511,8 +534,8 @@ struct Pico32xMem
   unsigned char  sh2_rom_s[0x400];
   unsigned short pal[0x100];
   unsigned short pal_native[0x100];     // converted to native (for renderer)
-  unsigned int   sh2_peri_regs[2][0x200/4]; // periphereal regs of SH2s
   signed short   pwm[2*PWM_BUFF_LEN];   // PWM buffer for current frame
+  signed short   pwm_fifo[2][4];        // [0] - current, others - fifo entries
 };
 
 // area.c
@@ -540,6 +563,8 @@ PICO_INTERNAL void PicoFrameStart(void);
 void PicoDrawSync(int to, int blank_last_line);
 void BackFill(int reg7, int sh);
 void FinalizeLine555(int sh, int line);
+extern int (*PicoScanBegin)(unsigned int num);
+extern int (*PicoScanEnd)(unsigned int num);
 extern int DrawScanline;
 #define MAX_LINE_SPRITES 29
 extern unsigned char HighLnSpr[240][3 + MAX_LINE_SPRITES];
@@ -561,6 +586,7 @@ unsigned int PicoRead8_io(unsigned int a);
 unsigned int PicoRead16_io(unsigned int a);
 void PicoWrite8_io(unsigned int a, unsigned int d);
 void PicoWrite16_io(unsigned int a, unsigned int d);
+void p32x_dreq1_trigger(void);
 
 // pico/memory.c
 PICO_INTERNAL void PicoMemSetupPico(void);
@@ -703,14 +729,26 @@ void PicoFrameDrawOnlyMS(void);
 // 32x/32x.c
 #ifndef NO_32X
 extern struct Pico32x Pico32x;
+enum p32x_event {
+  P32X_EVENT_PWM,
+  P32X_EVENT_FILLEND,
+  P32X_EVENT_COUNT,
+};
+extern unsigned int event_times[P32X_EVENT_COUNT];
+
 void Pico32xInit(void);
 void PicoPower32x(void);
 void PicoReset32x(void);
 void Pico32xStartup(void);
 void PicoUnload32x(void);
 void PicoFrame32x(void);
-void p32x_update_irls(int nested_call);
+void Pico32xStateLoaded(int is_early);
+void p32x_sync_sh2s(unsigned int m68k_target);
+void p32x_sync_other_sh2(SH2 *sh2, unsigned int m68k_target);
+void p32x_update_irls(SH2 *active_sh2, int m68k_cycles);
 void p32x_reset_sh2s(void);
+void p32x_event_schedule(unsigned int now, enum p32x_event event, int after);
+void p32x_event_schedule_sh2(SH2 *sh2, enum p32x_event event, int after);
 
 // 32x/memory.c
 struct Pico32xMem *Pico32xMem;
@@ -720,13 +758,17 @@ void PicoWrite8_32x(unsigned int a, unsigned int d);
 void PicoWrite16_32x(unsigned int a, unsigned int d);
 void PicoMemSetup32x(void);
 void Pico32xSwapDRAM(int b);
-void Pico32xStateLoaded(void);
-void p32x_poll_event(int cpu_mask, int is_vdp);
+void Pico32xMemStateLoaded(void);
+void p32x_m68k_poll_event(unsigned int flags);
+void p32x_sh2_poll_event(SH2 *sh2, unsigned int flags, unsigned int m68k_cycles);
 
 // 32x/draw.c
+void PicoDrawSetOutFormat32x(pdso_t which, int use_32x_line_mode);
 void FinalizeLine32xRGB555(int sh, int line);
 void PicoDraw32xLayer(int offs, int lines, int mdbg);
 void PicoDraw32xLayerMdOnly(int offs, int lines);
+extern int (*PicoScan32xBegin)(unsigned int num);
+extern int (*PicoScan32xEnd)(unsigned int num);
 enum {
   PDM32X_OFF,
   PDM32X_32X_ONLY,
@@ -735,12 +777,29 @@ enum {
 extern int Pico32xDrawMode;
 
 // 32x/pwm.c
-unsigned int p32x_pwm_read16(unsigned int a);
-void p32x_pwm_write16(unsigned int a, unsigned int d);
+unsigned int p32x_pwm_read16(unsigned int a, SH2 *sh2,
+  unsigned int m68k_cycles);
+void p32x_pwm_write16(unsigned int a, unsigned int d,
+  SH2 *sh2, unsigned int m68k_cycles);
 void p32x_pwm_update(int *buf32, int length, int stereo);
-void p32x_timers_do(int line_call);
+void p32x_pwm_ctl_changed(void);
+void p32x_pwm_schedule(unsigned int m68k_now);
+void p32x_pwm_schedule_sh2(SH2 *sh2);
+void p32x_pwm_irq_event(unsigned int m68k_now);
+void p32x_pwm_state_loaded(void);
+
+// 32x/sh2soc.c
+void p32x_dreq0_trigger(void);
+void p32x_dreq1_trigger(void);
 void p32x_timers_recalc(void);
-extern int pwm_frame_smp_cnt;
+void p32x_timers_do(unsigned int m68k_slice);
+unsigned int sh2_peripheral_read8(unsigned int a, SH2 *sh2);
+unsigned int sh2_peripheral_read16(unsigned int a, SH2 *sh2);
+unsigned int sh2_peripheral_read32(unsigned int a, SH2 *sh2);
+void sh2_peripheral_write8(unsigned int a, unsigned int d, SH2 *sh2);
+void sh2_peripheral_write16(unsigned int a, unsigned int d, SH2 *sh2);
+void sh2_peripheral_write32(unsigned int a, unsigned int d, SH2 *sh2);
+
 #else
 #define Pico32xInit()
 #define PicoPower32x()
@@ -748,7 +807,6 @@ extern int pwm_frame_smp_cnt;
 #define PicoFrame32x()
 #define PicoUnload32x()
 #define Pico32xStateLoaded()
-#define PicoDraw32xSetFrameMode(...)
 #define FinalizeLine32xRGB555 NULL
 #define p32x_pwm_update(...)
 #define p32x_timers_recalc()
@@ -766,7 +824,11 @@ static __inline int isspace_(int c)
 
 // emulation event logging
 #ifndef EL_LOGMASK
-#define EL_LOGMASK 0
+# ifdef __x86_64__ // HACK
+#  define EL_LOGMASK (EL_STATUS|EL_IDLE|EL_ANOMALY)
+# else
+#  define EL_LOGMASK (EL_STATUS)
+# endif
 #endif
 
 #define EL_HVCNT   0x00000001 /* hv counter reads */
@@ -790,17 +852,17 @@ static __inline int isspace_(int c)
 #define EL_CDREG3  0x00040000 /* MCD: register 3 only */
 #define EL_32X     0x00080000
 #define EL_PWM     0x00100000 /* 32X PWM stuff (LOTS of output) */
+#define EL_32XP    0x00200000 /* 32X peripherals */
 
 #define EL_STATUS  0x40000000 /* status messages */
 #define EL_ANOMALY 0x80000000 /* some unexpected conditions (during emulation) */
 
 #if EL_LOGMASK
-extern void lprintf(const char *fmt, ...);
 #define elprintf(w,f,...) \
-{ \
+do { \
 	if ((w) & EL_LOGMASK) \
 		lprintf("%05i:%03i: " f "\n",Pico.m.frame_count,Pico.m.scanline,##__VA_ARGS__); \
-}
+} while (0)
 #elif defined(_MSC_VER)
 #define elprintf
 #else
@@ -818,6 +880,45 @@ extern void lprintf(const char *fmt, ...);
 #define pprof_end_sub(...)
 #endif
 
+#ifdef EVT_LOG
+enum evt {
+  EVT_FRAME_START,
+  EVT_NEXT_LINE,
+  EVT_RUN_START,
+  EVT_RUN_END,
+  EVT_POLL_START,
+  EVT_POLL_END,
+  EVT_CNT
+};
+
+enum evt_cpu {
+  EVT_M68K,
+  EVT_S68K,
+  EVT_MSH2,
+  EVT_SSH2,
+  EVT_CPU_CNT
+};
+
+void pevt_log(unsigned int cycles, enum evt_cpu c, enum evt e);
+void pevt_dump(void);
+
+#define pevt_log_m68k(e) \
+  pevt_log(SekCyclesDoneT(), EVT_M68K, e)
+#define pevt_log_m68k_o(e) \
+  pevt_log(SekCyclesDoneT2(), EVT_M68K, e)
+#define pevt_log_sh2(sh2, e) \
+  pevt_log(sh2_cycles_done_m68k(sh2), EVT_MSH2 + (sh2)->is_slave, e)
+#define pevt_log_sh2_o(sh2, e) \
+  pevt_log((sh2)->m68krcycles_done, EVT_MSH2 + (sh2)->is_slave, e)
+#else
+#define pevt_log(c, e)
+#define pevt_log_m68k(e)
+#define pevt_log_m68k_o(e)
+#define pevt_log_sh2(sh2, e)
+#define pevt_log_sh2_o(sh2, e)
+#define pevt_dump()
+#endif
+
 // misc
 #ifdef _MSC_VER
 #define cdprintf