X-Git-Url: https://notaz.gp2x.de/cgi-bin/gitweb.cgi?a=blobdiff_plain;f=pico%2Fpico_int.h;h=3ee4ea134ab43130b7715b7a7f55ed7f5b41db1b;hb=1f1ff763e661bab664151c4821c65dad35777976;hp=6c4e45d017fd57cd45dd14141ecf4f6f5b3611cb;hpb=87accdf72da5e373876a6661217bbac69ce4d607;p=picodrive.git

diff --git a/pico/pico_int.h b/pico/pico_int.h
index 6c4e45d..3ee4ea1 100644
--- a/pico/pico_int.h
+++ b/pico/pico_int.h
@@ -45,12 +45,15 @@ extern struct Cyclone PicoCpuCM68k, PicoCpuCS68k;
 #define SekEndTimesliceS68k(after) PicoCpuCS68k.cycles=after
 #define SekPc (PicoCpuCM68k.pc-PicoCpuCM68k.membase)
 #define SekPcS68k (PicoCpuCS68k.pc-PicoCpuCS68k.membase)
+#define SekDar(x) PicoCpuCM68k.d[x]
+#define SekSr     CycloneGetSr(&PicoCpuCM68k)
 #define SekSetStop(x) { PicoCpuCM68k.state_flags&=~1; if (x) { PicoCpuCM68k.state_flags|=1; PicoCpuCM68k.cycles=0; } }
 #define SekSetStopS68k(x) { PicoCpuCS68k.state_flags&=~1; if (x) { PicoCpuCS68k.state_flags|=1; PicoCpuCS68k.cycles=0; } }
 #define SekIsStoppedS68k() (PicoCpuCS68k.state_flags&1)
 #define SekShouldInterrupt (PicoCpuCM68k.irq > (PicoCpuCM68k.srh&7))
 
 #define SekInterrupt(i) PicoCpuCM68k.irq=i
+#define SekIrqLevel     PicoCpuCM68k.irq
 
 #ifdef EMU_M68K
 #define EMU_CORE_DEBUG
@@ -69,6 +72,8 @@ extern M68K_CONTEXT PicoCpuFM68k, PicoCpuFS68k;
 #define SekEndTimesliceS68k(after) PicoCpuFS68k.io_cycle_counter=after
 #define SekPc     fm68k_get_pc(&PicoCpuFM68k)
 #define SekPcS68k fm68k_get_pc(&PicoCpuFS68k)
+#define SekDar(x) PicoCpuFM68k.dreg[x].D
+#define SekSr     PicoCpuFM68k.sr
 #define SekSetStop(x) { \
 	PicoCpuFM68k.execinfo &= ~FM68K_HALTED; \
 	if (x) { PicoCpuFM68k.execinfo |= FM68K_HALTED; PicoCpuFM68k.io_cycle_counter = 0; } \
@@ -81,6 +86,7 @@ extern M68K_CONTEXT PicoCpuFM68k, PicoCpuFS68k;
 #define SekShouldInterrupt fm68k_would_interrupt()
 
 #define SekInterrupt(irq) PicoCpuFM68k.interrupts[0]=irq
+#define SekIrqLevel       PicoCpuFM68k.interrupts[0]
 
 #ifdef EMU_M68K
 #define EMU_CORE_DEBUG
@@ -100,6 +106,8 @@ extern m68ki_cpu_core PicoCpuMM68k, PicoCpuMS68k;
 #define SekEndTimesliceS68k(after) PicoCpuMS68k.cyc_remaining_cycles=after
 #define SekPc m68k_get_reg(&PicoCpuMM68k, M68K_REG_PC)
 #define SekPcS68k m68k_get_reg(&PicoCpuMS68k, M68K_REG_PC)
+#define SekDar(x) PicoCpuMM68k.dar[x]
+#define SekSr m68k_get_reg(&PicoCpuMM68k, M68K_REG_SR)
 #define SekSetStop(x) { \
 	if(x) { SET_CYCLES(0); PicoCpuMM68k.stopped=STOP_LEVEL_STOP; } \
 	else PicoCpuMM68k.stopped=0; \
@@ -117,6 +125,7 @@ extern m68ki_cpu_core PicoCpuMM68k, PicoCpuMS68k;
 	m68k_set_irq(irq); \
 	m68k_set_context(oldcontext); \
 }
+#define SekIrqLevel (PicoCpuMM68k.int_level >> 8)
 
 #endif
 #endif // EMU_M68K
@@ -220,24 +229,36 @@ extern int z80_scanline_cycles;  /* cycles done until z80_scanline */
 
 #define cycles_68k_to_z80(x) ((x)*957 >> 11)
 
-#define Z80_MEM_SHIFT 13
-extern unsigned long z80_read_map [0x10000 >> Z80_MEM_SHIFT];
-extern unsigned long z80_write_map[0x10000 >> Z80_MEM_SHIFT];
-typedef unsigned char (z80_read_f)(unsigned short a);
-typedef void (z80_write_f)(unsigned int a, unsigned char data);
-
 // ----------------------- SH2 CPU -----------------------
 
-#include "cpu/sh2mame/sh2.h"
+#include "cpu/sh2/sh2.h"
+
+extern SH2 sh2s[2];
+#define msh2 sh2s[0]
+#define ssh2 sh2s[1]
 
-SH2 msh2, ssh2;
-#define ash2_end_run(after) sh2_icount = after
+#ifndef DRC_SH2
+# define ash2_end_run(after) if (sh2->icount > (after)) sh2->icount = after
+# define ash2_cycles_done() (sh2->cycles_aim - sh2->icount)
+#else
+# define ash2_end_run(after) { \
+   if ((sh2->sr >> 12) > (after)) \
+     { sh2->sr &= 0xfff; sh2->sr |= (after) << 12; } \
+}
+# define ash2_cycles_done() (sh2->cycles_aim - (sh2->sr >> 12))
+#endif
 
-#define sh2_pc(c)     (c) ? ssh2.ppc : msh2.ppc
+//#define sh2_pc(c)     (c) ? ssh2.ppc : msh2.ppc
+#define sh2_pc(c)     (c) ? ssh2.pc : msh2.pc
 #define sh2_reg(c, x) (c) ? ssh2.r[x] : msh2.r[x]
 #define sh2_gbr(c)    (c) ? ssh2.gbr : msh2.gbr
 #define sh2_vbr(c)    (c) ? ssh2.vbr : msh2.vbr
-#define sh2_sr(c)     (c) ? ssh2.sr : msh2.sr
+#define sh2_sr(c)   (((c) ? ssh2.sr : msh2.sr) & 0xfff)
+
+#define sh2_set_gbr(c, v) \
+  { if (c) ssh2.gbr = v; else msh2.gbr = v; }
+#define sh2_set_vbr(c, v) \
+  { if (c) ssh2.vbr = v; else msh2.vbr = v; }
 
 // ---------------------------------------------------------
 
@@ -403,6 +424,9 @@ typedef struct
 
 // 32X
 #define P32XS_FM    (1<<15)
+#define P32XS_REN   (1<< 7)
+#define P32XS_nRES  (1<< 1)
+#define P32XS_ADEN  (1<< 0)
 #define P32XS2_ADEN (1<< 9)
 #define P32XS_FULL  (1<< 7) // DREQ FIFO full
 #define P32XS_68S   (1<< 2)
@@ -413,6 +437,8 @@ typedef struct
 #define P32XV_PRI   (1<< 7)
 #define P32XV_Mx    (3<< 0) // display mode mask
 
+#define P32XV_SFT   (1<< 0)
+
 #define P32XV_VBLK  (1<<15)
 #define P32XV_HBLK  (1<<14)
 #define P32XV_PEN   (1<<13)
@@ -435,15 +461,23 @@ typedef struct
 #define P32XI_CMD  (1 <<  8/2)
 #define P32XI_PWM  (1 <<  6/2)
 
+// peripheral reg access
+#define PREG8(regs,offs) ((unsigned char *)regs)[offs ^ 3]
+
 // real one is 4*2, but we use more because we don't lockstep
 #define DMAC_FIFO_LEN (4*4)
 #define PWM_BUFF_LEN 1024 // in one channel samples
 
+#define SH2_DRCBLK_RAM_SHIFT 1
+#define SH2_DRCBLK_DA_SHIFT  1
+
+#define SH2_WRITE_SHIFT 25
+
 struct Pico32x
 {
   unsigned short regs[0x20];
-  unsigned short vdp_regs[0x10];
-  unsigned short sh2_regs[3];
+  unsigned short vdp_regs[0x10]; // 0x40
+  unsigned short sh2_regs[3];    // 0x60
   unsigned char pending_fb;
   unsigned char dirty_pal;
   unsigned int emu_flags;
@@ -458,9 +492,15 @@ struct Pico32x
 struct Pico32xMem
 {
   unsigned char  sdram[0x40000];
+#ifdef DRC_SH2
+  unsigned short drcblk_ram[1 << (18 - SH2_DRCBLK_RAM_SHIFT)];
+#endif
   unsigned short dram[2][0x20000/2];    // AKA fb
   unsigned char  m68k_rom[0x10000];     // 0x100; using M68K_BANK_SIZE
   unsigned char  data_array[2][0x1000]; // cache in SH2s (can be used as RAM)
+#ifdef DRC_SH2
+  unsigned short drcblk_da[2][1 << (12 - SH2_DRCBLK_DA_SHIFT)];
+#endif
   unsigned char  sh2_rom_m[0x800];
   unsigned char  sh2_rom_s[0x400];
   unsigned short pal[0x100];
@@ -498,6 +538,7 @@ extern areaseek *areaSeek;
 extern areaclose *areaClose;
 
 // cart.c
+void Byteswap(void *dst, const void *src, int len);
 extern void (*PicoCartMemSetup)(void);
 extern void (*PicoCartUnloadHook)(void);
 
@@ -508,10 +549,12 @@ int CM_compareRun(int cyc, int is_sub);
 PICO_INTERNAL void PicoFrameStart(void);
 void PicoDrawSync(int to, int blank_last_line);
 void BackFill(int reg7, int sh);
-void FinalizeLineRGB555(int sh, int line);
+void FinalizeLine555(int sh, int line);
 extern int DrawScanline;
 #define MAX_LINE_SPRITES 29
 extern unsigned char HighLnSpr[240][3 + MAX_LINE_SPRITES];
+extern void *DrawLineDestBase;
+extern int DrawLineDestIncrement;
 
 // draw2.c
 PICO_INTERNAL void PicoFrameFull();
@@ -520,7 +563,7 @@ PICO_INTERNAL void PicoFrameFull();
 void PicoFrameStartMode4(void);
 void PicoLineMode4(int line);
 void PicoDoHighPal555M4(void);
-void PicoDrawSetColorFormatMode4(int which);
+void PicoDrawSetOutputMode4(pdso_t which);
 
 // memory.c
 PICO_INTERNAL void PicoMemSetup(void);
@@ -663,7 +706,8 @@ void PicoReset32x(void);
 void Pico32xStartup(void);
 void PicoUnload32x(void);
 void PicoFrame32x(void);
-void p32x_update_irls(void);
+void p32x_update_irls(int nested_call);
+void p32x_reset_sh2s(void);
 
 // 32x/memory.c
 struct Pico32xMem *Pico32xMem;
@@ -677,13 +721,21 @@ void p32x_poll_event(int cpu_mask, int is_vdp);
 
 // 32x/draw.c
 void FinalizeLine32xRGB555(int sh, int line);
+void PicoDraw32xLayer(int offs, int lines, int mdbg);
+void PicoDraw32xLayerMdOnly(int offs, int lines);
+enum {
+  PDM32X_OFF,
+  PDM32X_32X_ONLY,
+  PDM32X_BOTH,
+};
+extern int Pico32xDrawMode;
 
 // 32x/pwm.c
 unsigned int p32x_pwm_read16(unsigned int a);
 void p32x_pwm_write16(unsigned int a, unsigned int d);
-void p32x_pwm_refresh(void);
-void p32x_pwm_irq_check(void);
 void p32x_pwm_update(int *buf32, int length, int stereo);
+void p32x_timers_do(int line_call);
+void p32x_timers_recalc(void);
 extern int pwm_frame_smp_cnt;
 
 /* avoid dependency on newer glibc */
@@ -692,6 +744,10 @@ static __inline int isspace_(int c)
 	return (0x09 <= c && c <= 0x0d) || c == ' ';
 }
 
+#ifndef ARRAY_SIZE
+#define ARRAY_SIZE(x) (sizeof(x) / sizeof(x[0]))
+#endif
+
 // emulation event logging
 #ifndef EL_LOGMASK
 #define EL_LOGMASK 0
@@ -717,6 +773,7 @@ static __inline int isspace_(int c)
 #define EL_CDREGS  0x00020000 /* MCD: register access */
 #define EL_CDREG3  0x00040000 /* MCD: register 3 only */
 #define EL_32X     0x00080000
+#define EL_PWM     0x00100000 /* 32X PWM stuff (LOTS of output) */
 
 #define EL_STATUS  0x40000000 /* status messages */
 #define EL_ANOMALY 0x80000000 /* some unexpected conditions (during emulation) */
@@ -734,16 +791,28 @@ extern void lprintf(const char *fmt, ...);
 #define elprintf(w,f,...)
 #endif
 
+// profiling
+#ifdef PPROF
+#include <platform/linux/pprof.h>
+#else
+#define pprof_init()
+#define pprof_finish()
+#define pprof_start(x)
+#define pprof_end(...)
+#define pprof_end_sub(...)
+#endif
+
+// misc
 #ifdef _MSC_VER
 #define cdprintf
 #else
 #define cdprintf(x...)
 #endif
 
-#if defined(__GNUC__) && __GNUC__ >= 4 && __GNUC_MINOR__ >= 3
-#define MEMH_FUNC __attribute__((aligned(4)))
+#ifdef __i386__
+#define REGPARM(x) __attribute__((regparm(x)))
 #else
-#define MEMH_FUNC
+#define REGPARM(x)
 #endif
 
 #ifdef __GNUC__