X-Git-Url: https://notaz.gp2x.de/cgi-bin/gitweb.cgi?a=blobdiff_plain;f=pico%2Fpico_int.h;h=41dc59dc8358842791c67d8f56c10307df3f4f9b;hb=99ade2ee2f76fa8170fb4e1abacc24f39a150c44;hp=2053ac60c5730ce3f7ecb29a65ec03a35bb819be;hpb=ba6e8bfd4b707aab042e47bc3e2a14f70be01075;p=picodrive.git

diff --git a/pico/pico_int.h b/pico/pico_int.h
index 2053ac6..41dc59d 100644
--- a/pico/pico_int.h
+++ b/pico/pico_int.h
@@ -51,6 +51,9 @@ extern struct Cyclone PicoCpuCM68k, PicoCpuCS68k;
 #define SekIsStoppedS68k() (PicoCpuCS68k.state_flags&1)
 #define SekShouldInterrupt() (PicoCpuCM68k.irq > (PicoCpuCM68k.srh&7))
 
+#define SekNotPolling     PicoCpuCM68k.not_pol
+#define SekNotPollingS68k PicoCpuCS68k.not_pol
+
 #define SekInterrupt(i) PicoCpuCM68k.irq=i
 #define SekIrqLevel     PicoCpuCM68k.irq
 
@@ -79,6 +82,9 @@ extern M68K_CONTEXT PicoCpuFM68k, PicoCpuFS68k;
 #define SekIsStoppedS68k() (PicoCpuFS68k.execinfo&FM68K_HALTED)
 #define SekShouldInterrupt() fm68k_would_interrupt()
 
+#define SekNotPolling     PicoCpuFM68k.not_polling
+#define SekNotPollingS68k PicoCpuFS68k.not_polling
+
 #define SekInterrupt(irq) PicoCpuFM68k.interrupts[0]=irq
 #define SekIrqLevel       PicoCpuFM68k.interrupts[0]
 
@@ -108,6 +114,9 @@ extern m68ki_cpu_core PicoCpuMM68k, PicoCpuMS68k;
 #define SekIsStoppedS68k() (PicoCpuMS68k.stopped==STOP_LEVEL_STOP)
 #define SekShouldInterrupt() (CPU_INT_LEVEL > FLAG_INT_MASK)
 
+#define SekNotPolling     PicoCpuMM68k.not_polling
+#define SekNotPollingS68k PicoCpuMS68k.not_polling
+
 #define SekInterrupt(irq) { \
 	void *oldcontext = m68ki_cpu_p; \
 	m68k_set_context(&PicoCpuMM68k); \
@@ -134,8 +143,6 @@ extern unsigned int SekCycleAim;
 #define SekCyclesBurn(c)    SekCycleCnt += c
 #define SekCyclesBurnRun(c) { \
   SekCyclesLeft -= c; \
-  if (SekCyclesLeft < 0) \
-    SekCyclesLeft = 0; \
 }
 
 // note: sometimes may extend timeslice to delay an irq
@@ -174,6 +181,8 @@ extern struct DrZ80 drZ80;
 #define z80_run(cycles)    ((cycles) - DrZ80Run(&drZ80, cycles))
 #define z80_run_nr(cycles) DrZ80Run(&drZ80, cycles)
 #define z80_int()          drZ80.Z80_IRQ = 1
+#define z80_int()          drZ80.Z80_IRQ = 1
+#define z80_nmi()          drZ80.Z80IF |= 8
 
 #define z80_cyclesLeft     drZ80.cycles
 #define z80_pc()           (drZ80.Z80PC - drZ80.Z80PC_BASE)
@@ -184,6 +193,7 @@ extern struct DrZ80 drZ80;
 #define z80_run(cycles)    Cz80_Exec(&CZ80, cycles)
 #define z80_run_nr(cycles) Cz80_Exec(&CZ80, cycles)
 #define z80_int()          Cz80_Set_IRQ(&CZ80, 0, HOLD_LINE)
+#define z80_nmi()          Cz80_Set_IRQ(&CZ80, IRQ_LINE_NMI, 0)
 
 #define z80_cyclesLeft     (CZ80.ICount - CZ80.ExtraCycles)
 #define z80_pc()           Cz80_Get_Reg(&CZ80, CZ80_PC)
@@ -193,6 +203,7 @@ extern struct DrZ80 drZ80;
 #define z80_run(cycles)    (cycles)
 #define z80_run_nr(cycles)
 #define z80_int()
+#define z80_nmi()
 
 #endif
 
@@ -296,7 +307,7 @@ struct PicoMisc
   unsigned char sram_reg;      // 09 SRAM reg. See SRR_* below
   unsigned short z80_bank68k;  // 0a
   unsigned short pad0;
-  unsigned char  pad1;
+  unsigned char  ncart_in;     // 0e !cart_in
   unsigned char  z80_reset;    // 0f z80 reset held
   unsigned char  padDelay[2];  // 10 gamepad phase time outs, so we count a delay
   unsigned short eeprom_addr;  // EEPROM address register
@@ -313,7 +324,8 @@ struct PicoMS
 {
   unsigned char carthw[0x10];
   unsigned char io_ctl;
-  unsigned char pad[0x4f];
+  unsigned char nmi_state;
+  unsigned char pad[0x4e];
 };
 
 // some assembly stuff depend on these, do not touch!
@@ -364,7 +376,8 @@ struct PicoSRAM
 // MCD
 #include "cd/cd_sys.h"
 #include "cd/LC89510.h"
-#include "cd/gfx_cd.h"
+
+#define PCM_MIXBUF_LEN ((12500000 / 384) / 50 + 1)
 
 struct mcd_pcm
 {
@@ -372,7 +385,7 @@ struct mcd_pcm
 	unsigned char enabled; // reg8
 	unsigned char cur_ch;
 	unsigned char bank;
-	int pad1;
+	unsigned int update_cycles;
 
 	struct pcm_chan			// 08, size 0x10
 	{
@@ -382,10 +395,12 @@ struct mcd_pcm
 	} ch[8];
 };
 
+#define PCD_ST_S68K_RST 1
+
 struct mcd_misc
 {
 	unsigned short hint_vector;
-	unsigned char  busreq;
+	unsigned char  busreq;		// not s68k_regs[1]
 	unsigned char  s68k_pend_ints;
 	unsigned int   state_flags;	// 04
 	unsigned int   stopwatch_base_c;
@@ -430,7 +445,10 @@ typedef struct
 	CDD  cdd;
 	CDC  cdc;
 	_scd scd;
-	Rot_Comp rot_comp;
+	int pcm_mixbuf[PCM_MIXBUF_LEN * 2];
+	int pcm_mixpos;
+	char pcm_mixbuf_dirty;
+	char pcm_regs_dirty;
 } mcd_state;
 
 // XXX: this will need to be reworked for cart+cd support.
@@ -438,6 +456,7 @@ typedef struct
 
 // 32X
 #define P32XS_FM    (1<<15)
+#define P32XS_nCART (1<< 8)
 #define P32XS_REN   (1<< 7)
 #define P32XS_nRES  (1<< 1)
 #define P32XS_ADEN  (1<< 0)
@@ -591,8 +610,22 @@ void PicoWrite16_io(unsigned int a, unsigned int d);
 // pico/memory.c
 PICO_INTERNAL void PicoMemSetupPico(void);
 
+// cd/gfx.c
+void gfx_init(void);
+void gfx_start(unsigned int base);
+void gfx_update(unsigned int cycles);
+int gfx_context_save(unsigned char *state);
+int gfx_context_load(const unsigned char *state);
+
+// cd/gfx_dma.c
+void DmaSlowCell(unsigned int source, unsigned int a, int len, unsigned char inc);
+
 // cd/memory.c
 PICO_INTERNAL void PicoMemSetupCD(void);
+unsigned int PicoRead8_mcd_io(unsigned int a);
+unsigned int PicoRead16_mcd_io(unsigned int a);
+void PicoWrite8_mcd_io(unsigned int a, unsigned int d);
+void PicoWrite16_mcd_io(unsigned int a, unsigned int d);
 void pcd_state_loaded_mem(void);
 
 // pico.c
@@ -633,8 +666,16 @@ void pcd_event_schedule(unsigned int now, enum pcd_event event, int after);
 void pcd_event_schedule_s68k(enum pcd_event event, int after);
 unsigned int pcd_cycles_m68k_to_s68k(unsigned int c);
 int  pcd_sync_s68k(unsigned int m68k_target, int m68k_poll_sync);
+void pcd_run_cpus(int m68k_cycles);
+void pcd_soft_reset(void);
 void pcd_state_loaded(void);
 
+// cd/pcm.c
+void pcd_pcm_sync(unsigned int to);
+void pcd_pcm_update(int *buffer, int length, int stereo);
+void pcd_pcm_write(unsigned int a, unsigned int d);
+unsigned int pcd_pcm_read(unsigned int a);
+
 // pico/pico.c
 PICO_INTERNAL void PicoInitPico(void);
 PICO_INTERNAL void PicoReratePico(void);
@@ -697,6 +738,7 @@ void ym2612_unpack_state(void);
 
 
 // videoport.c
+extern int line_base_cycles;
 PICO_INTERNAL_ASM void PicoVideoWrite(unsigned int a,unsigned short d);
 PICO_INTERNAL_ASM unsigned int PicoVideoRead(unsigned int a);
 PICO_INTERNAL_ASM unsigned int PicoVideoRead8(unsigned int a);
@@ -828,9 +870,9 @@ void sh2_peripheral_reset(SH2 *sh2);
 unsigned int sh2_peripheral_read8(unsigned int a, SH2 *sh2);
 unsigned int sh2_peripheral_read16(unsigned int a, SH2 *sh2);
 unsigned int sh2_peripheral_read32(unsigned int a, SH2 *sh2);
-void sh2_peripheral_write8(unsigned int a, unsigned int d, SH2 *sh2);
-void sh2_peripheral_write16(unsigned int a, unsigned int d, SH2 *sh2);
-void sh2_peripheral_write32(unsigned int a, unsigned int d, SH2 *sh2);
+void REGPARM(3) sh2_peripheral_write8(unsigned int a, unsigned int d, SH2 *sh2);
+void REGPARM(3) sh2_peripheral_write16(unsigned int a, unsigned int d, SH2 *sh2);
+void REGPARM(3) sh2_peripheral_write32(unsigned int a, unsigned int d, SH2 *sh2);
 
 #else
 #define Pico32xInit()
@@ -959,7 +1001,7 @@ void pevt_dump(void);
 #define cdprintf(x...)
 #endif
 
-#ifdef __i386__
+#if defined(__GNUC__) && defined(__i386__)
 #define REGPARM(x) __attribute__((regparm(x)))
 #else
 #define REGPARM(x)