X-Git-Url: https://notaz.gp2x.de/cgi-bin/gitweb.cgi?a=blobdiff_plain;f=pico%2Fpico_int.h;h=55da52654165d3e6ae5a1a58951f997521edb538;hb=5e89f0f5aebedc086888415e063b9883fc4a9e92;hp=4a4418e4f80c68fd5d349d2bb58d64d71fea6f17;hpb=87b0845f3733166b491ae236feb8bc2eb0fca2ec;p=picodrive.git diff --git a/pico/pico_int.h b/pico/pico_int.h index 4a4418e..55da526 100644 --- a/pico/pico_int.h +++ b/pico/pico_int.h @@ -186,6 +186,7 @@ extern struct DrZ80 drZ80; #define z80_int() drZ80.Z80_IRQ = 1 #define z80_cyclesLeft drZ80.cycles +#define z80_pc() (drZ80.Z80PC - drZ80.Z80PC_BASE) #elif defined(_USE_CZ80) #include "../cpu/cz80/cz80.h" @@ -195,6 +196,7 @@ extern struct DrZ80 drZ80; #define z80_int() Cz80_Set_IRQ(&CZ80, 0, HOLD_LINE) #define z80_cyclesLeft (CZ80.ICount - CZ80.ExtraCycles) +#define z80_pc() Cz80_Get_Reg(&CZ80, CZ80_PC) #else @@ -253,18 +255,19 @@ struct PicoMisc char dirtyPal; // 06 Is the palette dirty (1 - change @ this frame, 2 - some time before) unsigned char hardware; // 07 Hardware value for country unsigned char pal; // 08 1=PAL 0=NTSC - unsigned char sram_reg; // SRAM mode register. bit0: allow read? bit1: deny write? bit2: EEPROM? bit4: detected? (header or by access) + unsigned char sram_reg; // 09 SRAM reg. See SRR_* below unsigned short z80_bank68k; // 0a - unsigned short z80_lastaddr; // this is for Z80 faking - unsigned char z80_fakeval; + unsigned short pad0; + unsigned char pad1; unsigned char z80_reset; // z80 reset held unsigned char padDelay[2]; // 10 gamepad phase time outs, so we count a delay unsigned short eeprom_addr; // EEPROM address register - unsigned char eeprom_cycle; // EEPROM SRAM cycle number + unsigned char eeprom_cycle; // EEPROM cycle number unsigned char eeprom_slave; // EEPROM slave word for X24C02 and better SRAMs - unsigned char prot_bytes[2]; // simple protection faking + unsigned char eeprom_status; + unsigned char pad2; unsigned short dma_xfers; // 18 - unsigned char pad[2]; + unsigned char eeprom_wb[2]; // EEPROM latch/write buffer unsigned int frame_count; // 1c for movies and idle det }; @@ -291,19 +294,26 @@ struct Pico }; // sram +#define SRR_MAPPED (1 << 0) +#define SRR_READONLY (1 << 1) + +#define SRF_ENABLED (1 << 0) +#define SRF_EEPROM (1 << 1) + struct PicoSRAM { unsigned char *data; // actual data unsigned int start; // start address in 68k address space unsigned int end; - unsigned char unused1; // 0c: unused + unsigned char flags; // 0c: SRF_* unsigned char unused2; unsigned char changed; - unsigned char eeprom_type; // eeprom type: 0: 7bit (24C01), 2: device with 2 addr words (X24C02+), 3: dev with 3 addr words - unsigned char eeprom_abits; // eeprom access must be odd addr for: bit0 ~ cl, bit1 ~ out + unsigned char eeprom_type; // eeprom type: 0: 7bit (24C01), 2: 2 addr words (X24C02+), 3: 3 addr words + unsigned char unused3; unsigned char eeprom_bit_cl; // bit number for cl unsigned char eeprom_bit_in; // bit number for in unsigned char eeprom_bit_out; // bit number for out + unsigned int size; }; // MCD @@ -375,8 +385,37 @@ typedef struct Rot_Comp rot_comp; } mcd_state; +// XXX: this will need to be reworked for cart+cd support. #define Pico_mcd ((mcd_state *)Pico.rom) +// 32X +#define P32XV_nPAL (1<<15) +#define P32XV_PRI (1<< 7) +#define P32XV_Mx (3<< 0) + +#define P32XV_VBLK (1<<15) +#define P32XV_HBLK (1<<14) +#define P32XV_PEN (1<<13) +#define P32XV_nFEN (1<< 1) +#define P32XV_FS (1<< 0) + +struct Pico32x +{ + unsigned short regs[0x20]; + unsigned short vdp_regs[0x10]; + unsigned char pending_fb; + unsigned char dirty_pal; + unsigned char pad[2]; +}; + +struct Pico32xMem +{ + unsigned char sdram[0x40000]; + unsigned short dram[2][0x20000/2]; // AKA fb + unsigned char m68k_rom[0x10000]; // 0x100; using M68K_BANK_SIZE + unsigned short pal[0x100]; + unsigned short pal_native[0x100]; // converted to native (for renderer) +}; // area.c PICO_INTERNAL void PicoAreaPackCpu(unsigned char *cpu, int is_sub); @@ -407,6 +446,7 @@ extern areaseek *areaSeek; extern areaclose *areaClose; // cart.c +extern void (*PicoCartMemSetup)(void); extern void (*PicoCartUnloadHook)(void); // debug.c @@ -416,6 +456,7 @@ int CM_compareRun(int cyc, int is_sub); PICO_INTERNAL void PicoFrameStart(void); void PicoDrawSync(int to, int blank_last_line); void BackFill(int reg7, int sh); +void FinalizeLineRGB555(int sh, int line); extern int DrawScanline; #define MAX_LINE_SPRITES 29 extern unsigned char HighLnSpr[240][3 + MAX_LINE_SPRITES]; @@ -430,28 +471,20 @@ void PicoDoHighPal555M4(void); void PicoDrawSetColorFormatMode4(int which); // memory.c -PICO_INTERNAL void PicoInitPc(unsigned int pc); -PICO_INTERNAL unsigned int PicoCheckPc(unsigned int pc); -PICO_INTERNAL_ASM unsigned int PicoRead32(unsigned int a); PICO_INTERNAL void PicoMemSetup(void); -PICO_INTERNAL_ASM void PicoMemReset(void); -PICO_INTERNAL void PicoMemResetHooks(void); -PICO_INTERNAL int PadRead(int i); -PICO_INTERNAL int ym2612_write_local(unsigned int a, unsigned int d, int is_from_z80); -void z80_mem_setup(void); -extern unsigned int (*PicoRead16Hook)(unsigned int a, int realsize); -extern void (*PicoWrite8Hook) (unsigned int a,unsigned int d,int realsize); -extern void (*PicoWrite16Hook)(unsigned int a,unsigned int d,int realsize); +unsigned int PicoRead8_io(unsigned int a); +unsigned int PicoRead16_io(unsigned int a); +void PicoWrite8_io(unsigned int a, unsigned int d); +void PicoWrite16_io(unsigned int a, unsigned int d); + +// pico/memory.c +PICO_INTERNAL void PicoMemSetupPico(void); // cd/memory.c PICO_INTERNAL void PicoMemSetupCD(void); -PICO_INTERNAL_ASM void PicoMemResetCD(int r3); +PICO_INTERNAL_ASM void PicoMemRemapCD(int r3); PICO_INTERNAL_ASM void PicoMemResetCDdecode(int r3); -// pico/memory.c -PICO_INTERNAL void PicoMemSetupPico(void); -PICO_INTERNAL unsigned int ym2612_read_local_68k(void); - // pico.c extern struct Pico Pico; extern struct PicoSRAM SRam; @@ -531,22 +564,22 @@ PICO_INTERNAL_ASM unsigned int PicoVideoRead8(unsigned int a); extern int (*PicoDmaHook)(unsigned int source, int len, unsigned short **srcp, unsigned short **limitp); // misc.c -PICO_INTERNAL void SRAMWriteEEPROM(unsigned int d); -PICO_INTERNAL void SRAMUpdPending(unsigned int a, unsigned int d); -PICO_INTERNAL_ASM unsigned int SRAMReadEEPROM(void); PICO_INTERNAL_ASM void memcpy16(unsigned short *dest, unsigned short *src, int count); PICO_INTERNAL_ASM void memcpy16bswap(unsigned short *dest, void *src, int count); PICO_INTERNAL_ASM void memcpy32(int *dest, int *src, int count); // 32bit word count PICO_INTERNAL_ASM void memset32(int *dest, int c, int count); +// eeprom.c +void EEPROM_write8(unsigned int a, unsigned int d); +void EEPROM_write16(unsigned int d); +unsigned int EEPROM_read(void); + // z80 functionality wrappers PICO_INTERNAL void z80_init(void); PICO_INTERNAL void z80_pack(unsigned char *data); PICO_INTERNAL void z80_unpack(unsigned char *data); PICO_INTERNAL void z80_reset(void); PICO_INTERNAL void z80_exit(void); -void z80_map_set(unsigned long *map, int start_addr, - int end_addr, void *func_or_mh, int is_func); // cd/misc.c PICO_INTERNAL_ASM void wram_2M_to_1M(unsigned char *m); @@ -570,6 +603,33 @@ void PicoMemSetupMS(void); void PicoFrameMS(void); void PicoFrameDrawOnlyMS(void); +// 32x/32x.c +extern struct Pico32x Pico32x; +void Pico32xInit(void); +void PicoPower32x(void); +void PicoReset32x(void); +void Pico32xStartup(void); +void PicoUnload32x(void); +void PicoFrame32x(void); + +// 32x/memory.c +struct Pico32xMem *Pico32xMem; +unsigned int PicoRead8_32x(unsigned int a); +unsigned int PicoRead16_32x(unsigned int a); +void PicoWrite8_32x(unsigned int a, unsigned int d); +void PicoWrite16_32x(unsigned int a, unsigned int d); +void PicoMemSetup32x(void); +void Pico32xSwapDRAM(int b); + +// 32x/draw.c +void FinalizeLine32xRGB555(int sh, int line); + +/* avoid dependency on newer glibc */ +static __inline int isspace_(int c) +{ + return (0x09 <= c && c <= 0x0d) || c == ' '; +} + // emulation event logging #ifndef EL_LOGMASK #define EL_LOGMASK 0 @@ -592,6 +652,9 @@ void PicoFrameDrawOnlyMS(void); #define EL_SVP 0x00004000 /* SVP stuff */ #define EL_PICOHW 0x00008000 /* Pico stuff */ #define EL_IDLE 0x00010000 /* idle loop det. */ +#define EL_CDREGS 0x00020000 /* MCD: register access */ +#define EL_CDREG3 0x00040000 /* MCD: register 3 only */ +#define EL_32X 0x00080000 #define EL_STATUS 0x40000000 /* status messages */ #define EL_ANOMALY 0x80000000 /* some unexpected conditions (during emulation) */ @@ -621,6 +684,12 @@ extern void lprintf(const char *fmt, ...); #define MEMH_FUNC #endif +#ifdef __GNUC__ +#define NOINLINE __attribute__((noinline)) +#else +#define NOINLINE +#endif + #ifdef __cplusplus } // End of extern "C" #endif