X-Git-Url: https://notaz.gp2x.de/cgi-bin/gitweb.cgi?a=blobdiff_plain;f=pico%2Fpico_int.h;h=b84b1316a15d80d5e54de734ab7fde988764c13c;hb=5fadfb1c3732909f8e870954aeea82b761457784;hp=55da52654165d3e6ae5a1a58951f997521edb538;hpb=5e89f0f5aebedc086888415e063b9883fc4a9e92;p=picodrive.git

diff --git a/pico/pico_int.h b/pico/pico_int.h
index 55da526..b84b131 100644
--- a/pico/pico_int.h
+++ b/pico/pico_int.h
@@ -1,7 +1,7 @@
 // Pico Library - Internal Header File
 
 // (c) Copyright 2004 Dave, All rights reserved.
-// (c) Copyright 2006-2008 Grazvydas "notaz" Ignotas, all rights reserved.
+// (c) Copyright 2006-2009 Grazvydas "notaz" Ignotas, all rights reserved.
 // Free for non-commercial use.
 
 // For commercial use, separate licencing terms must be obtained.
@@ -45,12 +45,15 @@ extern struct Cyclone PicoCpuCM68k, PicoCpuCS68k;
 #define SekEndTimesliceS68k(after) PicoCpuCS68k.cycles=after
 #define SekPc (PicoCpuCM68k.pc-PicoCpuCM68k.membase)
 #define SekPcS68k (PicoCpuCS68k.pc-PicoCpuCS68k.membase)
+#define SekDar(x) PicoCpuCM68k.d[x]
+#define SekSr     CycloneGetSr(&PicoCpuCM68k)
 #define SekSetStop(x) { PicoCpuCM68k.state_flags&=~1; if (x) { PicoCpuCM68k.state_flags|=1; PicoCpuCM68k.cycles=0; } }
 #define SekSetStopS68k(x) { PicoCpuCS68k.state_flags&=~1; if (x) { PicoCpuCS68k.state_flags|=1; PicoCpuCS68k.cycles=0; } }
 #define SekIsStoppedS68k() (PicoCpuCS68k.state_flags&1)
 #define SekShouldInterrupt (PicoCpuCM68k.irq > (PicoCpuCM68k.srh&7))
 
 #define SekInterrupt(i) PicoCpuCM68k.irq=i
+#define SekIrqLevel     PicoCpuCM68k.irq
 
 #ifdef EMU_M68K
 #define EMU_CORE_DEBUG
@@ -69,6 +72,8 @@ extern M68K_CONTEXT PicoCpuFM68k, PicoCpuFS68k;
 #define SekEndTimesliceS68k(after) PicoCpuFS68k.io_cycle_counter=after
 #define SekPc     fm68k_get_pc(&PicoCpuFM68k)
 #define SekPcS68k fm68k_get_pc(&PicoCpuFS68k)
+#define SekDar(x) PicoCpuFM68k.dreg[x].D
+#define SekSr     PicoCpuFM68k.sr
 #define SekSetStop(x) { \
 	PicoCpuFM68k.execinfo &= ~FM68K_HALTED; \
 	if (x) { PicoCpuFM68k.execinfo |= FM68K_HALTED; PicoCpuFM68k.io_cycle_counter = 0; } \
@@ -81,6 +86,7 @@ extern M68K_CONTEXT PicoCpuFM68k, PicoCpuFS68k;
 #define SekShouldInterrupt fm68k_would_interrupt()
 
 #define SekInterrupt(irq) PicoCpuFM68k.interrupts[0]=irq
+#define SekIrqLevel       PicoCpuFM68k.interrupts[0]
 
 #ifdef EMU_M68K
 #define EMU_CORE_DEBUG
@@ -100,6 +106,8 @@ extern m68ki_cpu_core PicoCpuMM68k, PicoCpuMS68k;
 #define SekEndTimesliceS68k(after) PicoCpuMS68k.cyc_remaining_cycles=after
 #define SekPc m68k_get_reg(&PicoCpuMM68k, M68K_REG_PC)
 #define SekPcS68k m68k_get_reg(&PicoCpuMS68k, M68K_REG_PC)
+#define SekDar(x) PicoCpuMM68k.dar[x]
+#define SekSr m68k_get_reg(&PicoCpuMM68k, M68K_REG_SR)
 #define SekSetStop(x) { \
 	if(x) { SET_CYCLES(0); PicoCpuMM68k.stopped=STOP_LEVEL_STOP; } \
 	else PicoCpuMM68k.stopped=0; \
@@ -117,6 +125,7 @@ extern m68ki_cpu_core PicoCpuMM68k, PicoCpuMS68k;
 	m68k_set_irq(irq); \
 	m68k_set_context(oldcontext); \
 }
+#define SekIrqLevel (PicoCpuMM68k.int_level >> 8)
 
 #endif
 #endif // EMU_M68K
@@ -226,6 +235,23 @@ extern unsigned long z80_write_map[0x10000 >> Z80_MEM_SHIFT];
 typedef unsigned char (z80_read_f)(unsigned short a);
 typedef void (z80_write_f)(unsigned int a, unsigned char data);
 
+// ----------------------- SH2 CPU -----------------------
+
+#include "cpu/sh2mame/sh2.h"
+
+extern SH2 sh2s[2];
+#define msh2 sh2s[0]
+#define ssh2 sh2s[1]
+
+#define ash2_end_run(after) if (sh2_icount > (after)) sh2_icount = after
+#define ash2_cycles_done() (sh2->cycles_aim - sh2_icount)
+
+#define sh2_pc(c)     (c) ? ssh2.ppc : msh2.ppc
+#define sh2_reg(c, x) (c) ? ssh2.r[x] : msh2.r[x]
+#define sh2_gbr(c)    (c) ? ssh2.gbr : msh2.gbr
+#define sh2_vbr(c)    (c) ? ssh2.vbr : msh2.vbr
+#define sh2_sr(c)     (c) ? ssh2.sr : msh2.sr
+
 // ---------------------------------------------------------
 
 // main oscillator clock which controls timing
@@ -259,7 +285,7 @@ struct PicoMisc
   unsigned short z80_bank68k;  // 0a
   unsigned short pad0;
   unsigned char  pad1;
-  unsigned char  z80_reset;    // z80 reset held
+  unsigned char  z80_reset;    // 0f z80 reset held
   unsigned char  padDelay[2];  // 10 gamepad phase time outs, so we count a delay
   unsigned short eeprom_addr;  // EEPROM address register
   unsigned char  eeprom_cycle; // EEPROM cycle number
@@ -389,32 +415,74 @@ typedef struct
 #define Pico_mcd ((mcd_state *)Pico.rom)
 
 // 32X
-#define P32XV_nPAL (1<<15)
-#define P32XV_PRI  (1<< 7)
-#define P32XV_Mx   (3<< 0)
-
-#define P32XV_VBLK (1<<15)
-#define P32XV_HBLK (1<<14)
-#define P32XV_PEN  (1<<13)
-#define P32XV_nFEN (1<< 1)
-#define P32XV_FS   (1<< 0)
+#define P32XS_FM    (1<<15)
+#define P32XS2_ADEN (1<< 9)
+#define P32XS_FULL  (1<< 7) // DREQ FIFO full
+#define P32XS_68S   (1<< 2)
+#define P32XS_DMA   (1<< 1)
+#define P32XS_RV    (1<< 0)
+
+#define P32XV_nPAL  (1<<15) // VDP
+#define P32XV_PRI   (1<< 7)
+#define P32XV_Mx    (3<< 0) // display mode mask
+
+#define P32XV_VBLK  (1<<15)
+#define P32XV_HBLK  (1<<14)
+#define P32XV_PEN   (1<<13)
+#define P32XV_nFEN  (1<< 1)
+#define P32XV_FS    (1<< 0)
+
+#define P32XP_FULL  (1<<15) // PWM
+#define P32XP_EMPTY (1<<14)
+
+#define P32XF_68KPOLL   (1 << 0)
+#define P32XF_MSH2POLL  (1 << 1)
+#define P32XF_SSH2POLL  (1 << 2)
+#define P32XF_68KVPOLL  (1 << 3)
+#define P32XF_MSH2VPOLL (1 << 4)
+#define P32XF_SSH2VPOLL (1 << 5)
+
+#define P32XI_VRES (1 << 14/2) // IRL/2
+#define P32XI_VINT (1 << 12/2)
+#define P32XI_HINT (1 << 10/2)
+#define P32XI_CMD  (1 <<  8/2)
+#define P32XI_PWM  (1 <<  6/2)
+
+// peripheral reg access
+#define PREG8(regs,offs) ((unsigned char *)regs)[offs ^ 3]
+
+// real one is 4*2, but we use more because we don't lockstep
+#define DMAC_FIFO_LEN (4*4)
+#define PWM_BUFF_LEN 1024 // in one channel samples
 
 struct Pico32x
 {
   unsigned short regs[0x20];
   unsigned short vdp_regs[0x10];
+  unsigned short sh2_regs[3];
   unsigned char pending_fb;
   unsigned char dirty_pal;
-  unsigned char pad[2];
+  unsigned int emu_flags;
+  unsigned char sh2irq_mask[2];
+  unsigned char sh2irqi[2];      // individual
+  unsigned int sh2irqs;          // common irqs
+  unsigned short dmac_fifo[DMAC_FIFO_LEN];
+  unsigned int dmac_ptr;
+  unsigned int pwm_irq_sample_cnt;
 };
 
 struct Pico32xMem
 {
   unsigned char  sdram[0x40000];
-  unsigned short dram[2][0x20000/2]; // AKA fb
-  unsigned char  m68k_rom[0x10000]; // 0x100; using M68K_BANK_SIZE
+  unsigned short dram[2][0x20000/2];    // AKA fb
+  unsigned char  m68k_rom[0x10000];     // 0x100; using M68K_BANK_SIZE
+  unsigned char  data_array[2][0x1000]; // cache in SH2s (can be used as RAM)
+  unsigned char  sh2_rom_m[0x800];
+  unsigned char  sh2_rom_s[0x400];
   unsigned short pal[0x100];
-  unsigned short pal_native[0x100]; // converted to native (for renderer)
+  unsigned short pal_native[0x100];     // converted to native (for renderer)
+  unsigned int   sh2_peri_regs[2][0x200/4]; // periphereal regs of SH2s
+  signed short   pwm[2*PWM_BUFF_LEN];   // PWM buffer for current frame
 };
 
 // area.c
@@ -482,14 +550,14 @@ PICO_INTERNAL void PicoMemSetupPico(void);
 
 // cd/memory.c
 PICO_INTERNAL void PicoMemSetupCD(void);
-PICO_INTERNAL_ASM void PicoMemRemapCD(int r3);
-PICO_INTERNAL_ASM void PicoMemResetCDdecode(int r3);
+void PicoMemStateLoaded(void);
 
 // pico.c
 extern struct Pico Pico;
 extern struct PicoSRAM SRam;
 extern int PicoPadInt[2];
 extern int emustatus;
+extern int scanlines_total;
 extern void (*PicoResetHook)(void);
 extern void (*PicoLineHook)(void);
 PICO_INTERNAL int  CheckDMA(void);
@@ -611,6 +679,7 @@ void PicoReset32x(void);
 void Pico32xStartup(void);
 void PicoUnload32x(void);
 void PicoFrame32x(void);
+void p32x_update_irls(void);
 
 // 32x/memory.c
 struct Pico32xMem *Pico32xMem;
@@ -620,10 +689,19 @@ void PicoWrite8_32x(unsigned int a, unsigned int d);
 void PicoWrite16_32x(unsigned int a, unsigned int d);
 void PicoMemSetup32x(void);
 void Pico32xSwapDRAM(int b);
+void p32x_poll_event(int cpu_mask, int is_vdp);
 
 // 32x/draw.c
 void FinalizeLine32xRGB555(int sh, int line);
 
+// 32x/pwm.c
+unsigned int p32x_pwm_read16(unsigned int a);
+void p32x_pwm_write16(unsigned int a, unsigned int d);
+void p32x_pwm_update(int *buf32, int length, int stereo);
+void p32x_timers_do(int new_line);
+void p32x_timers_recalc(void);
+extern int pwm_frame_smp_cnt;
+
 /* avoid dependency on newer glibc */
 static __inline int isspace_(int c)
 {
@@ -655,6 +733,7 @@ static __inline int isspace_(int c)
 #define EL_CDREGS  0x00020000 /* MCD: register access */
 #define EL_CDREG3  0x00040000 /* MCD: register 3 only */
 #define EL_32X     0x00080000
+#define EL_PWM     0x00100000 /* 32X PWM stuff (LOTS of output) */
 
 #define EL_STATUS  0x40000000 /* status messages */
 #define EL_ANOMALY 0x80000000 /* some unexpected conditions (during emulation) */