X-Git-Url: https://notaz.gp2x.de/cgi-bin/gitweb.cgi?a=blobdiff_plain;f=pico%2Fpico_int.h;h=bb8fde7554976e0db85fb81810b48af3ec9f6e85;hb=0219d379de3e8168a94dc4a5f220af04039868fd;hp=383739c48ea8f30f72d1409da8c793161167967c;hpb=a7f82a776aaceee318707827f5aa074d0f0a2bb7;p=picodrive.git

diff --git a/pico/pico_int.h b/pico/pico_int.h
index 383739c..bb8fde7 100644
--- a/pico/pico_int.h
+++ b/pico/pico_int.h
@@ -46,8 +46,10 @@ extern struct Cyclone PicoCpuCM68k, PicoCpuCS68k;
 #define SekEndTimesliceS68k(after) PicoCpuCS68k.cycles=after
 #define SekPc (PicoCpuCM68k.pc-PicoCpuCM68k.membase)
 #define SekPcS68k (PicoCpuCS68k.pc-PicoCpuCS68k.membase)
-#define SekDar(x) (x < 8 ? PicoCpuCM68k.d[x] : PicoCpuCM68k.a[x - 8])
+#define SekDar(x)     (x < 8 ? PicoCpuCM68k.d[x] : PicoCpuCM68k.a[x - 8])
+#define SekDarS68k(x) (x < 8 ? PicoCpuCS68k.d[x] : PicoCpuCS68k.a[x - 8])
 #define SekSr     CycloneGetSr(&PicoCpuCM68k)
+#define SekSrS68k CycloneGetSr(&PicoCpuCS68k)
 #define SekSetStop(x) { PicoCpuCM68k.state_flags&=~1; if (x) { PicoCpuCM68k.state_flags|=1; PicoCpuCM68k.cycles=0; } }
 #define SekSetStopS68k(x) { PicoCpuCS68k.state_flags&=~1; if (x) { PicoCpuCS68k.state_flags|=1; PicoCpuCS68k.cycles=0; } }
 #define SekIsStoppedM68k() (PicoCpuCM68k.state_flags&1)
@@ -74,8 +76,10 @@ extern M68K_CONTEXT PicoCpuFM68k, PicoCpuFS68k;
 #define SekEndTimesliceS68k(after) PicoCpuFS68k.io_cycle_counter=after
 #define SekPc     fm68k_get_pc(&PicoCpuFM68k)
 #define SekPcS68k fm68k_get_pc(&PicoCpuFS68k)
-#define SekDar(x) (x < 8 ? PicoCpuFM68k.dreg[x].D : PicoCpuFM68k.areg[x - 8].D)
+#define SekDar(x)     (x < 8 ? PicoCpuFM68k.dreg[x].D : PicoCpuFM68k.areg[x - 8].D)
+#define SekDarS68k(x) (x < 8 ? PicoCpuFS68k.dreg[x].D : PicoCpuFS68k.areg[x - 8].D)
 #define SekSr     PicoCpuFM68k.sr
+#define SekSrS68k PicoCpuFS68k.sr
 #define SekSetStop(x) { \
 	PicoCpuFM68k.execinfo &= ~FM68K_HALTED; \
 	if (x) { PicoCpuFM68k.execinfo |= FM68K_HALTED; PicoCpuFM68k.io_cycle_counter = 0; } \
@@ -109,8 +113,10 @@ extern m68ki_cpu_core PicoCpuMM68k, PicoCpuMS68k;
 #define SekEndTimesliceS68k(after) PicoCpuMS68k.cyc_remaining_cycles=after
 #define SekPc m68k_get_reg(&PicoCpuMM68k, M68K_REG_PC)
 #define SekPcS68k m68k_get_reg(&PicoCpuMS68k, M68K_REG_PC)
-#define SekDar(x) PicoCpuMM68k.dar[x]
-#define SekSr m68k_get_reg(&PicoCpuMM68k, M68K_REG_SR)
+#define SekDar(x)     PicoCpuMM68k.dar[x]
+#define SekDarS68k(x) PicoCpuMS68k.dar[x]
+#define SekSr     m68k_get_reg(&PicoCpuMM68k, M68K_REG_SR)
+#define SekSrS68k m68k_get_reg(&PicoCpuMS68k, M68K_REG_SR)
 #define SekSetStop(x) { \
 	if(x) { SET_CYCLES(0); PicoCpuMM68k.stopped=STOP_LEVEL_STOP; } \
 	else PicoCpuMM68k.stopped=0; \
@@ -240,23 +246,25 @@ extern SH2 sh2s[2];
 #ifndef DRC_SH2
 # define sh2_end_run(sh2, after_) do { \
   if ((sh2)->icount > (after_)) { \
-    (sh2)->cycles_timeslice -= (sh2)->icount; \
+    (sh2)->cycles_timeslice -= (sh2)->icount - (after_); \
     (sh2)->icount = after_; \
   } \
 } while (0)
 # define sh2_cycles_left(sh2) (sh2)->icount
-# define sh2_pc(c)    (c) ? ssh2.ppc : msh2.ppc
+# define sh2_burn_cycles(sh2, n) (sh2)->icount -= n
+# define sh2_pc(sh2) (sh2)->ppc
 #else
 # define sh2_end_run(sh2, after_) do { \
   int left_ = (signed int)(sh2)->sr >> 12; \
   if (left_ > (after_)) { \
-    (sh2)->cycles_timeslice -= left_; \
+    (sh2)->cycles_timeslice -= left_ - (after_); \
     (sh2)->sr &= 0xfff; \
     (sh2)->sr |= (after_) << 12; \
   } \
 } while (0)
 # define sh2_cycles_left(sh2) ((signed int)(sh2)->sr >> 12)
-# define sh2_pc(c)    (c) ? ssh2.pc : msh2.pc
+# define sh2_burn_cycles(sh2, n) (sh2)->sr -= ((n) << 12)
+# define sh2_pc(sh2) (sh2)->pc
 #endif
 
 #define sh2_cycles_done(sh2) ((int)(sh2)->cycles_timeslice - sh2_cycles_left(sh2))
@@ -275,6 +283,9 @@ extern SH2 sh2s[2];
 #define sh2_set_vbr(c, v) \
   { if (c) ssh2.vbr = v; else msh2.vbr = v; }
 
+#define elprintf_sh2(sh2, w, f, ...) \
+	elprintf(w,"%csh2 "f,(sh2)->is_slave?'s':'m',##__VA_ARGS__)
+
 // ---------------------------------------------------------
 
 // main oscillator clock which controls timing
@@ -342,7 +353,7 @@ struct Pico
   unsigned short vsram[0x40];  // 0x22180
 
   unsigned char *rom;          // 0x22200
-  unsigned int romsize;        // 0x22204
+  unsigned int romsize;        // 0x22204 (on 32bits)
 
   struct PicoMisc m;
   struct PicoVideo video;
@@ -467,12 +478,12 @@ typedef struct
 #define P32XV_nFEN  (1<< 1)
 #define P32XV_FS    (1<< 0)
 
-#define P32XP_FULL  (1<<15) // PWM
+#define P32XP_RTP   (1<<7)  // PWM control
+#define P32XP_FULL  (1<<15) // PWM pulse
 #define P32XP_EMPTY (1<<14)
 
 #define P32XF_68KCPOLL  (1 << 0)
 #define P32XF_68KVPOLL  (1 << 1)
-#define P32XF_PWM_PEND  (1 << 6)
 
 #define P32XI_VRES (1 << 14/2) // IRL/2
 #define P32XI_VINT (1 << 12/2)
@@ -483,13 +494,13 @@ typedef struct
 // peripheral reg access
 #define PREG8(regs,offs) ((unsigned char *)regs)[offs ^ 3]
 
-// real one is 4*2, but we use more because we don't lockstep
-#define DMAC_FIFO_LEN (4*4)
+#define DMAC_FIFO_LEN (4*2)
 #define PWM_BUFF_LEN 1024 // in one channel samples
 
 #define SH2_DRCBLK_RAM_SHIFT 1
 #define SH2_DRCBLK_DA_SHIFT  1
 
+#define SH2_READ_SHIFT 25
 #define SH2_WRITE_SHIFT 25
 
 struct Pico32x
@@ -504,11 +515,14 @@ struct Pico32x
   unsigned char sh2irqi[2];      // individual
   unsigned int sh2irqs;          // common irqs
   unsigned short dmac_fifo[DMAC_FIFO_LEN];
-  unsigned int dmac_ptr;
-  unsigned int pwm_irq_sample_cnt;
+  unsigned int pad[4];
+  unsigned int dmac0_fifo_ptr;
+  unsigned short vdp_fbcr_fake;
+  unsigned short pad2;
   unsigned char comm_dirty_68k;
   unsigned char comm_dirty_sh2;
-  unsigned short pad;
+  unsigned char pwm_irq_cnt;
+  unsigned char pad1;
   unsigned short pwm_p[2];       // pwm pos in fifo
   unsigned int pwm_cycle_p;      // pwm play cursor (32x cycles)
   unsigned int reserved[6];
@@ -525,7 +539,6 @@ struct Pico32xMem
     unsigned char  m68k_rom[0x100];
     unsigned char  m68k_rom_bank[0x10000]; // M68K_BANK_SIZE
   };
-  unsigned char  data_array[2][0x1000]; // cache in SH2s (can be used as RAM)
 #ifdef DRC_SH2
   unsigned short drcblk_da[2][1 << (12 - SH2_DRCBLK_DA_SHIFT)];
 #endif
@@ -533,7 +546,6 @@ struct Pico32xMem
   unsigned char  sh2_rom_s[0x400];
   unsigned short pal[0x100];
   unsigned short pal_native[0x100];     // converted to native (for renderer)
-  unsigned int   sh2_peri_regs[2][0x200/4]; // periphereal regs of SH2s
   signed short   pwm[2*PWM_BUFF_LEN];   // PWM buffer for current frame
   signed short   pwm_fifo[2][4];        // [0] - current, others - fifo entries
 };
@@ -586,6 +598,7 @@ unsigned int PicoRead8_io(unsigned int a);
 unsigned int PicoRead16_io(unsigned int a);
 void PicoWrite8_io(unsigned int a, unsigned int d);
 void PicoWrite16_io(unsigned int a, unsigned int d);
+void p32x_dreq1_trigger(void);
 
 // pico/memory.c
 PICO_INTERNAL void PicoMemSetupPico(void);
@@ -632,6 +645,11 @@ PICO_INTERNAL void SekUnpackCpu(const unsigned char *cpu, int is_sub);
 void SekStepM68k(void);
 void SekInitIdleDet(void);
 void SekFinishIdleDet(void);
+#if defined(CPU_CMP_R) || defined(CPU_CMP_W)
+void SekTrace(int is_s68k);
+#else
+#define SekTrace(x)
+#endif
 
 // cd/sek.c
 PICO_INTERNAL void SekInitS68k(void);
@@ -731,6 +749,7 @@ extern struct Pico32x Pico32x;
 enum p32x_event {
   P32X_EVENT_PWM,
   P32X_EVENT_FILLEND,
+  P32X_EVENT_HINT,
   P32X_EVENT_COUNT,
 };
 extern unsigned int event_times[P32X_EVENT_COUNT];
@@ -744,10 +763,11 @@ void PicoFrame32x(void);
 void Pico32xStateLoaded(int is_early);
 void p32x_sync_sh2s(unsigned int m68k_target);
 void p32x_sync_other_sh2(SH2 *sh2, unsigned int m68k_target);
-void p32x_update_irls(SH2 *active_sh2);
+void p32x_update_irls(SH2 *active_sh2, int m68k_cycles);
 void p32x_reset_sh2s(void);
 void p32x_event_schedule(unsigned int now, enum p32x_event event, int after);
 void p32x_event_schedule_sh2(SH2 *sh2, enum p32x_event event, int after);
+void p32x_schedule_hint(SH2 *sh2, int m68k_cycles);
 
 // 32x/memory.c
 struct Pico32xMem *Pico32xMem;
@@ -776,13 +796,30 @@ enum {
 extern int Pico32xDrawMode;
 
 // 32x/pwm.c
-unsigned int p32x_pwm_read16(unsigned int a, unsigned int cycles);
-void p32x_pwm_write16(unsigned int a, unsigned int d, unsigned int cycles);
+unsigned int p32x_pwm_read16(unsigned int a, SH2 *sh2,
+  unsigned int m68k_cycles);
+void p32x_pwm_write16(unsigned int a, unsigned int d,
+  SH2 *sh2, unsigned int m68k_cycles);
 void p32x_pwm_update(int *buf32, int length, int stereo);
-void p32x_timers_do(unsigned int m68k_now, unsigned int m68k_slice);
-void p32x_timers_recalc(void);
-void p32x_pwm_schedule(unsigned int now);
+void p32x_pwm_ctl_changed(void);
+void p32x_pwm_schedule(unsigned int m68k_now);
 void p32x_pwm_schedule_sh2(SH2 *sh2);
+void p32x_pwm_irq_event(unsigned int m68k_now);
+void p32x_pwm_state_loaded(void);
+
+// 32x/sh2soc.c
+void p32x_dreq0_trigger(void);
+void p32x_dreq1_trigger(void);
+void p32x_timers_recalc(void);
+void p32x_timers_do(unsigned int m68k_slice);
+void sh2_peripheral_reset(SH2 *sh2);
+unsigned int sh2_peripheral_read8(unsigned int a, SH2 *sh2);
+unsigned int sh2_peripheral_read16(unsigned int a, SH2 *sh2);
+unsigned int sh2_peripheral_read32(unsigned int a, SH2 *sh2);
+void sh2_peripheral_write8(unsigned int a, unsigned int d, SH2 *sh2);
+void sh2_peripheral_write16(unsigned int a, unsigned int d, SH2 *sh2);
+void sh2_peripheral_write32(unsigned int a, unsigned int d, SH2 *sh2);
+
 #else
 #define Pico32xInit()
 #define PicoPower32x()
@@ -835,6 +872,7 @@ static __inline int isspace_(int c)
 #define EL_CDREG3  0x00040000 /* MCD: register 3 only */
 #define EL_32X     0x00080000
 #define EL_PWM     0x00100000 /* 32X PWM stuff (LOTS of output) */
+#define EL_32XP    0x00200000 /* 32X peripherals */
 
 #define EL_STATUS  0x40000000 /* status messages */
 #define EL_ANOMALY 0x80000000 /* some unexpected conditions (during emulation) */