X-Git-Url: https://notaz.gp2x.de/cgi-bin/gitweb.cgi?a=blobdiff_plain;f=pico%2Fpico_int.h;h=bba13c95059e87d379f6bb140d86602392c88b0e;hb=f8675e282e7aa72bc6ab0edbb1dada4395d1c44c;hp=f5b4cd4733399d02334e786a8ea7c89971b99d30;hpb=ed4402a7dfd12dbbf34c547b438a671ae8114197;p=picodrive.git diff --git a/pico/pico_int.h b/pico/pico_int.h index f5b4cd4..bba13c9 100644 --- a/pico/pico_int.h +++ b/pico/pico_int.h @@ -46,8 +46,10 @@ extern struct Cyclone PicoCpuCM68k, PicoCpuCS68k; #define SekEndTimesliceS68k(after) PicoCpuCS68k.cycles=after #define SekPc (PicoCpuCM68k.pc-PicoCpuCM68k.membase) #define SekPcS68k (PicoCpuCS68k.pc-PicoCpuCS68k.membase) -#define SekDar(x) (x < 8 ? PicoCpuCM68k.d[x] : PicoCpuCM68k.a[x - 8]) +#define SekDar(x) (x < 8 ? PicoCpuCM68k.d[x] : PicoCpuCM68k.a[x - 8]) +#define SekDarS68k(x) (x < 8 ? PicoCpuCS68k.d[x] : PicoCpuCS68k.a[x - 8]) #define SekSr CycloneGetSr(&PicoCpuCM68k) +#define SekSrS68k CycloneGetSr(&PicoCpuCS68k) #define SekSetStop(x) { PicoCpuCM68k.state_flags&=~1; if (x) { PicoCpuCM68k.state_flags|=1; PicoCpuCM68k.cycles=0; } } #define SekSetStopS68k(x) { PicoCpuCS68k.state_flags&=~1; if (x) { PicoCpuCS68k.state_flags|=1; PicoCpuCS68k.cycles=0; } } #define SekIsStoppedM68k() (PicoCpuCM68k.state_flags&1) @@ -74,8 +76,10 @@ extern M68K_CONTEXT PicoCpuFM68k, PicoCpuFS68k; #define SekEndTimesliceS68k(after) PicoCpuFS68k.io_cycle_counter=after #define SekPc fm68k_get_pc(&PicoCpuFM68k) #define SekPcS68k fm68k_get_pc(&PicoCpuFS68k) -#define SekDar(x) (x < 8 ? PicoCpuFM68k.dreg[x].D : PicoCpuFM68k.areg[x - 8].D) +#define SekDar(x) (x < 8 ? PicoCpuFM68k.dreg[x].D : PicoCpuFM68k.areg[x - 8].D) +#define SekDarS68k(x) (x < 8 ? PicoCpuFS68k.dreg[x].D : PicoCpuFS68k.areg[x - 8].D) #define SekSr PicoCpuFM68k.sr +#define SekSrS68k PicoCpuFS68k.sr #define SekSetStop(x) { \ PicoCpuFM68k.execinfo &= ~FM68K_HALTED; \ if (x) { PicoCpuFM68k.execinfo |= FM68K_HALTED; PicoCpuFM68k.io_cycle_counter = 0; } \ @@ -109,8 +113,10 @@ extern m68ki_cpu_core PicoCpuMM68k, PicoCpuMS68k; #define SekEndTimesliceS68k(after) PicoCpuMS68k.cyc_remaining_cycles=after #define SekPc m68k_get_reg(&PicoCpuMM68k, M68K_REG_PC) #define SekPcS68k m68k_get_reg(&PicoCpuMS68k, M68K_REG_PC) -#define SekDar(x) PicoCpuMM68k.dar[x] -#define SekSr m68k_get_reg(&PicoCpuMM68k, M68K_REG_SR) +#define SekDar(x) PicoCpuMM68k.dar[x] +#define SekDarS68k(x) PicoCpuMS68k.dar[x] +#define SekSr m68k_get_reg(&PicoCpuMM68k, M68K_REG_SR) +#define SekSrS68k m68k_get_reg(&PicoCpuMS68k, M68K_REG_SR) #define SekSetStop(x) { \ if(x) { SET_CYCLES(0); PicoCpuMM68k.stopped=STOP_LEVEL_STOP; } \ else PicoCpuMM68k.stopped=0; \ @@ -146,6 +152,7 @@ extern unsigned int SekCycleCntT; // total cycle counter, updated once per frame #define SekCyclesBurn(c) SekCycleCnt+=c #define SekCyclesDone() (SekCycleAim-SekCyclesLeft) // number of cycles done in this frame (can be checked anywhere) #define SekCyclesDoneT() (SekCycleCntT+SekCyclesDone()) // total nuber of cycles done for this rom +#define SekCyclesDoneT2() (SekCycleCntT + SekCycleCnt) // same as above but not from memhandlers #define SekEndRun(after) { \ SekCycleCnt -= SekCyclesLeft - (after); \ @@ -237,18 +244,35 @@ extern SH2 sh2s[2]; #define ssh2 sh2s[1] #ifndef DRC_SH2 -# define ash2_end_run(after) if (sh2->icount > (after)) sh2->icount = after -# define ash2_cycles_done() (sh2->cycles_timeslice - sh2->icount) +# define sh2_end_run(sh2, after_) do { \ + if ((sh2)->icount > (after_)) { \ + (sh2)->cycles_timeslice -= (sh2)->icount - (after_); \ + (sh2)->icount = after_; \ + } \ +} while (0) +# define sh2_cycles_left(sh2) (sh2)->icount +# define sh2_burn_cycles(sh2, n) (sh2)->icount -= n +# define sh2_pc(sh2) (sh2)->ppc #else -# define ash2_end_run(after) { \ - if ((sh2->sr >> 12) > (after)) \ - { sh2->sr &= 0xfff; sh2->sr |= (after) << 12; } \ -} -# define ash2_cycles_done() (sh2->cycles_timeslice - (sh2->sr >> 12)) +# define sh2_end_run(sh2, after_) do { \ + int left_ = (signed int)(sh2)->sr >> 12; \ + if (left_ > (after_)) { \ + (sh2)->cycles_timeslice -= left_ - (after_); \ + (sh2)->sr &= 0xfff; \ + (sh2)->sr |= (after_) << 12; \ + } \ +} while (0) +# define sh2_cycles_left(sh2) ((signed int)(sh2)->sr >> 12) +# define sh2_burn_cycles(sh2, n) (sh2)->sr -= ((n) << 12) +# define sh2_pc(sh2) (sh2)->pc #endif -//#define sh2_pc(c) (c) ? ssh2.ppc : msh2.ppc -#define sh2_pc(c) (c) ? ssh2.pc : msh2.pc +#define sh2_cycles_done(sh2) ((int)(sh2)->cycles_timeslice - sh2_cycles_left(sh2)) +#define sh2_cycles_done_t(sh2) \ + ((sh2)->m68krcycles_done * 3 + sh2_cycles_done(sh2)) +#define sh2_cycles_done_m68k(sh2) \ + ((sh2)->m68krcycles_done + (sh2_cycles_done(sh2) / 3)) + #define sh2_reg(c, x) (c) ? ssh2.r[x] : msh2.r[x] #define sh2_gbr(c) (c) ? ssh2.gbr : msh2.gbr #define sh2_vbr(c) (c) ? ssh2.vbr : msh2.vbr @@ -259,6 +283,9 @@ extern SH2 sh2s[2]; #define sh2_set_vbr(c, v) \ { if (c) ssh2.vbr = v; else msh2.vbr = v; } +#define elprintf_sh2(sh2, w, f, ...) \ + elprintf(w,"%csh2 "f,(sh2)->is_slave?'s':'m',##__VA_ARGS__) + // --------------------------------------------------------- // main oscillator clock which controls timing @@ -451,15 +478,12 @@ typedef struct #define P32XV_nFEN (1<< 1) #define P32XV_FS (1<< 0) -#define P32XP_FULL (1<<15) // PWM +#define P32XP_RTP (1<<7) // PWM control +#define P32XP_FULL (1<<15) // PWM pulse #define P32XP_EMPTY (1<<14) -#define P32XF_68KPOLL (1 << 0) -#define P32XF_MSH2POLL (1 << 1) -#define P32XF_SSH2POLL (1 << 2) -#define P32XF_68KVPOLL (1 << 3) -#define P32XF_MSH2VPOLL (1 << 4) -#define P32XF_SSH2VPOLL (1 << 5) +#define P32XF_68KCPOLL (1 << 0) +#define P32XF_68KVPOLL (1 << 1) #define P32XI_VRES (1 << 14/2) // IRL/2 #define P32XI_VINT (1 << 12/2) @@ -470,13 +494,13 @@ typedef struct // peripheral reg access #define PREG8(regs,offs) ((unsigned char *)regs)[offs ^ 3] -// real one is 4*2, but we use more because we don't lockstep -#define DMAC_FIFO_LEN (4*4) +#define DMAC_FIFO_LEN (4*2) #define PWM_BUFF_LEN 1024 // in one channel samples #define SH2_DRCBLK_RAM_SHIFT 1 #define SH2_DRCBLK_DA_SHIFT 1 +#define SH2_READ_SHIFT 25 #define SH2_WRITE_SHIFT 25 struct Pico32x @@ -491,9 +515,17 @@ struct Pico32x unsigned char sh2irqi[2]; // individual unsigned int sh2irqs; // common irqs unsigned short dmac_fifo[DMAC_FIFO_LEN]; - unsigned int dmac_ptr; - unsigned int pwm_irq_sample_cnt; - unsigned int reserved[9]; + unsigned int pad[4]; + unsigned int dmac0_fifo_ptr; + unsigned short vdp_fbcr_fake; + unsigned short pad2; + unsigned char comm_dirty_68k; + unsigned char comm_dirty_sh2; + unsigned char pwm_irq_cnt; + unsigned char pad1; + unsigned short pwm_p[2]; // pwm pos in fifo + unsigned int pwm_cycle_p; // pwm play cursor (32x cycles) + unsigned int reserved[6]; }; struct Pico32xMem @@ -507,7 +539,6 @@ struct Pico32xMem unsigned char m68k_rom[0x100]; unsigned char m68k_rom_bank[0x10000]; // M68K_BANK_SIZE }; - unsigned char data_array[2][0x1000]; // cache in SH2s (can be used as RAM) #ifdef DRC_SH2 unsigned short drcblk_da[2][1 << (12 - SH2_DRCBLK_DA_SHIFT)]; #endif @@ -515,8 +546,8 @@ struct Pico32xMem unsigned char sh2_rom_s[0x400]; unsigned short pal[0x100]; unsigned short pal_native[0x100]; // converted to native (for renderer) - unsigned int sh2_peri_regs[2][0x200/4]; // periphereal regs of SH2s signed short pwm[2*PWM_BUFF_LEN]; // PWM buffer for current frame + signed short pwm_fifo[2][4]; // [0] - current, others - fifo entries }; // area.c @@ -567,6 +598,7 @@ unsigned int PicoRead8_io(unsigned int a); unsigned int PicoRead16_io(unsigned int a); void PicoWrite8_io(unsigned int a, unsigned int d); void PicoWrite16_io(unsigned int a, unsigned int d); +void p32x_dreq1_trigger(void); // pico/memory.c PICO_INTERNAL void PicoMemSetupPico(void); @@ -613,6 +645,11 @@ PICO_INTERNAL void SekUnpackCpu(const unsigned char *cpu, int is_sub); void SekStepM68k(void); void SekInitIdleDet(void); void SekFinishIdleDet(void); +#if defined(CPU_CMP_R) || defined(CPU_CMP_W) +void SekTrace(int is_s68k); +#else +#define SekTrace(x) +#endif // cd/sek.c PICO_INTERNAL void SekInitS68k(void); @@ -709,15 +746,26 @@ void PicoFrameDrawOnlyMS(void); // 32x/32x.c #ifndef NO_32X extern struct Pico32x Pico32x; +enum p32x_event { + P32X_EVENT_PWM, + P32X_EVENT_FILLEND, + P32X_EVENT_COUNT, +}; +extern unsigned int event_times[P32X_EVENT_COUNT]; + void Pico32xInit(void); void PicoPower32x(void); void PicoReset32x(void); void Pico32xStartup(void); void PicoUnload32x(void); void PicoFrame32x(void); +void Pico32xStateLoaded(int is_early); void p32x_sync_sh2s(unsigned int m68k_target); -void p32x_update_irls(int nested_call); +void p32x_sync_other_sh2(SH2 *sh2, unsigned int m68k_target); +void p32x_update_irls(SH2 *active_sh2, int m68k_cycles); void p32x_reset_sh2s(void); +void p32x_event_schedule(unsigned int now, enum p32x_event event, int after); +void p32x_event_schedule_sh2(SH2 *sh2, enum p32x_event event, int after); // 32x/memory.c struct Pico32xMem *Pico32xMem; @@ -727,10 +775,12 @@ void PicoWrite8_32x(unsigned int a, unsigned int d); void PicoWrite16_32x(unsigned int a, unsigned int d); void PicoMemSetup32x(void); void Pico32xSwapDRAM(int b); -void Pico32xStateLoaded(void); -void p32x_poll_event(int cpu_mask, int is_vdp); +void Pico32xMemStateLoaded(void); +void p32x_m68k_poll_event(unsigned int flags); +void p32x_sh2_poll_event(SH2 *sh2, unsigned int flags, unsigned int m68k_cycles); // 32x/draw.c +void PicoDrawSetOutFormat32x(pdso_t which, int use_32x_line_mode); void FinalizeLine32xRGB555(int sh, int line); void PicoDraw32xLayer(int offs, int lines, int mdbg); void PicoDraw32xLayerMdOnly(int offs, int lines); @@ -744,12 +794,30 @@ enum { extern int Pico32xDrawMode; // 32x/pwm.c -unsigned int p32x_pwm_read16(unsigned int a); -void p32x_pwm_write16(unsigned int a, unsigned int d); +unsigned int p32x_pwm_read16(unsigned int a, SH2 *sh2, + unsigned int m68k_cycles); +void p32x_pwm_write16(unsigned int a, unsigned int d, + SH2 *sh2, unsigned int m68k_cycles); void p32x_pwm_update(int *buf32, int length, int stereo); -void p32x_timers_do(int line_call); +void p32x_pwm_ctl_changed(void); +void p32x_pwm_schedule(unsigned int m68k_now); +void p32x_pwm_schedule_sh2(SH2 *sh2); +void p32x_pwm_irq_event(unsigned int m68k_now); +void p32x_pwm_state_loaded(void); + +// 32x/sh2soc.c +void p32x_dreq0_trigger(void); +void p32x_dreq1_trigger(void); void p32x_timers_recalc(void); -extern int pwm_frame_smp_cnt; +void p32x_timers_do(unsigned int m68k_slice); +void sh2_peripheral_reset(SH2 *sh2); +unsigned int sh2_peripheral_read8(unsigned int a, SH2 *sh2); +unsigned int sh2_peripheral_read16(unsigned int a, SH2 *sh2); +unsigned int sh2_peripheral_read32(unsigned int a, SH2 *sh2); +void sh2_peripheral_write8(unsigned int a, unsigned int d, SH2 *sh2); +void sh2_peripheral_write16(unsigned int a, unsigned int d, SH2 *sh2); +void sh2_peripheral_write32(unsigned int a, unsigned int d, SH2 *sh2); + #else #define Pico32xInit() #define PicoPower32x() @@ -757,7 +825,6 @@ extern int pwm_frame_smp_cnt; #define PicoFrame32x() #define PicoUnload32x() #define Pico32xStateLoaded() -#define PicoDraw32xSetFrameMode(...) #define FinalizeLine32xRGB555 NULL #define p32x_pwm_update(...) #define p32x_timers_recalc() @@ -775,7 +842,11 @@ static __inline int isspace_(int c) // emulation event logging #ifndef EL_LOGMASK -#define EL_LOGMASK 0 +# ifdef __x86_64__ // HACK +# define EL_LOGMASK (EL_STATUS|EL_IDLE|EL_ANOMALY) +# else +# define EL_LOGMASK (EL_STATUS) +# endif #endif #define EL_HVCNT 0x00000001 /* hv counter reads */ @@ -799,16 +870,17 @@ static __inline int isspace_(int c) #define EL_CDREG3 0x00040000 /* MCD: register 3 only */ #define EL_32X 0x00080000 #define EL_PWM 0x00100000 /* 32X PWM stuff (LOTS of output) */ +#define EL_32XP 0x00200000 /* 32X peripherals */ #define EL_STATUS 0x40000000 /* status messages */ #define EL_ANOMALY 0x80000000 /* some unexpected conditions (during emulation) */ #if EL_LOGMASK #define elprintf(w,f,...) \ -{ \ +do { \ if ((w) & EL_LOGMASK) \ lprintf("%05i:%03i: " f "\n",Pico.m.frame_count,Pico.m.scanline,##__VA_ARGS__); \ -} +} while (0) #elif defined(_MSC_VER) #define elprintf #else @@ -826,6 +898,45 @@ static __inline int isspace_(int c) #define pprof_end_sub(...) #endif +#ifdef EVT_LOG +enum evt { + EVT_FRAME_START, + EVT_NEXT_LINE, + EVT_RUN_START, + EVT_RUN_END, + EVT_POLL_START, + EVT_POLL_END, + EVT_CNT +}; + +enum evt_cpu { + EVT_M68K, + EVT_S68K, + EVT_MSH2, + EVT_SSH2, + EVT_CPU_CNT +}; + +void pevt_log(unsigned int cycles, enum evt_cpu c, enum evt e); +void pevt_dump(void); + +#define pevt_log_m68k(e) \ + pevt_log(SekCyclesDoneT(), EVT_M68K, e) +#define pevt_log_m68k_o(e) \ + pevt_log(SekCyclesDoneT2(), EVT_M68K, e) +#define pevt_log_sh2(sh2, e) \ + pevt_log(sh2_cycles_done_m68k(sh2), EVT_MSH2 + (sh2)->is_slave, e) +#define pevt_log_sh2_o(sh2, e) \ + pevt_log((sh2)->m68krcycles_done, EVT_MSH2 + (sh2)->is_slave, e) +#else +#define pevt_log(c, e) +#define pevt_log_m68k(e) +#define pevt_log_m68k_o(e) +#define pevt_log_sh2(sh2, e) +#define pevt_log_sh2_o(sh2, e) +#define pevt_dump() +#endif + // misc #ifdef _MSC_VER #define cdprintf