X-Git-Url: https://notaz.gp2x.de/cgi-bin/gitweb.cgi?a=blobdiff_plain;f=pico%2Fpico_int.h;h=ccc1a9bfa0ac1fc3a36827049d61f900f83ea56d;hb=8e4e84c2150047dcbe3799083cdfa2a7d5cf9d7b;hp=1acc1b08f5c0fe5b9a000671e70befab5013f9ed;hpb=835122bc0c583a74707847f350349e6050b42bb5;p=picodrive.git

diff --git a/pico/pico_int.h b/pico/pico_int.h
index 1acc1b0..ccc1a9b 100644
--- a/pico/pico_int.h
+++ b/pico/pico_int.h
@@ -51,6 +51,9 @@ extern struct Cyclone PicoCpuCM68k, PicoCpuCS68k;
 #define SekIsStoppedS68k() (PicoCpuCS68k.state_flags&1)
 #define SekShouldInterrupt() (PicoCpuCM68k.irq > (PicoCpuCM68k.srh&7))
 
+#define SekNotPolling     PicoCpuCM68k.not_pol
+#define SekNotPollingS68k PicoCpuCS68k.not_pol
+
 #define SekInterrupt(i) PicoCpuCM68k.irq=i
 #define SekIrqLevel     PicoCpuCM68k.irq
 
@@ -79,6 +82,9 @@ extern M68K_CONTEXT PicoCpuFM68k, PicoCpuFS68k;
 #define SekIsStoppedS68k() (PicoCpuFS68k.execinfo&FM68K_HALTED)
 #define SekShouldInterrupt() fm68k_would_interrupt()
 
+#define SekNotPolling     PicoCpuFM68k.not_polling
+#define SekNotPollingS68k PicoCpuFS68k.not_polling
+
 #define SekInterrupt(irq) PicoCpuFM68k.interrupts[0]=irq
 #define SekIrqLevel       PicoCpuFM68k.interrupts[0]
 
@@ -108,6 +114,9 @@ extern m68ki_cpu_core PicoCpuMM68k, PicoCpuMS68k;
 #define SekIsStoppedS68k() (PicoCpuMS68k.stopped==STOP_LEVEL_STOP)
 #define SekShouldInterrupt() (CPU_INT_LEVEL > FLAG_INT_MASK)
 
+#define SekNotPolling     PicoCpuMM68k.not_polling
+#define SekNotPollingS68k PicoCpuMS68k.not_polling
+
 #define SekInterrupt(irq) { \
 	void *oldcontext = m68ki_cpu_p; \
 	m68k_set_context(&PicoCpuMM68k); \
@@ -134,8 +143,6 @@ extern unsigned int SekCycleAim;
 #define SekCyclesBurn(c)    SekCycleCnt += c
 #define SekCyclesBurnRun(c) { \
   SekCyclesLeft -= c; \
-  if (SekCyclesLeft < 0) \
-    SekCyclesLeft = 0; \
 }
 
 // note: sometimes may extend timeslice to delay an irq
@@ -300,7 +307,7 @@ struct PicoMisc
   unsigned char sram_reg;      // 09 SRAM reg. See SRR_* below
   unsigned short z80_bank68k;  // 0a
   unsigned short pad0;
-  unsigned char  pad1;
+  unsigned char  ncart_in;     // 0e !cart_in
   unsigned char  z80_reset;    // 0f z80 reset held
   unsigned char  padDelay[2];  // 10 gamepad phase time outs, so we count a delay
   unsigned short eeprom_addr;  // EEPROM address register
@@ -371,13 +378,15 @@ struct PicoSRAM
 #include "cd/LC89510.h"
 #include "cd/gfx_cd.h"
 
+#define PCM_MIXBUF_LEN ((12500000 / 384) / 50 + 1)
+
 struct mcd_pcm
 {
 	unsigned char control; // reg7
 	unsigned char enabled; // reg8
 	unsigned char cur_ch;
 	unsigned char bank;
-	int pad1;
+	unsigned int update_cycles;
 
 	struct pcm_chan			// 08, size 0x10
 	{
@@ -438,6 +447,9 @@ typedef struct
 	CDC  cdc;
 	_scd scd;
 	Rot_Comp rot_comp;
+	int pcm_mixbuf[PCM_MIXBUF_LEN * 2];
+	int pcm_mixpos;
+	int pcm_mixbuf_dirty;
 } mcd_state;
 
 // XXX: this will need to be reworked for cart+cd support.
@@ -445,6 +457,7 @@ typedef struct
 
 // 32X
 #define P32XS_FM    (1<<15)
+#define P32XS_nCART (1<< 8)
 #define P32XS_REN   (1<< 7)
 #define P32XS_nRES  (1<< 1)
 #define P32XS_ADEN  (1<< 0)
@@ -600,6 +613,10 @@ PICO_INTERNAL void PicoMemSetupPico(void);
 
 // cd/memory.c
 PICO_INTERNAL void PicoMemSetupCD(void);
+unsigned int PicoRead8_mcd_io(unsigned int a);
+unsigned int PicoRead16_mcd_io(unsigned int a);
+void PicoWrite8_mcd_io(unsigned int a, unsigned int d);
+void PicoWrite16_mcd_io(unsigned int a, unsigned int d);
 void pcd_state_loaded_mem(void);
 
 // pico.c
@@ -640,8 +657,16 @@ void pcd_event_schedule(unsigned int now, enum pcd_event event, int after);
 void pcd_event_schedule_s68k(enum pcd_event event, int after);
 unsigned int pcd_cycles_m68k_to_s68k(unsigned int c);
 int  pcd_sync_s68k(unsigned int m68k_target, int m68k_poll_sync);
+void pcd_run_cpus(int m68k_cycles);
+void pcd_soft_reset(void);
 void pcd_state_loaded(void);
 
+// cd/pcm.c
+void pcd_pcm_sync(unsigned int to);
+void pcd_pcm_update(int *buffer, int length, int stereo);
+void pcd_pcm_write(unsigned int a, unsigned int d);
+unsigned int pcd_pcm_read(unsigned int a);
+
 // pico/pico.c
 PICO_INTERNAL void PicoInitPico(void);
 PICO_INTERNAL void PicoReratePico(void);
@@ -704,6 +729,7 @@ void ym2612_unpack_state(void);
 
 
 // videoport.c
+extern int line_base_cycles;
 PICO_INTERNAL_ASM void PicoVideoWrite(unsigned int a,unsigned short d);
 PICO_INTERNAL_ASM unsigned int PicoVideoRead(unsigned int a);
 PICO_INTERNAL_ASM unsigned int PicoVideoRead8(unsigned int a);
@@ -835,9 +861,9 @@ void sh2_peripheral_reset(SH2 *sh2);
 unsigned int sh2_peripheral_read8(unsigned int a, SH2 *sh2);
 unsigned int sh2_peripheral_read16(unsigned int a, SH2 *sh2);
 unsigned int sh2_peripheral_read32(unsigned int a, SH2 *sh2);
-void sh2_peripheral_write8(unsigned int a, unsigned int d, SH2 *sh2);
-void sh2_peripheral_write16(unsigned int a, unsigned int d, SH2 *sh2);
-void sh2_peripheral_write32(unsigned int a, unsigned int d, SH2 *sh2);
+void REGPARM(3) sh2_peripheral_write8(unsigned int a, unsigned int d, SH2 *sh2);
+void REGPARM(3) sh2_peripheral_write16(unsigned int a, unsigned int d, SH2 *sh2);
+void REGPARM(3) sh2_peripheral_write32(unsigned int a, unsigned int d, SH2 *sh2);
 
 #else
 #define Pico32xInit()
@@ -966,7 +992,7 @@ void pevt_dump(void);
 #define cdprintf(x...)
 #endif
 
-#ifdef __i386__
+#if defined(__GNUC__) && defined(__i386__)
 #define REGPARM(x) __attribute__((regparm(x)))
 #else
 #define REGPARM(x)