X-Git-Url: https://notaz.gp2x.de/cgi-bin/gitweb.cgi?a=blobdiff_plain;f=pico%2Fpico_int.h;h=ce6b499dae6dc5213b7f7b5602b8acfba233a2ae;hb=c987bb5c36d92c1441e4dcfd9bded3e5dc1f1ff6;hp=431c9a627667366f3de96d3ec760000e940fb324;hpb=974fdb5bfda8ed006661031e22c920828ddb60dc;p=picodrive.git

diff --git a/pico/pico_int.h b/pico/pico_int.h
index 431c9a6..ce6b499 100644
--- a/pico/pico_int.h
+++ b/pico/pico_int.h
@@ -1,7 +1,7 @@
 // Pico Library - Internal Header File
 
 // (c) Copyright 2004 Dave, All rights reserved.
-// (c) Copyright 2006-2008 Grazvydas "notaz" Ignotas, all rights reserved.
+// (c) Copyright 2006-2009 Grazvydas "notaz" Ignotas, all rights reserved.
 // Free for non-commercial use.
 
 // For commercial use, separate licencing terms must be obtained.
@@ -226,6 +226,20 @@ extern unsigned long z80_write_map[0x10000 >> Z80_MEM_SHIFT];
 typedef unsigned char (z80_read_f)(unsigned short a);
 typedef void (z80_write_f)(unsigned int a, unsigned char data);
 
+// ----------------------- SH2 CPU -----------------------
+
+#include "cpu/sh2mame/sh2.h"
+
+SH2 msh2, ssh2;
+#define ash2_end_run(after) sh2_icount = after
+#define ash2_cycles_done() (sh2->cycles_aim - sh2_icount)
+
+#define sh2_pc(c)     (c) ? ssh2.ppc : msh2.ppc
+#define sh2_reg(c, x) (c) ? ssh2.r[x] : msh2.r[x]
+#define sh2_gbr(c)    (c) ? ssh2.gbr : msh2.gbr
+#define sh2_vbr(c)    (c) ? ssh2.vbr : msh2.vbr
+#define sh2_sr(c)     (c) ? ssh2.sr : msh2.sr
+
 // ---------------------------------------------------------
 
 // main oscillator clock which controls timing
@@ -259,7 +273,7 @@ struct PicoMisc
   unsigned short z80_bank68k;  // 0a
   unsigned short pad0;
   unsigned char  pad1;
-  unsigned char  z80_reset;    // z80 reset held
+  unsigned char  z80_reset;    // 0f z80 reset held
   unsigned char  padDelay[2];  // 10 gamepad phase time outs, so we count a delay
   unsigned short eeprom_addr;  // EEPROM address register
   unsigned char  eeprom_cycle; // EEPROM cycle number
@@ -389,32 +403,71 @@ typedef struct
 #define Pico_mcd ((mcd_state *)Pico.rom)
 
 // 32X
-#define P32XV_nPAL (1<<15)
-#define P32XV_PRI  (1<< 7)
-#define P32XV_Mx   (3<< 0)
-
-#define P32XV_VBLK (1<<15)
-#define P32XV_HBLK (1<<14)
-#define P32XV_PEN  (1<<13)
-#define P32XV_nFEN (1<< 1)
-#define P32XV_FS   (1<< 0)
+#define P32XS_FM    (1<<15)
+#define P32XS2_ADEN (1<< 9)
+#define P32XS_FULL  (1<< 7) // DREQ FIFO full
+#define P32XS_68S   (1<< 2)
+#define P32XS_DMA   (1<< 1)
+#define P32XS_RV    (1<< 0)
+
+#define P32XV_nPAL  (1<<15) // VDP
+#define P32XV_PRI   (1<< 7)
+#define P32XV_Mx    (3<< 0) // display mode mask
+
+#define P32XV_VBLK  (1<<15)
+#define P32XV_HBLK  (1<<14)
+#define P32XV_PEN   (1<<13)
+#define P32XV_nFEN  (1<< 1)
+#define P32XV_FS    (1<< 0)
+
+#define P32XP_FULL  (1<<15) // PWM
+#define P32XP_EMPTY (1<<14)
+
+#define P32XF_68KPOLL   (1 << 0)
+#define P32XF_MSH2POLL  (1 << 1)
+#define P32XF_SSH2POLL  (1 << 2)
+#define P32XF_68KVPOLL  (1 << 3)
+#define P32XF_MSH2VPOLL (1 << 4)
+#define P32XF_SSH2VPOLL (1 << 5)
+
+#define P32XI_VRES (1 << 14/2) // IRL/2
+#define P32XI_VINT (1 << 12/2)
+#define P32XI_HINT (1 << 10/2)
+#define P32XI_CMD  (1 <<  8/2)
+#define P32XI_PWM  (1 <<  6/2)
+
+// real one is 4*2, but we use more because we don't lockstep
+#define DMAC_FIFO_LEN (4*4)
+#define PWM_BUFF_LEN 1024 // in one channel samples
 
 struct Pico32x
 {
   unsigned short regs[0x20];
   unsigned short vdp_regs[0x10];
+  unsigned short sh2_regs[3];
   unsigned char pending_fb;
   unsigned char dirty_pal;
-  unsigned char pad[2];
+  unsigned int emu_flags;
+  unsigned char sh2irq_mask[2];
+  unsigned char sh2irqi[2];      // individual
+  unsigned int sh2irqs;          // common irqs
+  unsigned short dmac_fifo[DMAC_FIFO_LEN];
+  unsigned int dmac_ptr;
+  unsigned int pwm_irq_sample_cnt;
 };
 
 struct Pico32xMem
 {
   unsigned char  sdram[0x40000];
-  unsigned short dram[2][0x20000/2]; // AKA fb
-  unsigned char  m68k_rom[0x10000]; // 0x100; using M68K_BANK_SIZE
+  unsigned short dram[2][0x20000/2];    // AKA fb
+  unsigned char  m68k_rom[0x10000];     // 0x100; using M68K_BANK_SIZE
+  unsigned char  data_array[2][0x1000]; // cache in SH2s (can be used as RAM)
+  unsigned char  sh2_rom_m[0x800];
+  unsigned char  sh2_rom_s[0x400];
   unsigned short pal[0x100];
-  unsigned short pal_native[0x100]; // converted to native (for renderer)
+  unsigned short pal_native[0x100];     // converted to native (for renderer)
+  unsigned int   sh2_peri_regs[2][0x200/4]; // periphereal regs of SH2s
+  signed short   pwm[2*PWM_BUFF_LEN];   // PWM buffer for current frame
 };
 
 // area.c
@@ -471,8 +524,6 @@ void PicoDoHighPal555M4(void);
 void PicoDrawSetColorFormatMode4(int which);
 
 // memory.c
-PICO_INTERNAL void PicoInitPc(unsigned int pc);
-PICO_INTERNAL unsigned int PicoCheckPc(unsigned int pc);
 PICO_INTERNAL void PicoMemSetup(void);
 unsigned int PicoRead8_io(unsigned int a);
 unsigned int PicoRead16_io(unsigned int a);
@@ -484,14 +535,14 @@ PICO_INTERNAL void PicoMemSetupPico(void);
 
 // cd/memory.c
 PICO_INTERNAL void PicoMemSetupCD(void);
-PICO_INTERNAL_ASM void PicoMemRemapCD(int r3);
-PICO_INTERNAL_ASM void PicoMemResetCDdecode(int r3);
+void PicoMemStateLoaded(void);
 
 // pico.c
 extern struct Pico Pico;
 extern struct PicoSRAM SRam;
 extern int PicoPadInt[2];
 extern int emustatus;
+extern int scanlines_total;
 extern void (*PicoResetHook)(void);
 extern void (*PicoLineHook)(void);
 PICO_INTERNAL int  CheckDMA(void);
@@ -611,7 +662,9 @@ void Pico32xInit(void);
 void PicoPower32x(void);
 void PicoReset32x(void);
 void Pico32xStartup(void);
+void PicoUnload32x(void);
 void PicoFrame32x(void);
+void p32x_update_irls(void);
 
 // 32x/memory.c
 struct Pico32xMem *Pico32xMem;
@@ -621,10 +674,19 @@ void PicoWrite8_32x(unsigned int a, unsigned int d);
 void PicoWrite16_32x(unsigned int a, unsigned int d);
 void PicoMemSetup32x(void);
 void Pico32xSwapDRAM(int b);
+void p32x_poll_event(int cpu_mask, int is_vdp);
 
 // 32x/draw.c
 void FinalizeLine32xRGB555(int sh, int line);
 
+// 32x/pwm.c
+unsigned int p32x_pwm_read16(unsigned int a);
+void p32x_pwm_write16(unsigned int a, unsigned int d);
+void p32x_pwm_refresh(void);
+void p32x_pwm_irq_check(int new_line);
+void p32x_pwm_update(int *buf32, int length, int stereo);
+extern int pwm_frame_smp_cnt;
+
 /* avoid dependency on newer glibc */
 static __inline int isspace_(int c)
 {
@@ -656,6 +718,7 @@ static __inline int isspace_(int c)
 #define EL_CDREGS  0x00020000 /* MCD: register access */
 #define EL_CDREG3  0x00040000 /* MCD: register 3 only */
 #define EL_32X     0x00080000
+#define EL_PWM     0x00100000 /* 32X PWM stuff (LOTS of output) */
 
 #define EL_STATUS  0x40000000 /* status messages */
 #define EL_ANOMALY 0x80000000 /* some unexpected conditions (during emulation) */
@@ -685,6 +748,12 @@ extern void lprintf(const char *fmt, ...);
 #define MEMH_FUNC
 #endif
 
+#ifdef __GNUC__
+#define NOINLINE __attribute__((noinline))
+#else
+#define NOINLINE
+#endif
+
 #ifdef __cplusplus
 } // End of extern "C"
 #endif