X-Git-Url: https://notaz.gp2x.de/cgi-bin/gitweb.cgi?a=blobdiff_plain;f=platform%2Fuiq3%2Fengine%2Fblit.s;h=f10a3cc8daee522a4da6002ac3b871f644460daa;hb=3823d229a553afd2353946e09323a9bcbf1256ed;hp=c377a761e13b6ef1ea71bdbdc8de2c393bcd4931;hpb=146cd4bf30825882cdc37abbe10ec1749558dd59;p=picodrive.git diff --git a/platform/uiq3/engine/blit.s b/platform/uiq3/engine/blit.s index c377a76..f10a3cc 100644 --- a/platform/uiq3/engine/blit.s +++ b/platform/uiq3/engine/blit.s @@ -4,6 +4,8 @@ @ (c) Copyright 2006, notaz @ All Rights Reserved +.include "port_config.s" + @ Convert 0000bbb0 ggg0rrr0 0000bbb0 ggg0rrr0 @ to 00000000 rrr00000 ggg00000 bbb00000 ... @@ -342,13 +344,13 @@ vidConvCpy_90: mov r6, #0 stmia r0!, {r3-r6} stmia r0!, {r3-r6} - add r7, r0, #256*4-8*4 + add r7, r0, #(240+BORDER_R)*4-8*4 stmia r7!, {r3-r6} stmia r7!, {r3-r6} - add r7, r7, #256*4-8*4 + add r7, r7, #(240+BORDER_R)*4-8*4 stmia r7!, {r3-r6} stmia r7!, {r3-r6} - add r7, r7, #256*4-8*4 + add r7, r7, #(240+BORDER_R)*4-8*4 stmia r7!, {r3-r6} stmia r7!, {r3-r6} @@ -373,7 +375,7 @@ vidConvCpy_90: mode2_4pix 0 .endif stmia r0, {r7,r8,r10,lr} - add r0, r0, #256*4 + add r0, r0, #(240+BORDER_R)*4 .if \is270 mode2_4pix 16 @@ -381,7 +383,7 @@ vidConvCpy_90: mode2_4pix 8 .endif stmia r0, {r7,r8,r10,lr} - add r0, r0, #256*4 + add r0, r0, #(240+BORDER_R)*4 .if \is270 mode2_4pix 8 @@ -389,7 +391,7 @@ vidConvCpy_90: mode2_4pix 16 .endif stmia r0, {r7,r8,r10,lr} - add r0, r0, #256*4 + add r0, r0, #(240+BORDER_R)*4 .if \is270 mode2_4pix 0 @@ -397,7 +399,7 @@ vidConvCpy_90: mode2_4pix 24 .endif stmia r0!,{r7,r8,r10,lr} - sub r0, r0, #256*4*3 + sub r0, r0, #(240+BORDER_R)*4*3 bpl 0b @ .loopM2RGB32_270 @@ -407,13 +409,13 @@ vidConvCpy_90: mov r6, #0 stmia r0!, {r3-r6} stmia r0!, {r3-r6} - add r0, r0, #256*4-8*4 + add r0, r0, #(240+BORDER_R)*4-8*4 stmia r0!, {r3-r6} stmia r0!, {r3-r6} - add r0, r0, #256*4-8*4 + add r0, r0, #(240+BORDER_R)*4-8*4 stmia r0!, {r3-r6} stmia r0!, {r3-r6} - add r0, r0, #256*4-8*4 + add r0, r0, #(240+BORDER_R)*4-8*4 stmia r0!, {r3-r6} nop @ phone crashes if this is commented out. Do I stress it too much? stmia r0!, {r3-r6} @@ -422,7 +424,9 @@ vidConvCpy_90: subs r12, r12, #1 ldmeqfd sp!, {r4-r11,pc} @ return - add r0, r0, #16*4 +.if BORDER_R + add r0, r0, #BORDER_R*4 +.endif .if \is270 sub r9, r9, #4 @ fix src pointer .else @@ -432,13 +436,13 @@ vidConvCpy_90: stmia r0!, {r3-r6} @ top border stmia r0!, {r3-r6} - add r7, r0, #256*4-8*4 + add r7, r0, #(240+BORDER_R)*4-8*4 stmia r7!, {r3-r6} stmia r7!, {r3-r6} - add r7, r7, #256*4-8*4 + add r7, r7, #(240+BORDER_R)*4-8*4 stmia r7!, {r3-r6} stmia r7!, {r3-r6} - add r7, r7, #256*4-8*4 + add r7, r7, #(240+BORDER_R)*4-8*4 stmia r7!, {r3-r6} stmia r7!, {r3-r6} @@ -481,7 +485,9 @@ vidConvCpy_center_0: sub r12, r12, #1 adds r12, r12, #1<<16 ldmeqfd sp!, {r4-r6,r11,pc} @ return - add r0, r0, #16*4 +.if BORDER_R + add r0, r0, #BORDER_R*4 +.endif add r1, r1, #88 orr r12, #(240/4-1)<<16 b .loopRGB32_c0 @@ -510,7 +516,9 @@ vidConvCpy_center_180: sub r12, r12, #1 adds r12, r12, #1<<16 ldmeqfd sp!, {r4-r6,r11,pc} @ return - add r0, r0, #16*4 +.if BORDER_R + add r0, r0, #BORDER_R*4 +.endif sub r1, r1, #88 orr r12, #(240/4-1)<<16 b .loopRGB32_c180 @@ -544,7 +552,9 @@ vidConvCpy_center2_40c_0: sub r12, r12, #1 adds r12, r12, #1<<16 ldmeqfd sp!, {r4-r6,r10,r11,pc} @ return - add r0, r0, #16*4 +.if BORDER_R + add r0, r0, #BORDER_R*4 +.endif add r1, r1, #8 orr r12, #(240/3-1)<<16 b .loopRGB32_c2_40c_0 @@ -580,7 +590,9 @@ vidConvCpy_center2_40c_180: sub r12, r12, #1 adds r12, r12, #1<<16 ldmeqfd sp!, {r4-r6,r10,r11,pc} @ return - add r0, r0, #16*4 +.if BORDER_R + add r0, r0, #BORDER_R*4 +.endif sub r1, r1, #8 orr r12, #(240/3-1)<<16 b .loop_c2_40c_180 @@ -617,7 +629,9 @@ vidConvCpy_center2_32c_0: sub r12, r12, #1 adds r12, r12, #1<<16 ldmeqfd sp!, {r4-r11,pc} @ return - add r0, r0, #16*4 +.if BORDER_R + add r0, r0, #BORDER_R*4 +.endif add r1, r1, #64+8 orr r12, #(240/15-1)<<16 b .loop_c2_32c_0 @@ -658,7 +672,9 @@ vidConvCpy_center2_32c_180: sub r12, r12, #1 adds r12, r12, #1<<16 ldmeqfd sp!, {r4-r11,pc} @ return - add r0, r0, #16*4 +.if BORDER_R + add r0, r0, #BORDER_R*4 +.endif sub r1, r1, #64+8 orr r12, #(240/15-1)<<16 b .loop_c2_32c_180 @@ -690,7 +706,9 @@ vidClear: sub r12, r12, #1 adds r12, r12, #1<<16 ldmeqfd sp!, {pc} @ return - add r0, r0, #16*4 +.if BORDER_R + add r0, r0, #BORDER_R*4 +.endif orr r12, #(240/16-1)<<16 b .loopVidClear