X-Git-Url: https://notaz.gp2x.de/cgi-bin/gitweb.cgi?a=blobdiff_plain;f=plugins%2Fdfsound%2Fdma.c;h=1aebfce5fabb111a82b0e97892ea1dc44f77e3f2;hb=d358733b8461f6fa182b33d29f0676c2df505854;hp=7c164ac61e999ed572a7dd52ff64547be4a88ce1;hpb=fb552464f06137102fd9ca69a05492265bbdcea7;p=pcsx_rearmed.git diff --git a/plugins/dfsound/dma.c b/plugins/dfsound/dma.c index 7c164ac6..1aebfce5 100644 --- a/plugins/dfsound/dma.c +++ b/plugins/dfsound/dma.c @@ -20,79 +20,75 @@ #define _IN_DMA #include "externals.h" +#include "registers.h" -//////////////////////////////////////////////////////////////////////// -// READ DMA (one value) -//////////////////////////////////////////////////////////////////////// - -unsigned short CALLBACK SPUreadDMA(void) +static void set_dma_end(int iSize, unsigned int cycles) { - unsigned short s=spuMem[spuAddr>>1]; - spuAddr+=2; - if(spuAddr>0x7ffff) spuAddr=0; - - return s; + // this must be > psxdma.c dma irq + // Road Rash also wants a considerable delay, maybe because of fifo? + cycles += iSize * 20; // maybe + cycles |= 1; // indicates dma is active + spu.cycles_dma_end = cycles; } //////////////////////////////////////////////////////////////////////// // READ DMA (many values) //////////////////////////////////////////////////////////////////////// -void CALLBACK SPUreadDMAMem(unsigned short * pusPSXMem,int iSize) -{ - int i; - - for(i=0;i>1]; // spu addr got by writeregister - spuAddr+=2; // inc spu addr - if(spuAddr>0x7ffff) spuAddr=0; // wrap - } -} - -//////////////////////////////////////////////////////////////////////// -//////////////////////////////////////////////////////////////////////// -//////////////////////////////////////////////////////////////////////// - -// to investigate: do sound data updates by writedma affect spu -// irqs? Will an irq be triggered, if new data is written to -// the memory irq address? - -//////////////////////////////////////////////////////////////////////// -// WRITE DMA (one value) -//////////////////////////////////////////////////////////////////////// - -void CALLBACK SPUwriteDMA(unsigned short val) +void CALLBACK SPUreadDMAMem(unsigned short *pusPSXMem, int iSize, + unsigned int cycles) { - spuMem[spuAddr>>1] = val; // spu addr got by writeregister - - spuAddr+=2; // inc spu addr - if(spuAddr>0x7ffff) spuAddr=0; // wrap + unsigned int addr = spu.spuAddr, irq_addr = regAreaGet(H_SPUirqAddr) << 3; + int i, irq; + + do_samples_if_needed(cycles, 1, 2); + irq = addr <= irq_addr && irq_addr < addr + iSize*2; + + for(i = 0; i < iSize; i++) + { + *pusPSXMem++ = *(unsigned short *)(spu.spuMemC + addr); + addr += 2; + addr &= 0x7fffe; + } + if (irq && (spu.spuCtrl & CTRL_IRQ)) + log_unhandled("rdma spu irq: %x/%x+%x\n", irq_addr, spu.spuAddr, iSize * 2); + spu.spuAddr = addr; + set_dma_end(iSize, cycles); } //////////////////////////////////////////////////////////////////////// // WRITE DMA (many values) //////////////////////////////////////////////////////////////////////// -void CALLBACK SPUwriteDMAMem(unsigned short * pusPSXMem,int iSize) +void CALLBACK SPUwriteDMAMem(unsigned short *pusPSXMem, int iSize, + unsigned int cycles) { - int i; + unsigned int addr = spu.spuAddr, irq_addr = regAreaGet(H_SPUirqAddr) << 3; + int i, irq; - had_dma = 1; - - if(spuAddr + iSize*2 < 0x80000) - { - memcpy(&spuMem[spuAddr>>1], pusPSXMem, iSize*2); - spuAddr += iSize*2; - return; - } - - for(i=0;i>1] = *pusPSXMem++; // spu addr got by writeregister - spuAddr+=2; // inc spu addr - spuAddr&=0x7ffff; // wrap + *(unsigned short *)(spu.spuMemC + addr) = *pusPSXMem++; + addr += 2; + addr &= 0x7fffe; } + } + if (irq && (spu.spuCtrl & CTRL_IRQ)) // unhandled because need to implement delay + log_unhandled("wdma spu irq: %x/%x+%x\n", irq_addr, spu.spuAddr, iSize * 2); + spu.spuAddr = addr; + set_dma_end(iSize, cycles); } ////////////////////////////////////////////////////////////////////////