X-Git-Url: https://notaz.gp2x.de/cgi-bin/gitweb.cgi?a=blobdiff_plain;f=plugins%2Fdfsound%2Fdma.c;h=25a0aefd5fb8f8e587dc5359b882dfcd28b64482;hb=25f460eca64d55f980ab57851ffbd9fe58a5793c;hp=f92d06662422ae97e0a9eedff9f8e2af57d547df;hpb=ef79bbde537d6b9c745a7d86cb9df1d04c35590d;p=pcsx_rearmed.git

diff --git a/plugins/dfsound/dma.c b/plugins/dfsound/dma.c
index f92d0666..25a0aefd 100644
--- a/plugins/dfsound/dma.c
+++ b/plugins/dfsound/dma.c
@@ -20,78 +20,82 @@
 #define _IN_DMA
 
 #include "externals.h"
+#include "registers.h"
 
-////////////////////////////////////////////////////////////////////////
-// READ DMA (one value)
-////////////////////////////////////////////////////////////////////////
-
-unsigned short CALLBACK SPUreadDMA(void)
+static void set_dma_end(int iSize, unsigned int cycles)
 {
- unsigned short s=spuMem[spuAddr>>1];
- spuAddr+=2;
- if(spuAddr>0x7ffff) spuAddr=0;
-
- iSpuAsyncWait=0;
-
- return s;
+ // this must be > psxdma.c dma irq
+ // Road Rash also wants a considerable delay, maybe because of fifo?
+ cycles += iSize * 20;  // maybe
+ cycles |= 1;           // indicates dma is active
+ spu.cycles_dma_end = cycles;
 }
 
 ////////////////////////////////////////////////////////////////////////
 // READ DMA (many values)
 ////////////////////////////////////////////////////////////////////////
 
-void CALLBACK SPUreadDMAMem(unsigned short * pusPSXMem,int iSize)
-{
- int i;
-
- for(i=0;i<iSize;i++)
-  {
-   *pusPSXMem++=spuMem[spuAddr>>1];                    // spu addr got by writeregister
-   spuAddr+=2;                                         // inc spu addr
-   if(spuAddr>0x7ffff) spuAddr=0;                      // wrap
-  }
-
- iSpuAsyncWait=0;
-}
-
-////////////////////////////////////////////////////////////////////////
-////////////////////////////////////////////////////////////////////////
-////////////////////////////////////////////////////////////////////////
-
-// to investigate: do sound data updates by writedma affect spu
-// irqs? Will an irq be triggered, if new data is written to
-// the memory irq address?
-
-////////////////////////////////////////////////////////////////////////
-// WRITE DMA (one value)
-////////////////////////////////////////////////////////////////////////
-  
-void CALLBACK SPUwriteDMA(unsigned short val)
+void CALLBACK SPUreadDMAMem(unsigned short *pusPSXMem, int iSize,
+ unsigned int cycles)
 {
- spuMem[spuAddr>>1] = val;                             // spu addr got by writeregister
-
- spuAddr+=2;                                           // inc spu addr
- if(spuAddr>0x7ffff) spuAddr=0;                        // wrap
-
- iSpuAsyncWait=0;
+ unsigned int addr = spu.spuAddr, irq_addr = regAreaGet(H_SPUirqAddr) << 3;
+ int i, irq_after;
+
+ do_samples_if_needed(cycles, 1, 2);
+ irq_after = (irq_addr - addr) & 0x7ffff;
+
+ for(i = 0; i < iSize; i++)
+ {
+  *pusPSXMem++ = *(unsigned short *)(spu.spuMemC + addr);
+  addr += 2;
+  addr &= 0x7fffe;
+ }
+ if ((spu.spuCtrl & CTRL_IRQ) && irq_after < iSize * 2) {
+  log_unhandled("rdma spu irq: %x/%x+%x\n", irq_addr, spu.spuAddr, iSize * 2);
+  do_irq_io(irq_after);
+ }
+ spu.spuAddr = addr;
+ set_dma_end(iSize, cycles);
 }
 
 ////////////////////////////////////////////////////////////////////////
 // WRITE DMA (many values)
 ////////////////////////////////////////////////////////////////////////
 
-void CALLBACK SPUwriteDMAMem(unsigned short * pusPSXMem,int iSize)
+void CALLBACK SPUwriteDMAMem(unsigned short *pusPSXMem, int iSize,
+ unsigned int cycles)
 {
- int i;
-
- for(i=0;i<iSize;i++)
+ unsigned int addr = spu.spuAddr, irq_addr = regAreaGet(H_SPUirqAddr) << 3;
+ int i, irq_after;
+ 
+ do_samples_if_needed(cycles, 1, 2);
+ irq_after = (irq_addr - addr) & 0x7ffff;
+ spu.bMemDirty = 1;
+
+ if (addr + iSize*2 < 0x80000)
+ {
+  memcpy(spu.spuMemC + addr, pusPSXMem, iSize*2);
+  addr += iSize*2;
+ }
+ else
+ {
+  for (i = 0; i < iSize; i++)
   {
-   spuMem[spuAddr>>1] = *pusPSXMem++;                  // spu addr got by writeregister
-   spuAddr+=2;                                         // inc spu addr
-   if(spuAddr>0x7ffff) spuAddr=0;                      // wrap
+   *(unsigned short *)(spu.spuMemC + addr) = *pusPSXMem++;
+   addr += 2;
+   addr &= 0x7fffe;
   }
- 
- iSpuAsyncWait=0;
+ }
+ if ((spu.spuCtrl & CTRL_IRQ) && irq_after < iSize * 2) {
+  log_unhandled("wdma spu irq: %x/%x+%x (%u)\n",
+    irq_addr, spu.spuAddr, iSize * 2, irq_after);
+  // this should be consistent with psxdma.c timing
+  // might also need more delay like in set_dma_end()
+  do_irq_io(irq_after);
+ }
+ spu.spuAddr = addr;
+ set_dma_end(iSize, cycles);
 }
 
 ////////////////////////////////////////////////////////////////////////
+// vim:shiftwidth=1:expandtab