X-Git-Url: https://notaz.gp2x.de/cgi-bin/gitweb.cgi?a=blobdiff_plain;f=plugins%2Fgpu_unai%2Fgpu_raster_sprite.h;h=ea4e82f2bb9ec3387bf1f3e83b52b9da92739991;hb=4949d4fff530344f0f4a1676bc45d0203749f291;hp=91f7bc0e511fc3fd29ab7fc48c3330d391201be5;hpb=c89fac55014151734b4abb0d8a7e3747e5ce629a;p=pcsx_rearmed.git diff --git a/plugins/gpu_unai/gpu_raster_sprite.h b/plugins/gpu_unai/gpu_raster_sprite.h index 91f7bc0e..ea4e82f2 100644 --- a/plugins/gpu_unai/gpu_raster_sprite.h +++ b/plugins/gpu_unai/gpu_raster_sprite.h @@ -32,11 +32,11 @@ void gpuDrawS(PtrUnion packet, const PS gpuSpriteSpanDriver) //NOTE: Must 11-bit sign-extend the whole sum here, not just packet X/Y, // or sprites in 1st level of SkullMonkeys disappear when walking right. // This now matches behavior of Mednafen and PCSX Rearmed's gpu_neon: - x0 = GPU_EXPANDSIGN(packet.S2[2] + gpu_unai.DrawingOffset[0]); - y0 = GPU_EXPANDSIGN(packet.S2[3] + gpu_unai.DrawingOffset[1]); + x0 = GPU_EXPANDSIGN(le16_to_s16(packet.U2[2]) + gpu_unai.DrawingOffset[0]); + y0 = GPU_EXPANDSIGN(le16_to_s16(packet.U2[3]) + gpu_unai.DrawingOffset[1]); - u32 w = packet.U2[6] & 0x3ff; // Max width is 1023 - u32 h = packet.U2[7] & 0x1ff; // Max height is 511 + u32 w = le16_to_u16(packet.U2[6]) & 0x3ff; // Max width is 1023 + u32 h = le16_to_u16(packet.U2[7]) & 0x1ff; // Max height is 511 x1 = x0 + w; y1 = y0 + h; @@ -63,7 +63,7 @@ void gpuDrawS(PtrUnion packet, const PS gpuSpriteSpanDriver) gpu_unai.g5 = packet.U1[1] >> 3; gpu_unai.b5 = packet.U1[2] >> 3; - u16 *Pixel = &((u16*)gpu_unai.vram)[FRAME_OFFSET(x0, y0)]; + le16_t *Pixel = &gpu_unai.vram[FRAME_OFFSET(x0, y0)]; const int li=gpu_unai.ilace_mask; const int pi=(ProgressiveInterlaceEnabled()?(gpu_unai.ilace_mask+1):0); const int pif=(ProgressiveInterlaceEnabled()?(gpu_unai.prog_ilace_flag?(gpu_unai.ilace_mask+1):0):1); @@ -98,8 +98,8 @@ void gpuDrawS16(PtrUnion packet) //NOTE: Must 11-bit sign-extend the whole sum here, not just packet X/Y, // or sprites in 1st level of SkullMonkeys disappear when walking right. // This now matches behavior of Mednafen and PCSX Rearmed's gpu_neon: - x0 = GPU_EXPANDSIGN(packet.S2[2] + gpu_unai.DrawingOffset[0]); - y0 = GPU_EXPANDSIGN(packet.S2[3] + gpu_unai.DrawingOffset[1]); + x0 = GPU_EXPANDSIGN(le16_to_s16(packet.U2[2]) + gpu_unai.DrawingOffset[0]); + y0 = GPU_EXPANDSIGN(le16_to_s16(packet.U2[3]) + gpu_unai.DrawingOffset[1]); xmin = gpu_unai.DrawingArea[0]; xmax = gpu_unai.DrawingArea[2]; ymin = gpu_unai.DrawingArea[1]; ymax = gpu_unai.DrawingArea[3]; @@ -109,7 +109,7 @@ void gpuDrawS16(PtrUnion packet) if (x0 > xmax - 16 || x0 < xmin || ((u0 | v0) & 15) || !(gpu_unai.TextureWindow[2] & gpu_unai.TextureWindow[3] & 8)) { // send corner cases to general handler - packet.U4[3] = 0x00100010; + packet.U4[3] = u32_to_le32(0x00100010); gpuDrawS(packet, gpuSpriteSpanFn<0x20>); return; } @@ -133,11 +133,11 @@ void gpuDrawT(PtrUnion packet, const PT gpuTileSpanDriver) s32 x0, x1, y0, y1; // This now matches behavior of Mednafen and PCSX Rearmed's gpu_neon: - x0 = GPU_EXPANDSIGN(packet.S2[2] + gpu_unai.DrawingOffset[0]); - y0 = GPU_EXPANDSIGN(packet.S2[3] + gpu_unai.DrawingOffset[1]); + x0 = GPU_EXPANDSIGN(le16_to_s16(packet.U2[2]) + gpu_unai.DrawingOffset[0]); + y0 = GPU_EXPANDSIGN(le16_to_s16(packet.U2[3]) + gpu_unai.DrawingOffset[1]); - u32 w = packet.U2[4] & 0x3ff; // Max width is 1023 - u32 h = packet.U2[5] & 0x1ff; // Max height is 511 + u32 w = le16_to_u16(packet.U2[4]) & 0x3ff; // Max width is 1023 + u32 h = le16_to_u16(packet.U2[5]) & 0x1ff; // Max height is 511 x1 = x0 + w; y1 = y0 + h; @@ -154,8 +154,8 @@ void gpuDrawT(PtrUnion packet, const PT gpuTileSpanDriver) x1 -= x0; if (x1 <= 0) return; - const u16 Data = GPU_RGB16(packet.U4[0]); - u16 *Pixel = &((u16*)gpu_unai.vram)[FRAME_OFFSET(x0, y0)]; + const u16 Data = GPU_RGB16(le32_to_u32(packet.U4[0])); + le16_t *Pixel = &gpu_unai.vram[FRAME_OFFSET(x0, y0)]; const int li=gpu_unai.ilace_mask; const int pi=(ProgressiveInterlaceEnabled()?(gpu_unai.ilace_mask+1):0); const int pif=(ProgressiveInterlaceEnabled()?(gpu_unai.prog_ilace_flag?(gpu_unai.ilace_mask+1):0):1);